6 Commits (6cf92fd748f7de7f13454ec78329085d08b7f6f7)

Author	SHA1	Message	Date
tychovrahe	6cf92fd748	feat(core): Introduce stack overflow detection by moving stack to the start of RAM	2 years ago
Martin Milata	8c6b93e0bd	build(core): account for ARM unwinding info in memory layout ... Currently the 8-byte section is inserted under semi-random name like .ARM.exidx.text._ZN50_$LT$T$u20$as$u20$core..convert..Into$LT$U$GT$$GT$4into17h79ccbc4bdfe3f200E. This makes it hard to include it in _codelen that is later baked into firmware header. This change adds new section because including it in .flash causes linker error due to mixing "ordered" and "unordered" sections. By renaming .exidx to /DISCARD/ we'd drop this info, there may also exist compiler flag to do that.	3 years ago
Jan Pochyla	6257584951	feat(core): Add Rust bindings to MicroPython and trezorhal ... core: Remove dangling module decls core: Use new Cargo feature resolver, use external MacOS debug info core: Rust docs improvements core: Upgrade bindgen core: Add test target to Rust ci: build rust sources build(core): .ARM.exidx.text.__aeabi_ui2f in t1 firmware size It's an unwind table for softfloat function inserted by rustc, probably can be removed to save 8 bytes: 599c58db70/link.x.in (L175-L182) scons: Remove dead code core: Move Rust target to build/rust core: Replace extern with a FFI version core: Add some explanatory Rust comments core: Use correct path for the Rust lib core: Remove Buffer::as_mut() Mutable buffer access needs MP_BUFFER_WRITE flag. TBD in the Protobuf PR. core: Improve docs for micropython::Buffer core: Minor Rust docs changes core: Rewrite trezor_obj_get_ll_checked core: Fix incorrect doc comment core: Remove cc from deps fixup! core: Rewrite trezor_obj_get_ll_checked core: update safety comments	3 years ago
Ondrej Mikle	e429085e96	core: copy firmware header for T1 port into final binary	4 years ago
Ondrej Mikle	d8115a7992	core: firmware header for T1 port	4 years ago
matejcik	e5670856a2	MONOREPO CREATE FROM trezor-core	5 years ago