cepetr
bbb74c03a4
feat(core): introduce secure monitor
...
[no changelog]
2025-06-04 16:58:15 +02:00
cepetr
e66f4f2d83
refactor(core): simplify unprivileged SAES execution
...
[no changelog]
2025-06-04 16:58:15 +02:00
cepetr
1a372b5019
feat(core): allow passing postmortem info in bootargs
...
[no changelog]
2025-06-04 16:58:15 +02:00
tychovrahe
9e8f989c80
fix(core): implement reboot_to_bootloader for unix
...
[no changelog]
2025-06-02 09:16:53 +02:00
tychovrahe
a4eaf4dc27
feat(core): respect manufacturing mode in power on sequence
...
[no changelog]
2025-05-30 14:04:45 +02:00
tychovrahe
c63ff3bf44
feat(core): implement reboot command to bypass button check
...
[no changelog]
2025-05-30 14:04:45 +02:00
tychovrahe
6e82c2415f
refactor(core): refactor power manager syscalls
...
[no changelog]
2025-05-30 14:04:45 +02:00
tychovrahe
0cd38186bf
fix(core): adjust to powerctl->power manager transition
...
[no changelog]
2025-05-30 14:04:45 +02:00
cepetr
0f0c28404b
fix(core): fix exc_return codes for non-secure world
...
[no changelog]
2025-05-12 07:57:46 +02:00
cepetr
9fb71f8f81
fix(core): disable MSPLIM before entering next boot stage
...
[no changelog]
2025-05-12 07:57:46 +02:00
cepetr
452e63c4fb
feat(core): add display feature to SConscript
...
[no changelog]
2025-05-12 07:57:46 +02:00
tychovrahe
4394992b81
chore(core): unify comment style in startup_init.c
...
[no changelog]
2025-03-04 11:23:55 +01:00
tychovrahe
4de403bbe1
feat(core): enable LSE on T3W1
...
[no changelog]
2025-03-04 11:23:55 +01:00
tychovrahe
d535e725c0
fix(core): fix tamper setting
...
[no changelog]
2025-03-04 11:23:55 +01:00
tychovrahe
587b5e8eb8
fix(core): fix jump to old bootloader
...
Initialize systick before jump, as the old bootloaders may not initialize systick on start and rely on systick running from boardloader or firmware. Only relevant for F4, otherwise we are jumping through reset.
[no changelog]
2025-02-28 16:17:06 +01:00
Roman Zeyde
ae9e0281df
refactor(core): separate clear_unused_stack() from sys/linker module
...
Following https://github.com/trezor/trezor-firmware/pull/4595#pullrequestreview-2609833271 .
[no changelog]
2025-02-12 12:53:27 +01:00
cepetr
0456fdb826
fix(core): fix reboot_device function behaviour
...
[no changelog]
2025-02-11 17:02:31 +01:00
cepetr
117eec798c
fix(core): fix optiga pairing issue
...
[no changelog]
2025-02-10 10:43:54 +01:00
tychovrahe
85bbc89eed
fix(core): don't use RSOD_INFINITE_LOOP on models using DSI/LTDC displays
...
[no changelog]
2025-02-06 13:53:31 +01:00
cepetr
ef1f44cb38
feat(core): extra clear of memory during device halt
...
[no changelog]
2025-02-06 13:53:31 +01:00
cepetr
f99030938e
feat(core): reset peripherals during handovers
...
[no changelog]
2025-01-30 14:07:25 +01:00
cepetr
6719eeb376
refactor(core): simplify shutdown/handover code
...
[no changelog]
2025-01-30 14:07:25 +01:00
cepetr
2697c06642
refactor(core): rewrite rescue code in C
...
[no changelog]
2025-01-30 14:07:25 +01:00
cepetr
95afa34f27
refactor(core): rewrite startup code in C
...
[no changelog]
2025-01-30 14:07:25 +01:00
cepetr
7613fe310a
refactor(core): rename linker script section constants
...
[no changelog]
2025-01-30 14:07:25 +01:00
cepetr
2671404e44
refactor(core): rename stack related linker script symbols
...
[no changelog]
2025-01-30 14:07:25 +01:00
cepetr
bdb3d486e3
refactor(core): rename jump_to function
...
[no changelog]
2025-01-30 14:07:25 +01:00
cepetr
2ecf335349
refactor(core): use memset_reg in asm code only
...
[no changelog]
2025-01-30 14:07:25 +01:00
cepetr
c30233b832
refactor(core): stop using shutdown_privileged directly
...
[no changelog]
2025-01-30 14:07:25 +01:00
Martin Milata
dadff32f39
build(core): use internal model names everywhere
...
TREZOR_MODEL=T and TREZOR_MODEL=R
no longer work, please use
TREZOR_MODEL=T2T1 and TREZOR_MODEL=T2B1
[no changelog]
2025-01-13 16:24:35 +01:00
tychovrahe
b0dd521c5d
fix(core): separate bootargs from kernel/aux SRAM
...
[no changelog]
2024-11-20 11:17:35 +01:00
tychovrahe
b4c95f4c16
fix(core): fix systick frequency computation by utilizing HSE_VALUE properly
...
[no changelog]
2024-11-20 11:17:35 +01:00
tychovrahe
bbf97c7141
fix(core): fix clock setting on U5 for 32 MHz HSE
...
[no changelog]
2024-11-20 11:17:35 +01:00
cepetr
089db2cadf
refactor(core): restructure embed folder
...
[no changelog]
2024-11-18 09:41:02 +01:00
