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mirror of https://github.com/trezor/trezor-firmware.git synced 2024-11-30 03:18:20 +00:00
Commit Graph

24 Commits

Author SHA1 Message Date
grdddj
9dc73427fb feat(rust): add print! macro for logging into terminal 2022-07-20 12:46:01 +02:00
Martin Milata
c9ca7cd544 feat(core/rust/ui): bitcoin layouts
[no changelog]
2022-06-28 18:01:02 +02:00
tychovrahe
c33f92bd72 feat(core): add RGB LED driver for Model R 2022-06-22 09:28:31 +02:00
matejcik
2aa427a6e3 feat(core/rust): make Rust buildable without Micropython
Features `micropython` and `protobuf` are defined. Protobuf implies micropython
because our protobuf impl is pretty much _for_ micropython.

The respective subdirs are included only if the matching feature is defined.

util.rs is moved to micropython because it mostly concerns micropython interop

ResultExt, useful only for ui_debug, is moved to ui::util.

A new module `trezorhal::time` is provided. It mirrors functionality of
`micropython::time` via stmlib functions.  The intended use is to always use
functions from `trezorhal::time`. The right micropython variants are used when
micropython is available, otherwise the pure stmlib versions are called.

ui::*::layout is conditional for micropython feature, because it only concerns
micropython layouts. If we want to reuse layouts defined there, we will need to
export them to not depend on Objs and Qstrs etc.
2022-06-16 13:08:07 +02:00
Jan Pochyla
c3b82fd651 feat(core/rust): add trezorhal bindings 2022-06-08 14:42:04 +02:00
matejcik
187ca8ad50 feat(core/rust): List::from_iter
[no changelog]
2022-05-17 15:56:26 +02:00
matejcik
b3b3e0efa4 tests(core/rust): ability to set up MicroPython env for testing
warning: super hacky!
[no changelog]
2022-05-17 15:56:26 +02:00
Ondřej Vejpustek
db0da196a8 chore(vendor): update secp256k1-zkp to latest 2022-05-16 16:23:18 +02:00
Martin Milata
18c8304339 fix(core): leftover TREZOR_MODEL defines
[no changelog]
2022-04-28 16:47:22 +02:00
matejcik
785dc7f4d7 feat(core/rust): introduce StrBuffer
it is a variant of Buffer specifically for accepting python `str`
2022-04-11 16:49:58 +02:00
Martin Milata
38f4ab0983 feat(core/rust/ui): return Layout results as singleton objects
[no changelog]
2022-04-04 13:32:07 +02:00
Jan Pochyla
36829cfa8f feat(core/rust): Add obj_module! macro
[no changelog]

Co-authored-by: Martin Milata <martin@martinmilata.cz>
2022-04-04 13:32:07 +02:00
Jan Pochyla
a54ca9cb05 chore(core/rust): Add micropython::time::sleep 2022-01-28 09:58:49 +01:00
Jan Pochyla
998210d569 feat(core): Add Instant and Duration types 2022-01-28 09:58:49 +01:00
Martin Milata
3c49ef2f62 feat(core/rust): exposing vararg functions to uPy
[no changelog]
2021-11-24 15:36:34 +01:00
Ondřej Vejpustek
a924bd4dc6 build(core): do not link gen_context.o to trezor_lib 2021-10-25 14:41:28 +02:00
Jan Pochyla
5eefcffc7c chore(core): prepare for fuzzing targets
First, we change the Protobuf definition includes to use an exact path relative to our crate's directory, instead of the OUT_DIR. This fixes build when a combination of stable and nightly toolchains is used (nightly is needed for the fuzzing targets).

Another change is a slight fix in the panic handler conditional compilation. Fuzzing is using the crate with `features = ["test"]`, but doesn't turn on the `test` cfg.

[no changelog]
2021-10-07 15:01:55 +02:00
Martin Milata
81e66cb024 style(core/rust): enable clippy lints
[no changelog]
2021-09-23 14:22:40 +02:00
Jan Pochyla
2c8dec93a6 feat(core): Split unix main, link core obj into Rust test target 2021-09-21 12:43:31 +02:00
matejcik
7a17124b43 refactor(core/rust): do not rely too much on new_exception helpers 2021-09-21 12:43:31 +02:00
matejcik
b666895303 feat(core/rust): catch, handle and propagate uPy exceptions 2021-09-21 12:43:31 +02:00
Jan Pochyla
7c65f0357a feat(core/rust): Implement exception catching in Rust
chore(core): Add test for Rust exc catching

chore(core): Document exception catching in Rust

[no changelog]
2021-09-21 12:43:31 +02:00
Martin Milata
20fe8552ca build(core/rust): use correct architecture for T1
TT is Cortex-M4 is Armv7E-M while T1 is Cortex-M3 is Armv7-M:
https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/armv6-m-vs-armv7-m---unpacking-the-microcontrollers
2021-05-21 13:49:42 +02:00
Jan Pochyla
6257584951 feat(core): Add Rust bindings to MicroPython and trezorhal
core: Remove dangling module decls

core: Use new Cargo feature resolver, use external MacOS debug info

core: Rust docs improvements

core: Upgrade bindgen

core: Add test target to Rust

ci: build rust sources

build(core): .ARM.exidx.text.__aeabi_ui2f in t1 firmware size

It's an unwind table for softfloat function inserted by rustc, probably
can be removed to save 8 bytes:
599c58db70/link.x.in (L175-L182)

scons: Remove dead code

core: Move Rust target to build/rust

core: Replace extern with a FFI version

core: Add some explanatory Rust comments

core: Use correct path for the Rust lib

core: Remove Buffer::as_mut()

Mutable buffer access needs MP_BUFFER_WRITE flag. TBD in the Protobuf PR.

core: Improve docs for micropython::Buffer

core: Minor Rust docs changes

core: Rewrite trezor_obj_get_ll_checked

core: Fix incorrect doc comment

core: Remove cc from deps

fixup! core: Rewrite trezor_obj_get_ll_checked

core: update safety comments
2021-05-05 16:00:21 +02:00