cepetr
1 month ago
parent
3734073350
commit
f4b4582dee
@ -1,126 +0,0 @@
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#include STM32_HAL_H
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#include <model.h>
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#include "../mpu.h"
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#include "common.h"
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#include "display.h"
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#include "irq.h"
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#include "supervise.h"
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#ifdef ARM_USER_MODE
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void svc_init(void) {
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NVIC_SetPriority(SVCall_IRQn, IRQ_PRI_HIGHEST);
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// We need to ensure that SysTick has the expected priority.
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// The SysTick priority is configured in the boardloader,
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// and some early versions didn't set this properly.
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NVIC_SetPriority(SysTick_IRQn, IRQ_PRI_HIGHEST);
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}
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#ifdef STM32U5
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extern uint32_t g_boot_command;
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__attribute__((noreturn)) static void _reboot_to_bootloader(
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boot_command_t boot_command) {
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g_boot_command = boot_command;
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disable_irq();
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delete_secrets();
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NVIC_SystemReset();
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}
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#else
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__attribute__((noreturn)) static void _reboot_to_bootloader(
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boot_command_t boot_command) {
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display_deinit(DISPLAY_RESET_CONTENT);
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#ifdef ENSURE_COMPATIBLE_SETTINGS
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ensure_compatible_settings();
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#endif
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mpu_config_bootloader();
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jump_to_with_flag(IMAGE_CODE_ALIGN(BOOTLOADER_START + IMAGE_HEADER_SIZE),
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boot_command);
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for (;;)
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;
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}
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#endif
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void svc_reboot_to_bootloader(void) {
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boot_command_t boot_command = bootargs_get_command();
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if (is_mode_unprivileged() && !is_mode_handler()) {
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register uint32_t r0 __asm__("r0") = boot_command;
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__asm__ __volatile__("svc %0" ::"i"(SVC_REBOOT_TO_BOOTLOADER), "r"(r0)
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: "memory");
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} else {
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_reboot_to_bootloader(boot_command);
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}
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}
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void svc_reboot(void) {
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if (is_mode_unprivileged() && !is_mode_handler()) {
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__asm__ __volatile__("svc %0" ::"i"(SVC_REBOOT) : "memory");
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} else {
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NVIC_SystemReset();
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}
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}
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void SVC_C_Handler(uint32_t *stack) {
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uint8_t svc_number = ((uint8_t *)stack[6])[-2];
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switch (svc_number) {
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case SVC_ENABLE_IRQ:
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NVIC_EnableIRQ(stack[0]);
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break;
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case SVC_DISABLE_IRQ:
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NVIC_DisableIRQ(stack[0]);
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break;
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case SVC_SET_PRIORITY:
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NVIC_SetPriority(stack[0], stack[1]);
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break;
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#ifdef SYSTEM_VIEW
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case SVC_GET_DWT_CYCCNT:
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cyccnt_cycles = *DWT_CYCCNT_ADDR;
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break;
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#endif
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case SVC_SHUTDOWN:
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shutdown_privileged();
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for (;;)
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;
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break;
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case SVC_REBOOT_TO_BOOTLOADER:
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__asm__ volatile("msr control, %0" ::"r"(0x0));
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__asm__ volatile("isb");
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// The input stack[0] argument comes from R0 saved when SVC was called
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// from svc_reboot_to_bootloader. The __asm__ directive expects address as
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// argument, hence the & in front of it, otherwise it would try
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// to dereference the value and fault
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__asm__ volatile(
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"mov r0, %[boot_command]" ::[boot_command] "r"(&stack[0]));
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// See stack layout in
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// https://developer.arm.com/documentation/ka004005/latest We are changing
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// return address in PC to land into reboot to avoid any bug with ROP and
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// raising privileges.
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stack[6] = (uintptr_t)_reboot_to_bootloader;
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return;
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case SVC_REBOOT:
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NVIC_SystemReset();
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break;
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default:
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stack[0] = 0xffffffff;
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break;
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}
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}
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__attribute__((naked)) void SVC_Handler(void) {
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__asm volatile(
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" tst lr, #4 \n" // Test Bit 3 to see which stack pointer we should
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// use
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" ite eq \n" // Tell the assembler that the nest 2 instructions
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// are if-then-else
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" mrseq r0, msp \n" // Make R0 point to main stack pointer
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" mrsne r0, psp \n" // Make R0 point to process stack pointer
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" b SVC_C_Handler \n" // Off to C land
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);
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}
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#endif // ARM_USER_MODE
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@ -1,74 +0,0 @@
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// supervisor call functions
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#define SVC_ENABLE_IRQ 0
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#define SVC_DISABLE_IRQ 1
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#define SVC_SET_PRIORITY 2
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#define SVC_SHUTDOWN 4
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#define SVC_REBOOT_TO_BOOTLOADER 5
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#define SVC_REBOOT 6
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#include <string.h>
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#include "boot_args.h"
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#include "common.h"
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#include "image.h"
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// from util.s
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extern void shutdown_privileged(void);
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// Initializes the supervise module
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//
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// Must be called before invoking the first `svc_xxx` call
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void svc_init(void);
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static inline uint32_t is_mode_unprivileged(void) {
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uint32_t r0;
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__asm__ volatile("mrs %0, control" : "=r"(r0));
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return r0 & 1;
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}
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static inline uint32_t is_mode_handler(void) {
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uint32_t r0;
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__asm__ volatile("mrs %0, ipsr" : "=r"(r0));
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return (r0 & 0x1FF) != 0;
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}
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static inline void svc_enableIRQ(uint32_t IRQn) {
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if (is_mode_unprivileged() && !is_mode_handler()) {
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register uint32_t r0 __asm__("r0") = IRQn;
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__asm__ __volatile__("svc %0" ::"i"(SVC_ENABLE_IRQ), "r"(r0) : "memory");
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} else {
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NVIC_EnableIRQ(IRQn);
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}
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}
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static inline void svc_disableIRQ(uint32_t IRQn) {
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if (is_mode_unprivileged() && !is_mode_handler()) {
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register uint32_t r0 __asm__("r0") = IRQn;
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__asm__ __volatile__("svc %0" ::"i"(SVC_DISABLE_IRQ), "r"(r0) : "memory");
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} else {
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NVIC_DisableIRQ(IRQn);
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}
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}
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static inline void svc_setpriority(uint32_t IRQn, uint32_t priority) {
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if (is_mode_unprivileged() && !is_mode_handler()) {
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register uint32_t r0 __asm__("r0") = IRQn;
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register uint32_t r1 __asm__("r1") = priority;
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__asm__ __volatile__("svc %0" ::"i"(SVC_SET_PRIORITY), "r"(r0), "r"(r1)
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: "memory");
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} else {
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NVIC_SetPriority(IRQn, priority);
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}
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}
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static inline void svc_shutdown(void) {
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if (is_mode_unprivileged() && !is_mode_handler()) {
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__asm__ __volatile__("svc %0" ::"i"(SVC_SHUTDOWN) : "memory");
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} else {
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shutdown_privileged();
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}
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}
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void svc_reboot_to_bootloader(void);
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void svc_reboot(void);
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@ -1 +0,0 @@
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../stm32f4/supervise.c
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@ -1 +0,0 @@
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../stm32f4/supervise.h
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