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https://github.com/trezor/trezor-firmware.git
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refactor(core): extract framebuffer copy to separate bg_copy functionality
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This commit is contained in:
tychovrahe
TychoVrahe
parent
afefc17478
commit
f08bed363d
25
core/embed/trezorhal/bg_copy.h
Normal file
25
core/embed/trezorhal/bg_copy.h
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@ -0,0 +1,25 @@
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#ifndef TREZORHAL_BG_COPY_H
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#define TREZORHAL_BG_COPY_H
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#include <stdbool.h>
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#include <stddef.h>
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#include <stdint.h>
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/**
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* Wait for the data transfer completion
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*/
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void bg_copy_wait(void);
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/**
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* Performs data copy from src to dst in the background. The destination is
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* constant, meaning the address is not incremented. Ensure the transfer
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* completion by calling bg_copy_wait
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*
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* @param src source data address
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* @param dst destination data address
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* @param size size of data to be transferred in bytes
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*/
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void bg_copy_start_const_out_8(const uint8_t *src, uint8_t *dst, size_t size);
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#endif
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@ -65,6 +65,8 @@ __IO DISP_MEM_TYPE *const DISPLAY_DATA_ADDRESS =
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#error Framebuffer only supported on STM32U5 for now
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#endif
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#include "bg_copy.h"
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#define DATA_TRANSFER(X) \
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DATA((X)&0xFF); \
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DATA((X) >> 8)
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@ -84,12 +86,6 @@ static uint16_t window_y1 = 0;
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static uint16_t cursor_x = 0;
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static uint16_t cursor_y = 0;
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static volatile uint32_t dma_transfer_remaining = 0;
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static volatile uint32_t dma_data_transferred = 0;
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static DMA_HandleTypeDef DMA_Handle = {0};
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void HAL_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma);
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#else
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#define DATA_TRANSFER(X) PIXELDATA(X)
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#endif
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@ -254,9 +250,7 @@ int display_backlight(int val) {
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// wait for DMA transfer to finish before changing backlight
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// so that we know that panel has current data
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if (backlight_pwm_get() != val && !is_mode_handler()) {
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while (dma_transfer_remaining > 0) {
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__WFI();
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}
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bg_copy_wait();
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}
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#endif
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@ -340,37 +334,6 @@ void display_setup_fmc(void) {
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}
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#ifdef FRAMEBUFFER
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void display_setup_dma(void) {
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// setup DMA for transferring framebuffer to display
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__HAL_RCC_GPDMA1_CLK_ENABLE();
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/* USER CODE END GPDMA1_Init 1 */
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DMA_Handle.Instance = GPDMA1_Channel0;
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DMA_Handle.XferCpltCallback = HAL_DMA_XferCpltCallback;
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DMA_Handle.Init.Request = GPDMA1_REQUEST_HASH_IN;
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DMA_Handle.Init.BlkHWRequest = DMA_BREQ_SINGLE_BURST;
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DMA_Handle.Init.Direction = DMA_MEMORY_TO_MEMORY;
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DMA_Handle.Init.SrcInc = DMA_SINC_INCREMENTED;
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DMA_Handle.Init.DestInc = DMA_DINC_FIXED;
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DMA_Handle.Init.SrcDataWidth = DMA_SRC_DATAWIDTH_BYTE;
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DMA_Handle.Init.DestDataWidth = DMA_DEST_DATAWIDTH_BYTE;
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DMA_Handle.Init.Priority = DMA_LOW_PRIORITY_HIGH_WEIGHT;
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DMA_Handle.Init.SrcBurstLength = 1;
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DMA_Handle.Init.DestBurstLength = 1;
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DMA_Handle.Init.TransferAllocatedPort =
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DMA_SRC_ALLOCATED_PORT1 | DMA_DEST_ALLOCATED_PORT0;
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DMA_Handle.Init.TransferEventMode = DMA_TCEM_BLOCK_TRANSFER;
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DMA_Handle.Init.Mode = DMA_NORMAL;
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HAL_DMA_Init(&DMA_Handle);
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HAL_DMA_ConfigChannelAttributes(&DMA_Handle, DMA_CHANNEL_SEC |
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DMA_CHANNEL_SRC_SEC |
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DMA_CHANNEL_DEST_SEC);
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HAL_NVIC_SetPriority(GPDMA1_Channel0_IRQn, IRQ_PRI_DMA, 0);
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HAL_NVIC_EnableIRQ(GPDMA1_Channel0_IRQn);
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}
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void display_setup_te_interrupt(void) {
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#ifdef DISPLAY_TE_PIN
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EXTI_HandleTypeDef EXTI_Handle = {0};
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@ -454,7 +417,6 @@ void display_init(void) {
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panel_set_window(0, 0, DISPLAY_RESX - 1, DISPLAY_RESY - 1);
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#ifdef FRAMEBUFFER
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display_setup_dma();
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display_setup_te_interrupt();
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#endif
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}
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@ -483,7 +445,6 @@ void display_reinit(void) {
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#endif
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#ifdef FRAMEBUFFER
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display_setup_dma();
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display_setup_te_interrupt();
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#endif
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}
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@ -554,66 +515,25 @@ void display_pixeldata(uint16_t c) {
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void display_sync(void) {}
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void HAL_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma) {
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if (dma_transfer_remaining > 0xFFFF) {
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dma_transfer_remaining -= 0xFFFF;
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dma_data_transferred += 0xFFFF;
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} else {
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dma_data_transferred += dma_transfer_remaining;
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dma_transfer_remaining = 0;
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}
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if (dma_transfer_remaining > 0) {
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uint32_t data_to_send =
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dma_transfer_remaining > 0xFFFF ? 0xFFFF : dma_transfer_remaining;
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if (act_frame_buffer == 0) {
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HAL_DMA_Start_IT(
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hdma,
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(uint32_t) & ((uint8_t *)PhysFrameBuffer0)[dma_data_transferred],
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(uint32_t)DISPLAY_DATA_ADDRESS, data_to_send);
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} else {
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HAL_DMA_Start_IT(
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hdma,
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(uint32_t) & ((uint8_t *)PhysFrameBuffer1)[dma_data_transferred],
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(uint32_t)DISPLAY_DATA_ADDRESS, data_to_send);
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}
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}
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}
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void DISPLAY_TE_INTERRUPT_HANDLER(void) {
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HAL_NVIC_DisableIRQ(DISPLAY_TE_INTERRUPT_NUM);
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uint32_t data_to_send = DISPLAY_RESX * DISPLAY_RESY * 2 > 0xFFFF
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? 0xFFFF
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: DISPLAY_RESX * DISPLAY_RESY * 2;
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if (act_frame_buffer == 1) {
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HAL_DMA_Start_IT(&DMA_Handle, (uint32_t)PhysFrameBuffer1,
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(uint32_t)DISPLAY_DATA_ADDRESS, data_to_send);
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bg_copy_start_const_out_8((uint8_t *)PhysFrameBuffer1,
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(uint8_t *)DISPLAY_DATA_ADDRESS,
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DISPLAY_RESX * DISPLAY_RESY * 2);
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} else {
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HAL_DMA_Start_IT(&DMA_Handle, (uint32_t)PhysFrameBuffer0,
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(uint32_t)DISPLAY_DATA_ADDRESS, data_to_send);
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bg_copy_start_const_out_8((uint8_t *)PhysFrameBuffer0,
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(uint8_t *)DISPLAY_DATA_ADDRESS,
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DISPLAY_RESX * DISPLAY_RESY * 2);
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}
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__HAL_GPIO_EXTI_CLEAR_FLAG(DISPLAY_TE_PIN);
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}
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void GPDMA1_Channel0_IRQHandler(void) {
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if ((DMA_Handle.Instance->CSR & DMA_CSR_TCF) == 0) {
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// error, abort the transfer and allow the next one to start
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dma_data_transferred = 0;
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dma_transfer_remaining = 0;
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}
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HAL_DMA_IRQHandler(&DMA_Handle);
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}
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void display_refresh(void) {
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while (dma_transfer_remaining > 0) {
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__WFI();
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}
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bg_copy_wait();
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if (is_mode_handler()) {
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// sync with the panel refresh
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@ -640,9 +560,6 @@ void display_refresh(void) {
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memcpy(PhysFrameBuffer1, PhysFrameBuffer0, sizeof(PhysFrameBuffer1));
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}
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} else {
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dma_transfer_remaining = DISPLAY_RESX * DISPLAY_RESY * 2;
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dma_data_transferred = 0;
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if (act_frame_buffer == 0) {
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act_frame_buffer = 1;
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@ -729,11 +646,7 @@ void display_efficient_clear(void) {
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memzero(PhysFrameBuffer0, sizeof(PhysFrameBuffer0));
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}
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void display_finish_actions(void) {
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while (dma_transfer_remaining > 0) {
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__WFI();
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}
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}
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void display_finish_actions(void) { bg_copy_wait(); }
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#else
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// NOT FRAMEBUFFER
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97
core/embed/trezorhal/stm32u5/bg_copy.c
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97
core/embed/trezorhal/stm32u5/bg_copy.c
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@ -0,0 +1,97 @@
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#include "bg_copy.h"
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#include "irq.h"
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#include STM32_HAL_H
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#define MAX_DATA_SIZE 0xFFF0
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static volatile uint32_t dma_transfer_remaining = 0;
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static volatile uint32_t dma_data_transferred = 0;
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static void *data_src = NULL;
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static void *data_dst = NULL;
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static DMA_HandleTypeDef DMA_Handle = {0};
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void HAL_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma) {
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if (dma_transfer_remaining > MAX_DATA_SIZE) {
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dma_transfer_remaining -= MAX_DATA_SIZE;
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dma_data_transferred += MAX_DATA_SIZE;
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} else {
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dma_data_transferred += dma_transfer_remaining;
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dma_transfer_remaining = 0;
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}
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if (dma_transfer_remaining > 0) {
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uint32_t data_to_send = dma_transfer_remaining > MAX_DATA_SIZE
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? MAX_DATA_SIZE
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: dma_transfer_remaining;
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HAL_DMA_Start_IT(hdma,
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(uint32_t) & ((uint8_t *)data_src)[dma_data_transferred],
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(uint32_t)data_dst, data_to_send);
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}
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}
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void GPDMA1_Channel0_IRQHandler(void) {
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if ((DMA_Handle.Instance->CSR & DMA_CSR_TCF) == 0) {
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// error, abort the transfer and allow the next one to start
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dma_data_transferred = 0;
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dma_transfer_remaining = 0;
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}
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HAL_DMA_IRQHandler(&DMA_Handle);
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if (dma_transfer_remaining == 0) {
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// transfer finished, disable the channel
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HAL_DMA_DeInit(&DMA_Handle);
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HAL_NVIC_DisableIRQ(GPDMA1_Channel0_IRQn);
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data_src = NULL;
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data_dst = NULL;
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}
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}
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bool bg_copy_pending(void) { return dma_transfer_remaining > 0; }
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void bg_copy_wait(void) {
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while (dma_transfer_remaining > 0) {
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__WFI();
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}
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}
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void bg_copy_start_const_out_8(const uint8_t *src, uint8_t *dst, size_t size) {
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uint32_t data_to_send = size > MAX_DATA_SIZE ? MAX_DATA_SIZE : size;
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dma_transfer_remaining = size;
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dma_data_transferred = 0;
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data_src = (void *)src;
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data_dst = (void *)dst;
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// setup DMA for data copy to constant output address
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__HAL_RCC_GPDMA1_CLK_ENABLE();
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/* USER CODE END GPDMA1_Init 1 */
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DMA_Handle.Instance = GPDMA1_Channel0;
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DMA_Handle.XferCpltCallback = HAL_DMA_XferCpltCallback;
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DMA_Handle.Init.Request = GPDMA1_REQUEST_HASH_IN;
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DMA_Handle.Init.BlkHWRequest = DMA_BREQ_SINGLE_BURST;
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DMA_Handle.Init.Direction = DMA_MEMORY_TO_MEMORY;
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DMA_Handle.Init.SrcInc = DMA_SINC_INCREMENTED;
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DMA_Handle.Init.DestInc = DMA_DINC_FIXED;
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DMA_Handle.Init.SrcDataWidth = DMA_SRC_DATAWIDTH_BYTE;
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DMA_Handle.Init.DestDataWidth = DMA_DEST_DATAWIDTH_BYTE;
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DMA_Handle.Init.Priority = DMA_LOW_PRIORITY_HIGH_WEIGHT;
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DMA_Handle.Init.SrcBurstLength = 1;
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DMA_Handle.Init.DestBurstLength = 1;
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DMA_Handle.Init.TransferAllocatedPort =
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DMA_SRC_ALLOCATED_PORT1 | DMA_DEST_ALLOCATED_PORT0;
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DMA_Handle.Init.TransferEventMode = DMA_TCEM_BLOCK_TRANSFER;
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DMA_Handle.Init.Mode = DMA_NORMAL;
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HAL_DMA_Init(&DMA_Handle);
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HAL_DMA_ConfigChannelAttributes(&DMA_Handle, DMA_CHANNEL_SEC |
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DMA_CHANNEL_SRC_SEC |
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DMA_CHANNEL_DEST_SEC);
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HAL_NVIC_SetPriority(GPDMA1_Channel0_IRQn, IRQ_PRI_DMA, 0);
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HAL_NVIC_EnableIRQ(GPDMA1_Channel0_IRQn);
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HAL_DMA_Start_IT(&DMA_Handle, (uint32_t)src, (uint32_t)dst, data_to_send);
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}
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@ -41,6 +41,7 @@ def configure(
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"embed/models/model_T3T1_layout.c",
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]
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sources += [f"embed/trezorhal/stm32u5/displays/{display}"]
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sources += [f"embed/trezorhal/stm32u5/bg_copy.c"]
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sources += ["embed/trezorhal/stm32u5/backlight_pwm.c"]
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sources += [
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"embed/trezorhal/stm32u5/displays/panels/lx154a2422.c",
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