arno/trezor-firmware
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feat(core): add support for SBU on T3W1

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This commit is contained in:
tychovrahe 2024-11-15 12:02:44 +01:00 committed by TychoVrahe
parent 40c5426717
commit c5b3dd72b9
9 changed files with 51 additions and 12 deletions
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2
core/SConscript.firmware
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@ -28,7 +28,7 @@ FEATURE_FLAGS = {
"AES_GCM": BENCHMARK or THP, "AES_GCM": BENCHMARK or THP,
} }
FEATURES_WANTED = ["input", "sbu", "sd_card", "rgb_led", "dma2d", "consumption_mask", "usb" ,"optiga", "haptic"] FEATURES_WANTED = ["input", "sd_card", "rgb_led", "dma2d", "consumption_mask", "usb" ,"optiga", "haptic"]
if DISABLE_OPTIGA and PYOPT == '0': if DISABLE_OPTIGA and PYOPT == '0':
FEATURES_WANTED.remove("optiga") FEATURES_WANTED.remove("optiga")

2
core/SConscript.kernel
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@ -23,7 +23,7 @@ FEATURE_FLAGS = {
"AES_GCM": False, "AES_GCM": False,
} }
FEATURES_WANTED = ["input", "sbu", "sd_card", "rgb_led", "dma2d", "consumption_mask", "usb" ,"optiga", "haptic"] FEATURES_WANTED = ["input", "sd_card", "rgb_led", "dma2d", "consumption_mask", "usb" ,"optiga", "haptic"]
if DISABLE_OPTIGA and PYOPT == '0': if DISABLE_OPTIGA and PYOPT == '0':
FEATURES_WANTED.remove("optiga") FEATURES_WANTED.remove("optiga")

2
core/SConscript.unix
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@ -20,7 +20,7 @@ if BENCHMARK and PYOPT != '0':
print("BENCHMARK=1 works only with PYOPT=0.") print("BENCHMARK=1 works only with PYOPT=0.")
exit(1) exit(1)
FEATURES_WANTED = ["input", "sd_card", "dma2d", "optiga", "sbu"] FEATURES_WANTED = ["input", "sd_card", "dma2d", "optiga"]
if not models.has_emulator(TREZOR_MODEL): if not models.has_emulator(TREZOR_MODEL):
# skip unix build # skip unix build

22
core/embed/io/sbu/stm32/sbu.c
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@ -24,23 +24,27 @@
#if KERNEL_MODE #if KERNEL_MODE
void sbu_init(void) { void sbu_init(void) {
GPIO_InitTypeDef GPIO_InitStructure = {0}; SBU_1_CLK_ENA();
SBU_2_CLK_ENA();
// SBU1/PA2 SBU2/PA3 HAL_GPIO_WritePin(SBU_1_PORT, SBU_1_PIN, GPIO_PIN_RESET);
GPIO_InitStructure.Pin = GPIO_PIN_2 | GPIO_PIN_3; HAL_GPIO_WritePin(SBU_2_PORT, SBU_2_PIN, GPIO_PIN_RESET);
GPIO_InitTypeDef GPIO_InitStructure = {0};
GPIO_InitStructure.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStructure.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStructure.Pull = GPIO_NOPULL; GPIO_InitStructure.Pull = GPIO_NOPULL;
GPIO_InitStructure.Speed = GPIO_SPEED_FREQ_VERY_HIGH; GPIO_InitStructure.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(GPIOA, &GPIO_InitStructure);
HAL_GPIO_WritePin(GPIOA, GPIO_PIN_2, GPIO_PIN_RESET); GPIO_InitStructure.Pin = SBU_1_PIN;
HAL_GPIO_WritePin(GPIOA, GPIO_PIN_3, GPIO_PIN_RESET); HAL_GPIO_Init(SBU_1_PORT, &GPIO_InitStructure);
GPIO_InitStructure.Pin = SBU_2_PIN;
HAL_GPIO_Init(SBU_2_PORT, &GPIO_InitStructure);
} }
void sbu_set(secbool sbu1, secbool sbu2) { void sbu_set(secbool sbu1, secbool sbu2) {
HAL_GPIO_WritePin(GPIOA, GPIO_PIN_2, HAL_GPIO_WritePin(SBU_1_PORT, SBU_1_PIN,
sbu1 == sectrue ? GPIO_PIN_SET : GPIO_PIN_RESET); sbu1 == sectrue ? GPIO_PIN_SET : GPIO_PIN_RESET);
HAL_GPIO_WritePin(GPIOA, GPIO_PIN_3, HAL_GPIO_WritePin(SBU_2_PORT, SBU_2_PIN,
sbu2 == sectrue ? GPIO_PIN_SET : GPIO_PIN_RESET); sbu2 == sectrue ? GPIO_PIN_SET : GPIO_PIN_RESET);
} }

7
core/embed/models/T2B1/boards/trezor_r_v10.h
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@ -52,4 +52,11 @@
#define OPTIGA_RST_PIN GPIO_PIN_9 #define OPTIGA_RST_PIN GPIO_PIN_9
#define OPTIGA_RST_CLK_EN __HAL_RCC_GPIOD_CLK_ENABLE #define OPTIGA_RST_CLK_EN __HAL_RCC_GPIOD_CLK_ENABLE
#define SBU_1_PIN GPIO_PIN_2
#define SBU_1_PORT GPIOA
#define SBU_1_CLK_ENA __HAL_RCC_GPIOA_CLK_ENABLE
#define SBU_2_PIN GPIO_PIN_3
#define SBU_2_PORT GPIOA
#define SBU_2_CLK_ENA __HAL_RCC_GPIOA_CLK_ENABLE
#endif //_TREZOR_R_V10_H #endif //_TREZOR_R_V10_H

7
core/embed/models/T2T1/boards/trezor_t.h
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@ -52,4 +52,11 @@
#define SD_ENABLE_PORT GPIOC #define SD_ENABLE_PORT GPIOC
#define SD_ENABLE_PIN GPIO_PIN_0 #define SD_ENABLE_PIN GPIO_PIN_0
#define SBU_1_PIN GPIO_PIN_2
#define SBU_1_PORT GPIOA
#define SBU_1_CLK_ENA __HAL_RCC_GPIOA_CLK_ENABLE
#define SBU_2_PIN GPIO_PIN_3
#define SBU_2_PORT GPIOA
#define SBU_2_CLK_ENA __HAL_RCC_GPIOA_CLK_ENABLE
#endif //_TREZOR_T_H #endif //_TREZOR_T_H

7
core/embed/models/T3B1/boards/trezor_t3b1_revB.h
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@ -54,4 +54,11 @@
#define OPTIGA_RST_PIN GPIO_PIN_13 #define OPTIGA_RST_PIN GPIO_PIN_13
#define OPTIGA_RST_CLK_EN __HAL_RCC_GPIOE_CLK_ENABLE #define OPTIGA_RST_CLK_EN __HAL_RCC_GPIOE_CLK_ENABLE
#define SBU_1_PIN GPIO_PIN_2
#define SBU_1_PORT GPIOA
#define SBU_1_CLK_ENA __HAL_RCC_GPIOA_CLK_ENABLE
#define SBU_2_PIN GPIO_PIN_3
#define SBU_2_PORT GPIOA
#define SBU_2_CLK_ENA __HAL_RCC_GPIOA_CLK_ENABLE
#endif //_TREZOR_T3B1_H #endif //_TREZOR_T3B1_H

7
core/embed/models/T3T1/boards/trezor_t3t1_revE.h
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@ -104,4 +104,11 @@
#define SD_ENABLE_PORT GPIOC #define SD_ENABLE_PORT GPIOC
#define SD_ENABLE_PIN GPIO_PIN_3 #define SD_ENABLE_PIN GPIO_PIN_3
#define SBU_1_PIN GPIO_PIN_2
#define SBU_1_PORT GPIOA
#define SBU_1_CLK_ENA __HAL_RCC_GPIOA_CLK_ENABLE
#define SBU_2_PIN GPIO_PIN_3
#define SBU_2_PORT GPIOA
#define SBU_2_CLK_ENA __HAL_RCC_GPIOA_CLK_ENABLE
#endif //_TREZOR_T_H #endif //_TREZOR_T_H

7
core/embed/models/T3W1/boards/trezor_t3w1_revA.h
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@ -101,4 +101,11 @@
#define TOUCH_INT_PORT GPIOC #define TOUCH_INT_PORT GPIOC
#define TOUCH_INT_PIN GPIO_PIN_3 #define TOUCH_INT_PIN GPIO_PIN_3
#define SBU_1_PIN GPIO_PIN_8
#define SBU_1_PORT GPIOC
#define SBU_1_CLK_ENA __HAL_RCC_GPIOC_CLK_ENABLE
#define SBU_2_PIN GPIO_PIN_9
#define SBU_2_PORT GPIOC
#define SBU_2_CLK_ENA __HAL_RCC_GPIOC_CLK_ENABLE
#endif // TREZOR_T3W1_REVA_H_ #endif // TREZOR_T3W1_REVA_H_