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fix(core): fix MPU configuration on F4 - kernel SRAM

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tychovrahe 2024-11-13 16:33:36 +01:00 committed by TychoVrahe
parent 1c7db05aef
commit c50dd96783
2 changed files with 3 additions and 3 deletions
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2
core/embed/trezorhal/stm32f4/linker/firmware.ld
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@ -6,7 +6,7 @@ MEMORY {
FLASH (rx) : ORIGIN = FIRMWARE_P1_START, LENGTH = FIRMWARE_P1_MAXSIZE FLASH (rx) : ORIGIN = FIRMWARE_P1_START, LENGTH = FIRMWARE_P1_MAXSIZE
FLASH2 (r) : ORIGIN = FIRMWARE_P2_START, LENGTH = FIRMWARE_P2_MAXSIZE FLASH2 (r) : ORIGIN = FIRMWARE_P2_START, LENGTH = FIRMWARE_P2_MAXSIZE
CCMRAM (wal) : ORIGIN = MCU_CCMRAM + KERNEL_STACK_SIZE, LENGTH = MCU_CCMRAM_SIZE - KERNEL_CCMRAM_SIZE - KERNEL_FRAMEBUFFER_SIZE - KERNEL_STACK_SIZE CCMRAM (wal) : ORIGIN = MCU_CCMRAM + KERNEL_STACK_SIZE, LENGTH = MCU_CCMRAM_SIZE - KERNEL_CCMRAM_SIZE - KERNEL_FRAMEBUFFER_SIZE - KERNEL_STACK_SIZE
SRAM (wal) : ORIGIN = MCU_SRAM, LENGTH = MCU_SRAM_SIZE - KERNEL_SRAM_SIZE SRAM (wal) : ORIGIN = MCU_SRAM + KERNEL_SRAM_SIZE, LENGTH = MCU_SRAM_SIZE - KERNEL_SRAM_SIZE
} }
main_stack_base = ORIGIN(SRAM) + SIZEOF(.stack); /* 8-byte aligned full descending stack */ main_stack_base = ORIGIN(SRAM) + SIZEOF(.stack); /* 8-byte aligned full descending stack */

4
core/embed/trezorhal/stm32f4/linker/kernel.ld
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@ -8,7 +8,7 @@ MEMORY {
CCMRAM_FB (wal) : ORIGIN = MCU_CCMRAM + MCU_CCMRAM_SIZE - KERNEL_CCMRAM_SIZE - KERNEL_FRAMEBUFFER_SIZE, LENGTH = KERNEL_FRAMEBUFFER_SIZE CCMRAM_FB (wal) : ORIGIN = MCU_CCMRAM + MCU_CCMRAM_SIZE - KERNEL_CCMRAM_SIZE - KERNEL_FRAMEBUFFER_SIZE, LENGTH = KERNEL_FRAMEBUFFER_SIZE
CCMRAM (wal) : ORIGIN = MCU_CCMRAM + MCU_CCMRAM_SIZE - KERNEL_CCMRAM_SIZE, LENGTH = KERNEL_CCMRAM_SIZE - BOOTARGS_SIZE CCMRAM (wal) : ORIGIN = MCU_CCMRAM + MCU_CCMRAM_SIZE - KERNEL_CCMRAM_SIZE, LENGTH = KERNEL_CCMRAM_SIZE - BOOTARGS_SIZE
BOOT_ARGS (wal) : ORIGIN = MCU_CCMRAM + MCU_CCMRAM_SIZE - BOOTARGS_SIZE, LENGTH = BOOTARGS_SIZE BOOT_ARGS (wal) : ORIGIN = MCU_CCMRAM + MCU_CCMRAM_SIZE - BOOTARGS_SIZE, LENGTH = BOOTARGS_SIZE
SRAM (wal) : ORIGIN = MCU_SRAM + MCU_SRAM_SIZE - KERNEL_SRAM_SIZE, LENGTH = KERNEL_SRAM_SIZE SRAM (wal) : ORIGIN = MCU_SRAM, LENGTH = KERNEL_SRAM_SIZE
} }
main_stack_base = ORIGIN(CCMRAM_STACK) + SIZEOF(.stack); /* 8-byte aligned full descending stack */ main_stack_base = ORIGIN(CCMRAM_STACK) + SIZEOF(.stack); /* 8-byte aligned full descending stack */
@ -47,7 +47,7 @@ _shutdown_clear_ram_1_end = MCU_SRAM + MCU_SRAM_SIZE;
/* used by applet cleaning code */ /* used by applet cleaning code */
_coreapp_clear_ram_0_start = MCU_CCMRAM + KERNEL_STACK_SIZE; _coreapp_clear_ram_0_start = MCU_CCMRAM + KERNEL_STACK_SIZE;
_coreapp_clear_ram_0_size = MCU_CCMRAM_SIZE - KERNEL_CCMRAM_SIZE - KERNEL_FRAMEBUFFER_SIZE - KERNEL_STACK_SIZE; _coreapp_clear_ram_0_size = MCU_CCMRAM_SIZE - KERNEL_CCMRAM_SIZE - KERNEL_FRAMEBUFFER_SIZE - KERNEL_STACK_SIZE;
_coreapp_clear_ram_1_start = MCU_SRAM; _coreapp_clear_ram_1_start = MCU_SRAM + KERNEL_SRAM_SIZE;
_coreapp_clear_ram_1_size = MCU_SRAM_SIZE - KERNEL_SRAM_SIZE; _coreapp_clear_ram_1_size = MCU_SRAM_SIZE - KERNEL_SRAM_SIZE;