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refactor(core): refactor rfal DSI to avoid conflicts with STM display serial interface [no changelog]

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This commit is contained in:
kopecdav 2025-01-29 12:15:29 +01:00
parent 28b4f018a7
commit c0a552212d
5 changed files with 81 additions and 78 deletions
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23
core/embed/io/nfc/rfal/include/rfal_isoDep.h
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@ -382,15 +382,16 @@ typedef union { /* PRQA S 0750 # MISRA 19.2 - Both members of the union will
/*! ISO-DEP device Info */ /*! ISO-DEP device Info */
typedef struct { typedef struct {
uint8_t FWI; /*!< Frame Waiting Integer */ uint8_t FWI; /*!< Frame Waiting Integer */
uint32_t FWT; /*!< Frame Waiting Time (1/fc) */ uint32_t FWT; /*!< Frame Waiting Time (1/fc) */
uint32_t dFWT; /*!< Delta Frame Waiting Time (1/fc) */ uint32_t dFWT; /*!< Delta Frame Waiting Time (1/fc) */
uint32_t SFGI; /*!< Start-up Frame Guard time Integer */ uint32_t SFGI; /*!< Start-up Frame Guard time Integer */
uint32_t SFGT; /*!< Start-up Frame Guard Time (ms) */ uint32_t SFGT; /*!< Start-up Frame Guard Time (ms) */
uint8_t FSxI; /*!< Frame Size Device/Card Integer (FSDI or FSCI) */ uint8_t FSxI; /*!< Frame Size Device/Card Integer (FSDI or FSCI) */
uint16_t FSx; /*!< Frame Size Device/Card (FSD or FSC) */ uint16_t FSx; /*!< Frame Size Device/Card (FSD or FSC) */
uint32_t MBL; /*!< Maximum Buffer Length (optional for NFC-B) */ uint32_t MBL; /*!< Maximum Buffer Length (optional for NFC-B) */
rfalBitRate DSI; /*!< Bit Rate coding from Listener (PICC) to Poller (PCD) */ rfalBitRate
DSI_dep; /*!< Bit Rate coding from Listener (PICC) to Poller (PCD) */
rfalBitRate DRI; /*!< Bit Rate coding from Poller (PCD) to Listener (PICC) */ rfalBitRate DRI; /*!< Bit Rate coding from Poller (PCD) to Listener (PICC) */
uint8_t DID; /*!< Device ID */ uint8_t DID; /*!< Device ID */
uint8_t NAD; /*!< Node ADdress */ uint8_t NAD; /*!< Node ADdress */
@ -803,7 +804,7 @@ ReturnCode rfalIsoDepRATS(rfalIsoDepFSxI FSDI, uint8_t DID, rfalIsoDepAts *ats,
* \return RFAL_ERR_NONE : No error, PPS Response received * \return RFAL_ERR_NONE : No error, PPS Response received
***************************************************************************** *****************************************************************************
*/ */
ReturnCode rfalIsoDepPPS(uint8_t DID, rfalBitRate DSI, rfalBitRate DRI, ReturnCode rfalIsoDepPPS(uint8_t DID, rfalBitRate DSI_dep, rfalBitRate DRI,
rfalIsoDepPpsRes *ppsRes); rfalIsoDepPpsRes *ppsRes);
/*! /*!
@ -838,7 +839,7 @@ ReturnCode rfalIsoDepPPS(uint8_t DID, rfalBitRate DSI, rfalBitRate DRI,
***************************************************************************** *****************************************************************************
*/ */
ReturnCode rfalIsoDepATTRIB(const uint8_t *nfcid0, uint8_t PARAM1, ReturnCode rfalIsoDepATTRIB(const uint8_t *nfcid0, uint8_t PARAM1,
rfalBitRate DSI, rfalBitRate DRI, rfalBitRate DSI_dep, rfalBitRate DRI,
rfalIsoDepFSxI FSDI, uint8_t PARAM3, uint8_t DID, rfalIsoDepFSxI FSDI, uint8_t PARAM3, uint8_t DID,
const uint8_t *HLInfo, uint8_t HLInfoLen, const uint8_t *HLInfo, uint8_t HLInfoLen,
uint32_t fwt, rfalIsoDepAttribRes *attribRes, uint32_t fwt, rfalIsoDepAttribRes *attribRes,

20
core/embed/io/nfc/rfal/include/rfal_nfcDep.h
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@ -406,16 +406,16 @@ typedef union { /* PRQA S 0750 # MISRA 19.2 - Both members of the union will
/*! NFC-DEP device Info */ /*! NFC-DEP device Info */
typedef struct { typedef struct {
uint8_t GBLen; /*!< General Bytes length */ uint8_t GBLen; /*!< General Bytes length */
uint8_t WT; /*!< WT to be used (ignored in Listen Mode) */ uint8_t WT; /*!< WT to be used (ignored in Listen Mode) */
uint32_t FWT; /*!< FWT to be used (1/fc)(ignored Listen Mode) */ uint32_t FWT; /*!< FWT to be used (1/fc)(ignored Listen Mode) */
uint32_t dFWT; /*!< Delta FWT to be used (1/fc) */ uint32_t dFWT; /*!< Delta FWT to be used (1/fc) */
uint8_t LR; /*!< Length Reduction coding the max payload */ uint8_t LR; /*!< Length Reduction coding the max payload */
uint16_t FS; /*!< Frame Size */ uint16_t FS; /*!< Frame Size */
rfalBitRate DSI; /*!< Bit Rate coding from Initiator to Target */ rfalBitRate DSI_dep; /*!< Bit Rate coding from Initiator to Target */
rfalBitRate DRI; /*!< Bit Rate coding from Target to Initiator */ rfalBitRate DRI; /*!< Bit Rate coding from Target to Initiator */
uint8_t DID; /*!< Device ID (RFAL_NFCDEP_DID_NO if no DID) */ uint8_t DID; /*!< Device ID (RFAL_NFCDEP_DID_NO if no DID) */
uint8_t NAD; /*!< Node ADdress (RFAL_NFCDEP_NAD_NO if no NAD)*/ uint8_t NAD; /*!< Node ADdress (RFAL_NFCDEP_NAD_NO if no NAD)*/
} rfalNfcDepInfo; } rfalNfcDepInfo;
/*! NFC-DEP Device structure */ /*! NFC-DEP Device structure */

77
core/embed/io/nfc/rfal/source/rfal_isoDep.c
View File

@ -273,7 +273,7 @@
#define RFAL_ISODEP_CMD_ATTRIB \ #define RFAL_ISODEP_CMD_ATTRIB \
(0x1DU) /*!< ATTRIB command Digital 1.1 14.6.1 */ (0x1DU) /*!< ATTRIB command Digital 1.1 14.6.1 */
#define RFAL_ISODEP_ATTRIB_PARAM2_DSI_SHIFT \ #define RFAL_ISODEP_ATTRIB_PARAM2_DSI_SHIFT \
(6U) /*!< ATTRIB PARAM2 DSI shift Digital 1.1 14.6.1 */ (6U) /*!< ATTRIB PARAM2 DSI_dep shift Digital 1.1 14.6.1 */
#define RFAL_ISODEP_ATTRIB_PARAM2_DRI_SHIFT \ #define RFAL_ISODEP_ATTRIB_PARAM2_DRI_SHIFT \
(4U) /*!< ATTRIB PARAM2 DRI shift Digital 1.1 14.6.1 */ (4U) /*!< ATTRIB PARAM2 DRI shift Digital 1.1 14.6.1 */
#define RFAL_ISODEP_ATTRIB_PARAM2_DXI_MASK \ #define RFAL_ISODEP_ATTRIB_PARAM2_DXI_MASK \
@ -340,11 +340,11 @@
#define RFAL_ISODEP_PPS1_DRI_MASK \ #define RFAL_ISODEP_PPS1_DRI_MASK \
(0x03U) /*!< PPS1 byte DRI mask bits */ (0x03U) /*!< PPS1 byte DRI mask bits */
#define RFAL_ISODEP_PPS1_DSI_MASK \ #define RFAL_ISODEP_PPS1_DSI_MASK \
(0x0CU) /*!< PPS1 byte DSI mask bits */ (0x0CU) /*!< PPS1 byte DSI_dep mask bits */
#define RFAL_ISODEP_PPS1_DSI_SHIFT \ #define RFAL_ISODEP_PPS1_DSI_SHIFT \
(2U) /*!< PPS1 byte DSI shift */ (2U) /*!< PPS1 byte DSI_dep shift */
#define RFAL_ISODEP_PPS1_DxI_MASK \ #define RFAL_ISODEP_PPS1_DxI_MASK \
(0x03U) /*!< PPS1 byte DSI/DRS mask bits */ (0x03U) /*!< PPS1 byte DSI_dep/DRS mask bits */
/*! Delta Time for polling during Activation (ATS) : 20ms Digital 1.0 11.7.1.1 & /*! Delta Time for polling during Activation (ATS) : 20ms Digital 1.0 11.7.1.1 &
* A.7 */ * A.7 */
@ -661,14 +661,14 @@ static uint32_t rfalIsoDepSFGI2SFGT(uint8_t sfgi);
static ReturnCode rfalIsoDepStartRATS(rfalIsoDepFSxI FSDI, uint8_t DID, static ReturnCode rfalIsoDepStartRATS(rfalIsoDepFSxI FSDI, uint8_t DID,
rfalIsoDepAts *ats, uint8_t *atsLen); rfalIsoDepAts *ats, uint8_t *atsLen);
static ReturnCode rfalIsoDepGetRATSStatus(void); static ReturnCode rfalIsoDepGetRATSStatus(void);
static ReturnCode rfalIsoDepStartPPS(uint8_t DID, rfalBitRate DSI, static ReturnCode rfalIsoDepStartPPS(uint8_t DID, rfalBitRate DSI_dep,
rfalBitRate DRI, rfalIsoDepPpsRes *ppsRes); rfalBitRate DRI, rfalIsoDepPpsRes *ppsRes);
static ReturnCode rfalIsoDepGetPPSSTatus(void); static ReturnCode rfalIsoDepGetPPSSTatus(void);
#endif /* RFAL_FEATURE_NFCA */ #endif /* RFAL_FEATURE_NFCA */
#if RFAL_FEATURE_NFCB #if RFAL_FEATURE_NFCB
static ReturnCode rfalIsoDepStartATTRIB(const uint8_t *nfcid0, uint8_t PARAM1, static ReturnCode rfalIsoDepStartATTRIB(const uint8_t *nfcid0, uint8_t PARAM1,
rfalBitRate DSI, rfalBitRate DRI, rfalBitRate DSI_dep, rfalBitRate DRI,
rfalIsoDepFSxI FSDI, uint8_t PARAM3, rfalIsoDepFSxI FSDI, uint8_t PARAM3,
uint8_t DID, const uint8_t *HLInfo, uint8_t DID, const uint8_t *HLInfo,
uint8_t HLInfoLen, uint32_t fwt, uint8_t HLInfoLen, uint32_t fwt,
@ -1522,7 +1522,7 @@ ReturnCode rfalIsoDepListenStartActivation(
actParam.isoDepDev->info.FSx = gIsoDep.fsx; actParam.isoDepDev->info.FSx = gIsoDep.fsx;
actParam.isoDepDev->info.FWT = gIsoDep.fwt; actParam.isoDepDev->info.FWT = gIsoDep.fwt;
actParam.isoDepDev->info.dFWT = 0; actParam.isoDepDev->info.dFWT = 0;
actParam.isoDepDev->info.DSI = gIsoDep.txBR; actParam.isoDepDev->info.DSI_dep = gIsoDep.txBR;
actParam.isoDepDev->info.DRI = gIsoDep.rxBR; actParam.isoDepDev->info.DRI = gIsoDep.rxBR;
} }
@ -1665,11 +1665,11 @@ ReturnCode rfalIsoDepListenGetActivationStatus(void) {
if (dri != RFAL_BR_KEEP) { if (dri != RFAL_BR_KEEP) {
rfalSetBitRate(dsi, dri); rfalSetBitRate(dsi, dri);
gIsoDep.txBR = dsi; /* DSI codes the divisor from PICC to PCD */ gIsoDep.txBR = dsi; /* DSI_dep codes the divisor from PICC to PCD */
gIsoDep.rxBR = dri; /* DRI codes the divisor from PCD to PICC */ gIsoDep.rxBR = dri; /* DRI codes the divisor from PCD to PICC */
if (gIsoDep.actvParam.isoDepDev != NULL) { if (gIsoDep.actvParam.isoDepDev != NULL) {
gIsoDep.actvParam.isoDepDev->info.DSI = dsi; gIsoDep.actvParam.isoDepDev->info.DSI_dep = dsi;
gIsoDep.actvParam.isoDepDev->info.DRI = dri; gIsoDep.actvParam.isoDepDev->info.DRI = dri;
} }
} }
@ -2226,12 +2226,12 @@ ReturnCode rfalIsoDepRATS(rfalIsoDepFSxI FSDI, uint8_t DID, rfalIsoDepAts *ats,
} }
/*******************************************************************************/ /*******************************************************************************/
static ReturnCode rfalIsoDepStartPPS(uint8_t DID, rfalBitRate DSI, static ReturnCode rfalIsoDepStartPPS(uint8_t DID, rfalBitRate DSI_dep,
rfalBitRate DRI, rfalBitRate DRI,
rfalIsoDepPpsRes *ppsRes) { rfalIsoDepPpsRes *ppsRes) {
rfalTransceiveContext ctx; rfalTransceiveContext ctx;
if ((ppsRes == NULL) || (DSI > RFAL_BR_848) || (DRI > RFAL_BR_848) || if ((ppsRes == NULL) || (DSI_dep > RFAL_BR_848) || (DRI > RFAL_BR_848) ||
((DID > RFAL_ISODEP_DID_MAX) && (DID != RFAL_ISODEP_NO_DID))) { ((DID > RFAL_ISODEP_DID_MAX) && (DID != RFAL_ISODEP_NO_DID))) {
return RFAL_ERR_PARAM; return RFAL_ERR_PARAM;
} }
@ -2245,7 +2245,7 @@ static ReturnCode rfalIsoDepStartPPS(uint8_t DID, rfalBitRate DSI,
gIsoDep.actv.ppsReq.PPS0 = RFAL_ISODEP_PPS_PPS0_PPS1_PRESENT; gIsoDep.actv.ppsReq.PPS0 = RFAL_ISODEP_PPS_PPS0_PPS1_PRESENT;
gIsoDep.actv.ppsReq.PPS1 = gIsoDep.actv.ppsReq.PPS1 =
(RFAL_ISODEP_PPS_PPS1 | (RFAL_ISODEP_PPS_PPS1 |
((((uint8_t)DSI << RFAL_ISODEP_PPS_PPS1_DSI_SHIFT) | (uint8_t)DRI) & ((((uint8_t)DSI_dep << RFAL_ISODEP_PPS_PPS1_DSI_SHIFT) | (uint8_t)DRI) &
RFAL_ISODEP_PPS_PPS1_DXI_MASK)); RFAL_ISODEP_PPS_PPS1_DXI_MASK));
rfalCreateByteFlagsTxRxContext( rfalCreateByteFlagsTxRxContext(
@ -2273,11 +2273,11 @@ static ReturnCode rfalIsoDepGetPPSSTatus(void) {
} }
/*******************************************************************************/ /*******************************************************************************/
ReturnCode rfalIsoDepPPS(uint8_t DID, rfalBitRate DSI, rfalBitRate DRI, ReturnCode rfalIsoDepPPS(uint8_t DID, rfalBitRate DSI_dep, rfalBitRate DRI,
rfalIsoDepPpsRes *ppsRes) { rfalIsoDepPpsRes *ppsRes) {
ReturnCode ret; ReturnCode ret;
RFAL_EXIT_ON_ERR(ret, rfalIsoDepStartPPS(DID, DSI, DRI, ppsRes)); RFAL_EXIT_ON_ERR(ret, rfalIsoDepStartPPS(DID, DSI_dep, DRI, ppsRes));
rfalRunBlocking(ret, rfalIsoDepGetPPSSTatus()); rfalRunBlocking(ret, rfalIsoDepGetPPSSTatus());
return ret; return ret;
@ -2288,7 +2288,7 @@ ReturnCode rfalIsoDepPPS(uint8_t DID, rfalBitRate DSI, rfalBitRate DRI,
#if RFAL_FEATURE_NFCB #if RFAL_FEATURE_NFCB
static ReturnCode rfalIsoDepStartATTRIB(const uint8_t *nfcid0, uint8_t PARAM1, static ReturnCode rfalIsoDepStartATTRIB(const uint8_t *nfcid0, uint8_t PARAM1,
rfalBitRate DSI, rfalBitRate DRI, rfalBitRate DSI_dep, rfalBitRate DRI,
rfalIsoDepFSxI FSDI, uint8_t PARAM3, rfalIsoDepFSxI FSDI, uint8_t PARAM3,
uint8_t DID, const uint8_t *HLInfo, uint8_t DID, const uint8_t *HLInfo,
uint8_t HLInfoLen, uint32_t fwt, uint8_t HLInfoLen, uint32_t fwt,
@ -2296,8 +2296,8 @@ static ReturnCode rfalIsoDepStartATTRIB(const uint8_t *nfcid0, uint8_t PARAM1,
uint8_t *attribResLen) { uint8_t *attribResLen) {
rfalTransceiveContext ctx; rfalTransceiveContext ctx;
if ((attribRes == NULL) || (attribResLen == NULL) || (DSI > RFAL_BR_848) || if ((attribRes == NULL) || (attribResLen == NULL) ||
(DRI > RFAL_BR_848) || (DSI_dep > RFAL_BR_848) || (DRI > RFAL_BR_848) ||
((DID > RFAL_ISODEP_DID_MAX) && (DID != RFAL_ISODEP_NO_DID))) { ((DID > RFAL_ISODEP_DID_MAX) && (DID != RFAL_ISODEP_NO_DID))) {
return RFAL_ERR_NONE; return RFAL_ERR_NONE;
} }
@ -2311,7 +2311,7 @@ static ReturnCode rfalIsoDepStartATTRIB(const uint8_t *nfcid0, uint8_t PARAM1,
gIsoDep.actv.attribReq.cmd = RFAL_ISODEP_CMD_ATTRIB; gIsoDep.actv.attribReq.cmd = RFAL_ISODEP_CMD_ATTRIB;
gIsoDep.actv.attribReq.Param.PARAM1 = PARAM1; gIsoDep.actv.attribReq.Param.PARAM1 = PARAM1;
gIsoDep.actv.attribReq.Param.PARAM2 = gIsoDep.actv.attribReq.Param.PARAM2 =
(((((uint8_t)DSI << RFAL_ISODEP_ATTRIB_PARAM2_DSI_SHIFT) | (((((uint8_t)DSI_dep << RFAL_ISODEP_ATTRIB_PARAM2_DSI_SHIFT) |
((uint8_t)DRI << RFAL_ISODEP_ATTRIB_PARAM2_DRI_SHIFT)) & ((uint8_t)DRI << RFAL_ISODEP_ATTRIB_PARAM2_DRI_SHIFT)) &
RFAL_ISODEP_ATTRIB_PARAM2_DXI_MASK) | RFAL_ISODEP_ATTRIB_PARAM2_DXI_MASK) |
((uint8_t)FSDI & RFAL_ISODEP_ATTRIB_PARAM2_FSDI_MASK)); ((uint8_t)FSDI & RFAL_ISODEP_ATTRIB_PARAM2_FSDI_MASK));
@ -2362,16 +2362,16 @@ static ReturnCode rfalIsoDepGetATTRIBStatus(void) {
/*******************************************************************************/ /*******************************************************************************/
ReturnCode rfalIsoDepATTRIB(const uint8_t *nfcid0, uint8_t PARAM1, ReturnCode rfalIsoDepATTRIB(const uint8_t *nfcid0, uint8_t PARAM1,
rfalBitRate DSI, rfalBitRate DRI, rfalBitRate DSI_dep, rfalBitRate DRI,
rfalIsoDepFSxI FSDI, uint8_t PARAM3, uint8_t DID, rfalIsoDepFSxI FSDI, uint8_t PARAM3, uint8_t DID,
const uint8_t *HLInfo, uint8_t HLInfoLen, const uint8_t *HLInfo, uint8_t HLInfoLen,
uint32_t fwt, rfalIsoDepAttribRes *attribRes, uint32_t fwt, rfalIsoDepAttribRes *attribRes,
uint8_t *attribResLen) { uint8_t *attribResLen) {
ReturnCode ret; ReturnCode ret;
RFAL_EXIT_ON_ERR(ret, rfalIsoDepStartATTRIB(nfcid0, PARAM1, DSI, DRI, FSDI, RFAL_EXIT_ON_ERR(ret, rfalIsoDepStartATTRIB(
PARAM3, DID, HLInfo, HLInfoLen, nfcid0, PARAM1, DSI_dep, DRI, FSDI, PARAM3, DID,
fwt, attribRes, attribResLen)); HLInfo, HLInfoLen, fwt, attribRes, attribResLen));
rfalRunBlocking(ret, rfalIsoDepGetATTRIBStatus()); rfalRunBlocking(ret, rfalIsoDepGetATTRIBStatus());
return ret; return ret;
@ -2414,7 +2414,7 @@ ReturnCode rfalIsoDepPollAStartActivation(rfalIsoDepFSxI FSDI, uint8_t DID,
rfalIsoDepStartRATS(FSDI, DID, &rfalIsoDepDev->activation.A.Listener.ATS, rfalIsoDepStartRATS(FSDI, DID, &rfalIsoDepDev->activation.A.Listener.ATS,
&rfalIsoDepDev->activation.A.Listener.ATSLen)); &rfalIsoDepDev->activation.A.Listener.ATSLen));
rfalIsoDepDev->info.DSI = maxBR; rfalIsoDepDev->info.DSI_dep = maxBR;
gIsoDep.actvDev = rfalIsoDepDev; gIsoDep.actvDev = rfalIsoDepDev;
gIsoDep.cntRRetrys = gIsoDep.maxRetriesRATS; gIsoDep.cntRRetrys = gIsoDep.maxRetriesRATS;
gIsoDep.state = ISODEP_ST_PCD_ACT_RATS; gIsoDep.state = ISODEP_ST_PCD_ACT_RATS;
@ -2476,8 +2476,8 @@ ReturnCode rfalIsoDepPollAGetActivationStatus(void) {
} }
} else /* ATS received */ } else /* ATS received */
{ {
maxBR = maxBR = gIsoDep.actvDev->info
gIsoDep.actvDev->info.DSI; /* Retrieve requested max bitrate */ .DSI_dep; /* Retrieve requested max bitrate */
/*******************************************************************************/ /*******************************************************************************/
/* Process ATS Response */ /* Process ATS Response */
@ -2485,7 +2485,7 @@ ReturnCode rfalIsoDepPollAGetActivationStatus(void) {
RFAL_ISODEP_FWI_DEFAULT; /* Default value EMVCo 2.6 5.7.2.6 */ RFAL_ISODEP_FWI_DEFAULT; /* Default value EMVCo 2.6 5.7.2.6 */
gIsoDep.actvDev->info.SFGI = 0U; gIsoDep.actvDev->info.SFGI = 0U;
gIsoDep.actvDev->info.MBL = 0U; gIsoDep.actvDev->info.MBL = 0U;
gIsoDep.actvDev->info.DSI = RFAL_BR_106; gIsoDep.actvDev->info.DSI_dep = RFAL_BR_106;
gIsoDep.actvDev->info.DRI = RFAL_BR_106; gIsoDep.actvDev->info.DRI = RFAL_BR_106;
gIsoDep.actvDev->info.FSxI = gIsoDep.actvDev->info.FSxI =
(uint8_t)RFAL_ISODEP_FSXI_32; /* FSC default value is 32 bytes (uint8_t)RFAL_ISODEP_FSXI_32; /* FSC default value is 32 bytes
@ -2511,7 +2511,7 @@ ReturnCode rfalIsoDepPollAGetActivationStatus(void) {
rfalIsoDepCalcBitRate(maxBR, rfalIsoDepCalcBitRate(maxBR,
((uint8_t *)&gIsoDep.actvDev->activation.A ((uint8_t *)&gIsoDep.actvDev->activation.A
.Listener.ATS)[msgIt++], .Listener.ATS)[msgIt++],
&gIsoDep.actvDev->info.DSI, &gIsoDep.actvDev->info.DSI_dep,
&gIsoDep.actvDev->info.DRI); &gIsoDep.actvDev->info.DRI);
} }
@ -2577,13 +2577,13 @@ ReturnCode rfalIsoDepPollAGetActivationStatus(void) {
/*******************************************************************************/ /*******************************************************************************/
/* If higher bit rates are supported by both devices, send PPS */ /* If higher bit rates are supported by both devices, send PPS */
if ((gIsoDep.actvDev->info.DSI != RFAL_BR_106) || if ((gIsoDep.actvDev->info.DSI_dep != RFAL_BR_106) ||
(gIsoDep.actvDev->info.DRI != RFAL_BR_106)) { (gIsoDep.actvDev->info.DRI != RFAL_BR_106)) {
/* Send PPS */ /* PRQA S 0310 1 # MISRA 11.3 - Intentional safe /* Send PPS */ /* PRQA S 0310 1 # MISRA 11.3 - Intentional safe
cast to avoiding buffer duplication */ cast to avoiding buffer duplication */
RFAL_EXIT_ON_ERR( RFAL_EXIT_ON_ERR(
ret, rfalIsoDepStartPPS(gIsoDep.actvDev->info.DID, ret, rfalIsoDepStartPPS(gIsoDep.actvDev->info.DID,
gIsoDep.actvDev->info.DSI, gIsoDep.actvDev->info.DSI_dep,
gIsoDep.actvDev->info.DRI, gIsoDep.actvDev->info.DRI,
(rfalIsoDepPpsRes *)&gIsoDep.ctrlBuf)); (rfalIsoDepPpsRes *)&gIsoDep.ctrlBuf));
@ -2603,12 +2603,13 @@ ReturnCode rfalIsoDepPollAGetActivationStatus(void) {
if (ret != RFAL_ERR_BUSY) { if (ret != RFAL_ERR_BUSY) {
/* Check whether PPS has been acknowledge */ /* Check whether PPS has been acknowledge */
if (ret == RFAL_ERR_NONE) { if (ret == RFAL_ERR_NONE) {
/* DSI code the divisor from PICC to PCD */ /* DSI_dep code the divisor from PICC to PCD */
/* DRI code the divisor from PCD to PICC */ /* DRI code the divisor from PCD to PICC */
rfalSetBitRate(gIsoDep.actvDev->info.DRI, gIsoDep.actvDev->info.DSI); rfalSetBitRate(gIsoDep.actvDev->info.DRI,
gIsoDep.actvDev->info.DSI_dep);
} else { } else {
/* If PPS has faled keep activation bit rate */ /* If PPS has faled keep activation bit rate */
gIsoDep.actvDev->info.DSI = RFAL_BR_106; gIsoDep.actvDev->info.DSI_dep = RFAL_BR_106;
gIsoDep.actvDev->info.DRI = RFAL_BR_106; gIsoDep.actvDev->info.DRI = RFAL_BR_106;
/* Ignore PPS response fail, proceed to data exchange */ /* Ignore PPS response fail, proceed to data exchange */
@ -2723,7 +2724,7 @@ ReturnCode rfalIsoDepPollBStartActivation(rfalIsoDepFSxI FSDI, uint8_t DID,
/* Calculate max Bit Rate */ /* Calculate max Bit Rate */
rfalIsoDepCalcBitRate(maxBR, nfcbDev->sensbRes.protInfo.BRC, rfalIsoDepCalcBitRate(maxBR, nfcbDev->sensbRes.protInfo.BRC,
&rfalIsoDepDev->info.DSI, &rfalIsoDepDev->info.DRI); &rfalIsoDepDev->info.DSI_dep, &rfalIsoDepDev->info.DRI);
/***************************************************************************/ /***************************************************************************/
/* Send ATTRIB Command */ /* Send ATTRIB Command */
@ -2735,7 +2736,7 @@ ReturnCode rfalIsoDepPollBStartActivation(rfalIsoDepFSxI FSDI, uint8_t DID,
RFAL_NFCB_SENSB_RES_ADC_ADV_FEATURE_MASK) != 0U) RFAL_NFCB_SENSB_RES_ADC_ADV_FEATURE_MASK) != 0U)
? PARAM1 ? PARAM1
: RFAL_ISODEP_ATTRIB_REQ_PARAM1_DEFAULT), : RFAL_ISODEP_ATTRIB_REQ_PARAM1_DEFAULT),
rfalIsoDepDev->info.DSI, rfalIsoDepDev->info.DRI, FSDI, rfalIsoDepDev->info.DSI_dep, rfalIsoDepDev->info.DRI, FSDI,
(gIsoDep.compMode == RFAL_COMPLIANCE_MODE_EMV) (gIsoDep.compMode == RFAL_COMPLIANCE_MODE_EMV)
? RFAL_NFCB_SENSB_RES_PROTO_ISO_MASK ? RFAL_NFCB_SENSB_RES_PROTO_ISO_MASK
: (nfcbDev->sensbRes.protInfo.FsciProType & : (nfcbDev->sensbRes.protInfo.FsciProType &
@ -2781,9 +2782,9 @@ ReturnCode rfalIsoDepPollBGetActivationStatus(void) {
(gIsoDep.actvDev->info.FSx * ((uint32_t)1U << (mbli - 1U))); (gIsoDep.actvDev->info.FSx * ((uint32_t)1U << (mbli - 1U)));
} }
/* DSI code the divisor from PICC to PCD */ /* DSI_dep code the divisor from PICC to PCD */
/* DRI code the divisor from PCD to PICC */ /* DRI code the divisor from PCD to PICC */
rfalSetBitRate(gIsoDep.actvDev->info.DRI, gIsoDep.actvDev->info.DSI); rfalSetBitRate(gIsoDep.actvDev->info.DRI, gIsoDep.actvDev->info.DSI_dep);
/* REMARK: SoF EoF TR0 and TR1 are not passed on to RF layer */ /* REMARK: SoF EoF TR0 and TR1 are not passed on to RF layer */
@ -2791,7 +2792,7 @@ ReturnCode rfalIsoDepPollBGetActivationStatus(void) {
rfalSetGT(rfalConvMsTo1fc(gIsoDep.actvDev->info.SFGT)); rfalSetGT(rfalConvMsTo1fc(gIsoDep.actvDev->info.SFGT));
rfalFieldOnAndStartGT(); rfalFieldOnAndStartGT();
} else { } else {
gIsoDep.actvDev->info.DSI = RFAL_BR_106; gIsoDep.actvDev->info.DSI_dep = RFAL_BR_106;
gIsoDep.actvDev->info.DRI = RFAL_BR_106; gIsoDep.actvDev->info.DRI = RFAL_BR_106;
} }
@ -2942,7 +2943,7 @@ ReturnCode rfalIsoDepPollHandleSParameters(rfalIsoDepDevice *rfalIsoDepDev,
RFAL_EXIT_ON_ERR(ret, rfalSetBitRate(txBR, rxBR)); RFAL_EXIT_ON_ERR(ret, rfalSetBitRate(txBR, rxBR));
rfalIsoDepDev->info.DRI = txBR; rfalIsoDepDev->info.DRI = txBR;
rfalIsoDepDev->info.DSI = rxBR; rfalIsoDepDev->info.DSI_dep = rxBR;
return RFAL_ERR_NONE; return RFAL_ERR_NONE;
} }

37
core/embed/io/nfc/rfal/source/rfal_nfcDep.c
View File

@ -2041,7 +2041,7 @@ static ReturnCode nfcipTargetHandleActivation(rfalNfcDepDevice *nfcDepDev,
/* Update Bitrate info */ /* Update Bitrate info */
/* PRQA S 4342 2 # MISRA 10.5 - Layout of enum rfalBitRate and definition /* PRQA S 4342 2 # MISRA 10.5 - Layout of enum rfalBitRate and definition
* of rfalNfcDepBRS2DSI guarantee no invalid enum values to be created */ * of rfalNfcDepBRS2DSI guarantee no invalid enum values to be created */
nfcDepDev->info.DSI = (rfalBitRate)rfalNfcDepBRS2DSI( nfcDepDev->info.DSI_dep = (rfalBitRate)rfalNfcDepBRS2DSI(
*outBRS); /* DSI codes the bit rate from Initiator to Target */ *outBRS); /* DSI codes the bit rate from Initiator to Target */
nfcDepDev->info.DRI = (rfalBitRate)rfalNfcDepBRS2DRI( nfcDepDev->info.DRI = (rfalBitRate)rfalNfcDepBRS2DRI(
*outBRS); /* DRI codes the bit rate from Target to Initiator */ *outBRS); /* DRI codes the bit rate from Target to Initiator */
@ -2056,7 +2056,7 @@ static ReturnCode nfcipTargetHandleActivation(rfalNfcDepDevice *nfcDepDev,
rfalNfcDepLR2PP(gNfcip.cfg.lr); rfalNfcDepLR2PP(gNfcip.cfg.lr);
} }
rfalSetBitRate(RFAL_BR_KEEP, gNfcip.nfcDepDev->info.DSI); rfalSetBitRate(RFAL_BR_KEEP, gNfcip.nfcDepDev->info.DSI_dep);
RFAL_EXIT_ON_ERR( RFAL_EXIT_ON_ERR(
ret, nfcipTx(NFCIP_CMD_PSL_RES, txBuf, NULL, 0, 0, NFCIP_NO_FWT)); ret, nfcipTx(NFCIP_CMD_PSL_RES, txBuf, NULL, 0, 0, NFCIP_NO_FWT));
@ -2376,7 +2376,7 @@ ReturnCode rfalNfcDepInitiatorHandleActivation(rfalNfcDepAtrParam *param,
nfcDepDev->info.FWT = rfalNfcDepCalculateRWT(nfcDepDev->info.WT); nfcDepDev->info.FWT = rfalNfcDepCalculateRWT(nfcDepDev->info.WT);
nfcDepDev->info.dFWT = RFAL_NFCDEP_WT_DELTA; nfcDepDev->info.dFWT = RFAL_NFCDEP_WT_DELTA;
rfalGetBitRate(&nfcDepDev->info.DSI, &nfcDepDev->info.DRI); rfalGetBitRate(&nfcDepDev->info.DSI_dep, &nfcDepDev->info.DRI);
/*******************************************************************************/ /*******************************************************************************/
/* Check if a PSL needs to be sent */ /* Check if a PSL needs to be sent */
@ -2384,7 +2384,7 @@ ReturnCode rfalNfcDepInitiatorHandleActivation(rfalNfcDepAtrParam *param,
sendPSL = false; sendPSL = false;
PSL_BRS = rfalNfcDepDx2BRS( PSL_BRS = rfalNfcDepDx2BRS(
nfcDepDev->info nfcDepDev->info
.DSI); /* Set current bit rate divisor on both directions */ .DSI_dep); /* Set current bit rate divisor on both directions */
PSL_FSL = nfcDepDev->info.LR; /* Set current Frame Size */ PSL_FSL = nfcDepDev->info.LR; /* Set current Frame Size */
/* Activity 1.0 9.4.4.15 & 9.4.6.3 NFC-DEP Activation PSL /* Activity 1.0 9.4.4.15 & 9.4.6.3 NFC-DEP Activation PSL
@ -2399,17 +2399,17 @@ ReturnCode rfalNfcDepInitiatorHandleActivation(rfalNfcDepAtrParam *param,
/*******************************************************************************/ /*******************************************************************************/
/* Check Frame Size */ /* Check Frame Size */
/*******************************************************************************/ /*******************************************************************************/
if( gNfcip.cfg.lr < nfcDepDev->info.LR ) /* If our Length reduction is smaller */ if( gNfcip.cfg.lr < nfcDepDev->info.LR ) /* If our Length reduction is smaller */
{ {
sendPSL = true; sendPSL = true;
nfcDepDev->info.LR = RFAL_MIN( nfcDepDev->info.LR, gNfcip.cfg.lr ); nfcDepDev->info.LR = RFAL_MIN( nfcDepDev->info.LR, gNfcip.cfg.lr );
gNfcip.cfg.lr = nfcDepDev->info.LR; /* Update nfcip LR to be used */ gNfcip.cfg.lr = nfcDepDev->info.LR; /* Update nfcip LR to be used */
gNfcip.fsc = rfalNfcDepLR2FS( gNfcip.cfg.lr ); /* Update nfcip FSC to be used */ gNfcip.fsc = rfalNfcDepLR2FS( gNfcip.cfg.lr ); /* Update nfcip FSC to be used */
PSL_FSL = gNfcip.cfg.lr; /* Set LR to be sent */ PSL_FSL = gNfcip.cfg.lr; /* Set LR to be sent */
nfcipLogI( " NFCIP(I) Frame Size differ, PSL new fsc: %d \r\n", gNfcip.fsc ); nfcipLogI( " NFCIP(I) Frame Size differ, PSL new fsc: %d \r\n", gNfcip.fsc );
} }
#endif #endif
@ -2417,7 +2417,7 @@ ReturnCode rfalNfcDepInitiatorHandleActivation(rfalNfcDepAtrParam *param,
/*******************************************************************************/ /*******************************************************************************/
/* Check Baud rates */ /* Check Baud rates */
/*******************************************************************************/ /*******************************************************************************/
if ((nfcDepDev->info.DSI != desiredBR) && if ((nfcDepDev->info.DSI_dep != desiredBR) &&
(desiredBR != RFAL_BR_KEEP)) /* if desired BR is different */ (desiredBR != RFAL_BR_KEEP)) /* if desired BR is different */
{ {
if (nfcipDxIsSupported( if (nfcipDxIsSupported(
@ -2443,10 +2443,10 @@ ReturnCode rfalNfcDepInitiatorHandleActivation(rfalNfcDepAtrParam *param,
RFAL_EXIT_ON_ERR(ret, rfalNfcDepPSL(PSL_BRS, PSL_FSL)); RFAL_EXIT_ON_ERR(ret, rfalNfcDepPSL(PSL_BRS, PSL_FSL));
/* Check if bit rate has been changed */ /* Check if bit rate has been changed */
if (nfcDepDev->info.DSI != desiredBR) { if (nfcDepDev->info.DSI_dep != desiredBR) {
/* Check if device was in Passive NFC-A and went to higher bit rates, use /* Check if device was in Passive NFC-A and went to higher bit rates, use
* NFC-F */ * NFC-F */
if ((nfcDepDev->info.DSI == RFAL_BR_106) && if ((nfcDepDev->info.DSI_dep == RFAL_BR_106) &&
(gNfcip.cfg.commMode == RFAL_NFCDEP_COMM_PASSIVE)) { (gNfcip.cfg.commMode == RFAL_NFCDEP_COMM_PASSIVE)) {
#if RFAL_FEATURE_NFCF #if RFAL_FEATURE_NFCF
/* If Passive initialize NFC-F module */ /* If Passive initialize NFC-F module */
@ -2458,10 +2458,10 @@ ReturnCode rfalNfcDepInitiatorHandleActivation(rfalNfcDepAtrParam *param,
nfcDepDev->info.DRI = nfcDepDev->info.DRI =
desiredBR; /* DSI Bit Rate coding from Initiator to Target */ desiredBR; /* DSI Bit Rate coding from Initiator to Target */
nfcDepDev->info.DSI = nfcDepDev->info.DSI_dep =
desiredBR; /* DRI Bit Rate coding from Target to Initiator */ desiredBR; /* DRI Bit Rate coding from Target to Initiator */
rfalSetBitRate(nfcDepDev->info.DSI, nfcDepDev->info.DRI); rfalSetBitRate(nfcDepDev->info.DSI_dep, nfcDepDev->info.DRI);
} }
return RFAL_ERR_NONE; /* PSL has been sent */ return RFAL_ERR_NONE; /* PSL has been sent */
@ -2560,7 +2560,8 @@ ReturnCode rfalNfcDepListenStartActivation(const rfalNfcDepTargetParam *param,
rxParam.nfcDepDev->info.FWT = NFCIP_NO_FWT; rxParam.nfcDepDev->info.FWT = NFCIP_NO_FWT;
rxParam.nfcDepDev->info.dFWT = NFCIP_NO_FWT; rxParam.nfcDepDev->info.dFWT = NFCIP_NO_FWT;
rfalGetBitRate(&rxParam.nfcDepDev->info.DSI, &rxParam.nfcDepDev->info.DRI); rfalGetBitRate(&rxParam.nfcDepDev->info.DSI_dep,
&rxParam.nfcDepDev->info.DRI);
/* Store Device Info location, updated upon a PSL */ /* Store Device Info location, updated upon a PSL */
gNfcip.nfcDepDev = rxParam.nfcDepDev; gNfcip.nfcDepDev = rxParam.nfcDepDev;
@ -2632,14 +2633,14 @@ ReturnCode rfalNfcDepListenGetActivationStatus(void) {
if (gNfcip.cfg.commMode == RFAL_NFCDEP_COMM_ACTIVE) { if (gNfcip.cfg.commMode == RFAL_NFCDEP_COMM_ACTIVE) {
RFAL_EXIT_ON_ERR(err, rfalSetMode(RFAL_MODE_LISTEN_ACTIVE_P2P, RFAL_EXIT_ON_ERR(err, rfalSetMode(RFAL_MODE_LISTEN_ACTIVE_P2P,
gNfcip.nfcDepDev->info.DRI, gNfcip.nfcDepDev->info.DRI,
gNfcip.nfcDepDev->info.DSI)); gNfcip.nfcDepDev->info.DSI_dep));
} else { } else {
RFAL_EXIT_ON_ERR( RFAL_EXIT_ON_ERR(
err, rfalSetMode(((RFAL_BR_106 == gNfcip.nfcDepDev->info.DRI) err, rfalSetMode(((RFAL_BR_106 == gNfcip.nfcDepDev->info.DRI)
? RFAL_MODE_LISTEN_NFCA ? RFAL_MODE_LISTEN_NFCA
: RFAL_MODE_LISTEN_NFCF), : RFAL_MODE_LISTEN_NFCF),
gNfcip.nfcDepDev->info.DRI, gNfcip.nfcDepDev->info.DRI,
gNfcip.nfcDepDev->info.DSI)); gNfcip.nfcDepDev->info.DSI_dep));
} }
} }
break; break;

2
core/embed/io/nfc/rfal/source/st25r3916/rfal_rfst25r3916.c
View File

@ -2939,7 +2939,7 @@ static void rfalTransceiveRx(void) {
gRFAL.TxRx.status = RFAL_ERR_SYSTEM; gRFAL.TxRx.status = RFAL_ERR_SYSTEM;
} }
#if 0 /* Debug purposes */ #if 0 /* Debug purposes */
rfalLogD( "RFAL: curSt: %d Error: %d \r\n", gRFAL.TxRx.state, gRFAL.TxRx.status ); rfalLogD( "RFAL: curSt: %d Error: %d \r\n", gRFAL.TxRx.state, gRFAL.TxRx.status );
#endif #endif