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TEMP FIX: larger kernel SRAM for T3W1, to allow DMA transfers

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tychovrahe 2024-10-01 11:41:23 +02:00
parent 70465eb084
commit bb94fa71e1
3 changed files with 3 additions and 3 deletions
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2
core/embed/models/T3W1/memory.ld
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@ -47,7 +47,7 @@ FIRMWARE_P2_SECTOR_END = 0x17;
KERNEL_STACK_SIZE = 0x2000; KERNEL_STACK_SIZE = 0x2000;
KERNEL_CCMRAM_SIZE = 0x4000; KERNEL_CCMRAM_SIZE = 0x4000;
KERNEL_FRAMEBUFFER_SIZE = 0x0; KERNEL_FRAMEBUFFER_SIZE = 0x0;
KERNEL_SRAM_SIZE = 0x400; KERNEL_SRAM_SIZE = 0x2000;
BOOTARGS_SIZE = 0x100; BOOTARGS_SIZE = 0x100;
CODE_ALIGNMENT = 0x200; CODE_ALIGNMENT = 0x200;
COREAPP_ALIGNMENT = 0x2000; COREAPP_ALIGNMENT = 0x2000;

2
core/embed/models/T3W1/model_T3W1.h
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@ -101,7 +101,7 @@
#define KERNEL_STACK_SIZE (8 * 1024) #define KERNEL_STACK_SIZE (8 * 1024)
#define KERNEL_CCMRAM_SIZE (16 * 1024) #define KERNEL_CCMRAM_SIZE (16 * 1024)
#define KERNEL_FRAMEBUFFER_SIZE (0 * 1024) #define KERNEL_FRAMEBUFFER_SIZE (0 * 1024)
#define KERNEL_SRAM_SIZE (1 * 1024) #define KERNEL_SRAM_SIZE (8 * 1024)
#define BOOTARGS_SIZE 0x100 #define BOOTARGS_SIZE 0x100
#define CODE_ALIGNMENT 0x200 #define CODE_ALIGNMENT 0x200

2
core/embed/trezorhal/stm32f4/mpu.c
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@ -331,7 +331,7 @@ mpu_mode_t mpu_reconfig(mpu_mode_t mode) {
case MPU_MODE_APP: case MPU_MODE_APP:
// Kernel data in DMA accessible SRAM (Privileged, Read-Write, Non-Executable) // Kernel data in DMA accessible SRAM (Privileged, Read-Write, Non-Executable)
// (overlaps with unprivileged SRAM region) // (overlaps with unprivileged SRAM region)
SET_REGION( 5, SRAM_BASE, SIZE_1KB, 0x00, SRAM, PRIV_RW ); SET_REGION( 5, SRAM_BASE, SIZE_8KB, 0x00, SRAM, PRIV_RW );
// Assets (Unprivileged, Read-Only, Non-Executable) // Assets (Unprivileged, Read-Only, Non-Executable)
// Subregion: 48KB = 64KB except 2/8 at end // Subregion: 48KB = 64KB except 2/8 at end
SET_REGION( 6, FLASH_BASE + 0x100000, SIZE_64KB, 0xC0, FLASH_DATA, PRIV_RO_URO ); SET_REGION( 6, FLASH_BASE + 0x100000, SIZE_64KB, 0xC0, FLASH_DATA, PRIV_RO_URO );