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TEMP FIX: larger kernel SRAM for T3W1, to allow DMA transfers
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@ -47,7 +47,7 @@ FIRMWARE_P2_SECTOR_END = 0x17;
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KERNEL_STACK_SIZE = 0x2000;
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KERNEL_CCMRAM_SIZE = 0x4000;
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KERNEL_FRAMEBUFFER_SIZE = 0x0;
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KERNEL_SRAM_SIZE = 0x400;
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KERNEL_SRAM_SIZE = 0x2000;
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BOOTARGS_SIZE = 0x100;
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CODE_ALIGNMENT = 0x200;
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COREAPP_ALIGNMENT = 0x2000;
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@ -101,7 +101,7 @@
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#define KERNEL_STACK_SIZE (8 * 1024)
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#define KERNEL_CCMRAM_SIZE (16 * 1024)
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#define KERNEL_FRAMEBUFFER_SIZE (0 * 1024)
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#define KERNEL_SRAM_SIZE (1 * 1024)
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#define KERNEL_SRAM_SIZE (8 * 1024)
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#define BOOTARGS_SIZE 0x100
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#define CODE_ALIGNMENT 0x200
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@ -331,7 +331,7 @@ mpu_mode_t mpu_reconfig(mpu_mode_t mode) {
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case MPU_MODE_APP:
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// Kernel data in DMA accessible SRAM (Privileged, Read-Write, Non-Executable)
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// (overlaps with unprivileged SRAM region)
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SET_REGION( 5, SRAM_BASE, SIZE_1KB, 0x00, SRAM, PRIV_RW );
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SET_REGION( 5, SRAM_BASE, SIZE_8KB, 0x00, SRAM, PRIV_RW );
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// Assets (Unprivileged, Read-Only, Non-Executable)
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// Subregion: 48KB = 64KB except 2/8 at end
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SET_REGION( 6, FLASH_BASE + 0x100000, SIZE_64KB, 0xC0, FLASH_DATA, PRIV_RO_URO );
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