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@ -35,25 +35,33 @@ typedef struct {
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uint32_t plln;
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} clock_conf_t;
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#ifdef HSE_16MHZ
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#define PLLM_COEF 2U
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#elif defined HSE_8MHZ
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#define PLLM_COEF 1U
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#else
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#error Unsupported HSE frequency
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#endif
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#if defined STM32F427xx || defined STM32F429xx
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#ifdef TREZOR_MODEL_T
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#define DEFAULT_FREQ 168U
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#define DEFAULT_PLLQ 7U
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#define DEFAULT_PLLP 0U // P = 2 (two bits, 00 means PLLP = 2)
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#define DEFAULT_PLLM 4U
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#define DEFAULT_PLLM (4U * PLLM_COEF)
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#define DEFAULT_PLLN 168U
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#else
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#define DEFAULT_FREQ 180U
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#define DEFAULT_PLLQ 15U
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#define DEFAULT_PLLP 1U // P = 4 (two bits, 01 means PLLP = 4)
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#define DEFAULT_PLLM 4U
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#define DEFAULT_PLLM (4U * PLLM_COEF)
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#define DEFAULT_PLLN 360U
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#endif
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#elif STM32F405xx
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#define DEFAULT_FREQ 120U
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#define DEFAULT_PLLQ 5U
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#define DEFAULT_PLLP 0U // P = 2 (two bits, 00 means PLLP = 2)
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#define DEFAULT_PLLM 8U
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#define DEFAULT_PLLM (8U * PLLM_COEF)
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#define DEFAULT_PLLN 240U
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#else
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#error Unsupported MCU
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@ -70,7 +78,7 @@ clock_conf_t clock_conf[3] = {
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180,
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15,
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1,
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4,
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4 * PLLM_COEF,
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360,
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},
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{
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@ -80,7 +88,7 @@ clock_conf_t clock_conf[3] = {
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168,
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7,
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0,
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4,
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4 * PLLM_COEF,
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168,
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},
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{
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@ -90,7 +98,7 @@ clock_conf_t clock_conf[3] = {
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120,
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5,
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0,
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8,
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8 * PLLM_COEF,
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240,
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},
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};
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