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use $(CC) instead of gcc in Makefile
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parent
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4
Makefile
4
Makefile
@ -44,10 +44,10 @@ all: tests test-openssl
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$(CC) $(CFLAGS) -o $@ -c $<
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tests: tests.o $(OBJS)
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gcc tests.o $(OBJS) $(TESTLIBS) -o tests
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$(CC) tests.o $(OBJS) $(TESTLIBS) -o tests
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test-openssl: test-openssl.o $(OBJS)
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gcc test-openssl.o $(OBJS) $(TESTSSLLIBS) -o test-openssl
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$(CC) test-openssl.o $(OBJS) $(TESTSSLLIBS) -o test-openssl
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clean:
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rm -f *.o tests test-openssl
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