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embed: call clear_otg_hs_memory from fatal_error

This commit is contained in:
Pavol Rusnak 2017-10-13 00:36:12 +02:00
parent 73214017fa
commit a7625877ef
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GPG Key ID: 91F3B339B9A02A3D
4 changed files with 17 additions and 16 deletions

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@ -5,20 +5,6 @@
#include STM32_HAL_H #include STM32_HAL_H
// reference RM0090 section 35.12.1 Figure 413
#define USB_OTG_HS_DATA_FIFO_RAM (USB_OTG_HS_PERIPH_BASE + 0x20000U)
#define USB_OTG_HS_DATA_FIFO_SIZE (4096U)
void clear_otg_hs_memory(void)
{
// use the HAL version due to section 2.1.6 of STM32F42xx Errata sheet
__HAL_RCC_USB_OTG_HS_CLK_ENABLE(); // enable USB_OTG_HS peripheral clock so that the peripheral memory is accessible
const uint32_t unpredictable = rng_get();
memset_reg((volatile void *) USB_OTG_HS_DATA_FIFO_RAM, (volatile void *) (USB_OTG_HS_DATA_FIFO_RAM + USB_OTG_HS_DATA_FIFO_SIZE), unpredictable);
memset_reg((volatile void *) USB_OTG_HS_DATA_FIFO_RAM, (volatile void *) (USB_OTG_HS_DATA_FIFO_RAM + USB_OTG_HS_DATA_FIFO_SIZE), 0);
__HAL_RCC_USB_OTG_HS_CLK_DISABLE(); // disable USB OTG_HS peripheral clock as the peripheral is not needed right now
}
#define WANTED_WRP (OB_WRP_SECTOR_0 | OB_WRP_SECTOR_1 | OB_WRP_SECTOR_2) #define WANTED_WRP (OB_WRP_SECTOR_0 | OB_WRP_SECTOR_1 | OB_WRP_SECTOR_2)
#define WANTED_RDP (OB_RDP_LEVEL_2) #define WANTED_RDP (OB_RDP_LEVEL_2)
#define WANTED_BOR (OB_BOR_LEVEL3) #define WANTED_BOR (OB_BOR_LEVEL3)

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@ -1,8 +1,6 @@
#ifndef __BOARDLOADER_LOWLEVEL_H__ #ifndef __BOARDLOADER_LOWLEVEL_H__
#define __BOARDLOADER_LOWLEVEL_H__ #define __BOARDLOADER_LOWLEVEL_H__
void clear_otg_hs_memory(void);
void flash_set_option_bytes(void); void flash_set_option_bytes(void);
#endif #endif

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@ -28,6 +28,7 @@ void __attribute__((noreturn)) __fatal_error(const char *expr, const char *msg,
#define STR(s) #s #define STR(s) #s
display_printf("rev : %s\n", XSTR(GITREV)); display_printf("rev : %s\n", XSTR(GITREV));
#endif #endif
clear_otg_hs_memory();
shutdown(); shutdown();
for (;;); for (;;);
} }
@ -74,3 +75,17 @@ void hal_delay(uint32_t ms)
{ {
HAL_Delay(ms); HAL_Delay(ms);
} }
// reference RM0090 section 35.12.1 Figure 413
#define USB_OTG_HS_DATA_FIFO_RAM (USB_OTG_HS_PERIPH_BASE + 0x20000U)
#define USB_OTG_HS_DATA_FIFO_SIZE (4096U)
void clear_otg_hs_memory(void)
{
// use the HAL version due to section 2.1.6 of STM32F42xx Errata sheet
__HAL_RCC_USB_OTG_HS_CLK_ENABLE(); // enable USB_OTG_HS peripheral clock so that the peripheral memory is accessible
const uint32_t unpredictable = rng_get();
memset_reg((volatile void *) USB_OTG_HS_DATA_FIFO_RAM, (volatile void *) (USB_OTG_HS_DATA_FIFO_RAM + USB_OTG_HS_DATA_FIFO_SIZE), unpredictable);
memset_reg((volatile void *) USB_OTG_HS_DATA_FIFO_RAM, (volatile void *) (USB_OTG_HS_DATA_FIFO_RAM + USB_OTG_HS_DATA_FIFO_SIZE), 0);
__HAL_RCC_USB_OTG_HS_CLK_DISABLE(); // disable USB OTG_HS peripheral clock as the peripheral is not needed right now
}

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@ -10,6 +10,8 @@
extern void memset_reg(volatile void *start, volatile void *stop, uint32_t val); extern void memset_reg(volatile void *start, volatile void *stop, uint32_t val);
void clear_otg_hs_memory(void);
void periph_init(void); void periph_init(void);
void __attribute__((noreturn)) __fatal_error(const char *expr, const char *msg, const char *file, int line, const char *func); void __attribute__((noreturn)) __fatal_error(const char *expr, const char *msg, const char *file, int line, const char *func);