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@ -28,6 +28,7 @@ void __attribute__((noreturn)) __fatal_error(const char *expr, const char *msg,
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#define STR(s) #s
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display_printf("rev : %s\n", XSTR(GITREV));
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#endif
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clear_otg_hs_memory();
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shutdown();
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for (;;);
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}
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@ -74,3 +75,17 @@ void hal_delay(uint32_t ms)
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{
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HAL_Delay(ms);
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}
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// reference RM0090 section 35.12.1 Figure 413
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#define USB_OTG_HS_DATA_FIFO_RAM (USB_OTG_HS_PERIPH_BASE + 0x20000U)
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#define USB_OTG_HS_DATA_FIFO_SIZE (4096U)
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void clear_otg_hs_memory(void)
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{
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// use the HAL version due to section 2.1.6 of STM32F42xx Errata sheet
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__HAL_RCC_USB_OTG_HS_CLK_ENABLE(); // enable USB_OTG_HS peripheral clock so that the peripheral memory is accessible
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const uint32_t unpredictable = rng_get();
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memset_reg((volatile void *) USB_OTG_HS_DATA_FIFO_RAM, (volatile void *) (USB_OTG_HS_DATA_FIFO_RAM + USB_OTG_HS_DATA_FIFO_SIZE), unpredictable);
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memset_reg((volatile void *) USB_OTG_HS_DATA_FIFO_RAM, (volatile void *) (USB_OTG_HS_DATA_FIFO_RAM + USB_OTG_HS_DATA_FIFO_SIZE), 0);
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__HAL_RCC_USB_OTG_HS_CLK_DISABLE(); // disable USB OTG_HS peripheral clock as the peripheral is not needed right now
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}
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