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fix(core): refactor DSI variable in RFAL to not colide with STM HAL

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This commit is contained in:
kopecdav 2025-02-06 10:02:51 +01:00
parent 3a147fab02
commit a3136e2f6d
5 changed files with 1213 additions and 1213 deletions
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20
core/embed/io/nfc/rfal/include/rfal_isoDep.h
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@ -139,10 +139,10 @@
#define RFAL_ISODEP_SPARAM_TAG_PCD2PICC_LEN (2U) /*!< S(PARAMETERS) bit rates from PICC to PCD Length */
#define RFAL_ISODEP_SPARAM_TAG_BRACK_LEN (0U) /*!< S(PARAMETERS) tag Bit rates Acknowledgement Length */
#define RFAL_ISODEP_ATS_TA_DPL_212 (0x01U) /*!< ATS TA DSI 212 kbps support bit mask */
#define RFAL_ISODEP_ATS_TA_DPL_424 (0x02U) /*!< ATS TA DSI 424 kbps support bit mask */
#define RFAL_ISODEP_ATS_TA_DPL_848 (0x04U) /*!< ATS TA DSI 848 kbps support bit mask */
#define RFAL_ISODEP_ATS_TA_DLP_212 (0x10U) /*!< ATS TA DSI 212 kbps support bit mask */
#define RFAL_ISODEP_ATS_TA_DPL_212 (0x01U) /*!< ATS TA DSI_ID 212 kbps support bit mask */
#define RFAL_ISODEP_ATS_TA_DPL_424 (0x02U) /*!< ATS TA DSI_ID 424 kbps support bit mask */
#define RFAL_ISODEP_ATS_TA_DPL_848 (0x04U) /*!< ATS TA DSI_ID 848 kbps support bit mask */
#define RFAL_ISODEP_ATS_TA_DLP_212 (0x10U) /*!< ATS TA DSI_ID 212 kbps support bit mask */
#define RFAL_ISODEP_ATS_TA_DLP_424 (0x20U) /*!< ATS TA DRI 424 kbps support bit mask */
#define RFAL_ISODEP_ATS_TA_DLP_848 (0x40U) /*!< ATS TA DRI 848 kbps support bit mask */
#define RFAL_ISODEP_ATS_TA_SAME_D (0x80U) /*!< ATS TA same bit both directions bit mask */
@ -238,7 +238,7 @@ typedef struct
{
uint8_t PPSS; /*!< Start Byte: [ 1101b | CID[4b] ] */
uint8_t PPS0; /*!< Parameter 0:[ 000b | PPS1[1n] | 0001b ] */
uint8_t PPS1; /*!< Parameter 1:[ 0000b | DSI[2b] | DRI[2b] ]*/
uint8_t PPS1; /*!< Parameter 1:[ 0000b | DSI_ID[2b] | DRI[2b] ]*/
} rfalIsoDepPpsReq;
@ -318,7 +318,7 @@ typedef struct {
uint8_t FSxI; /*!< Frame Size Device/Card Integer (FSDI or FSCI) */
uint16_t FSx; /*!< Frame Size Device/Card (FSD or FSC) */
uint32_t MBL; /*!< Maximum Buffer Length (optional for NFC-B) */
rfalBitRate DSI; /*!< Bit Rate coding from Listener (PICC) to Poller (PCD) */
rfalBitRate DSI_ID; /*!< Bit Rate coding from Listener (PICC) to Poller (PCD) */
rfalBitRate DRI; /*!< Bit Rate coding from Poller (PCD) to Listener (PICC) */
uint8_t DID; /*!< Device ID */
uint8_t NAD; /*!< Node ADdress */
@ -736,7 +736,7 @@ ReturnCode rfalIsoDepRATS( rfalIsoDepFSxI FSDI, uint8_t DID, rfalIsoDepAts *ats
* Additionally checks if the received PPS response is valid
*
* \param[in] DID : Device ID
* \param[in] DSI : DSI code the divisor from Listener (PICC) to Poller (PCD)
* \param[in] DSI_ID : DSI_ID code the divisor from Listener (PICC) to Poller (PCD)
* \param[in] DRI : DRI code the divisor from Poller (PCD) to Listener (PICC)
* \param[out] ppsRes : pointer to place the PPS Response
*
@ -751,7 +751,7 @@ ReturnCode rfalIsoDepRATS( rfalIsoDepFSxI FSDI, uint8_t DID, rfalIsoDepAts *ats
* \return RFAL_ERR_NONE : No error, PPS Response received
*****************************************************************************
*/
ReturnCode rfalIsoDepPPS( uint8_t DID, rfalBitRate DSI, rfalBitRate DRI, rfalIsoDepPpsRes *ppsRes );
ReturnCode rfalIsoDepPPS( uint8_t DID, rfalBitRate DSI_ID, rfalBitRate DRI, rfalIsoDepPpsRes *ppsRes );
/*!
@ -763,7 +763,7 @@ ReturnCode rfalIsoDepPPS( uint8_t DID, rfalBitRate DSI, rfalBitRate DRI, rfalIso
*
* \param[in] nfcid0 : NFCID0 to be used for the ATTRIB
* \param[in] PARAM1 : ATTRIB PARAM1 byte (communication parameters)
* \param[in] DSI : DSI code the divisor from Listener (PICC) to Poller (PCD)
* \param[in] DSI_ID : DSI_ID code the divisor from Listener (PICC) to Poller (PCD)
* \param[in] DRI : DRI code the divisor from Poller (PCD) to Listener (PICC)
* \param[in] FSDI : PCD's Frame Size to be announced on the ATTRIB
* \param[in] PARAM3 : ATTRIB PARAM1 byte (protocol type)
@ -784,7 +784,7 @@ ReturnCode rfalIsoDepPPS( uint8_t DID, rfalBitRate DSI, rfalBitRate DRI, rfalIso
* \return RFAL_ERR_NONE : No error, ATTRIB Response received
*****************************************************************************
*/
ReturnCode rfalIsoDepATTRIB( const uint8_t* nfcid0, uint8_t PARAM1, rfalBitRate DSI, rfalBitRate DRI, rfalIsoDepFSxI FSDI, uint8_t PARAM3, uint8_t DID, const uint8_t* HLInfo, uint8_t HLInfoLen, uint32_t fwt, rfalIsoDepAttribRes *attribRes, uint8_t *attribResLen );
ReturnCode rfalIsoDepATTRIB( const uint8_t* nfcid0, uint8_t PARAM1, rfalBitRate DSI_ID, rfalBitRate DRI, rfalIsoDepFSxI FSDI, uint8_t PARAM3, uint8_t DID, const uint8_t* HLInfo, uint8_t HLInfoLen, uint32_t fwt, rfalIsoDepAttribRes *attribRes, uint8_t *attribResLen );
/*!

4
core/embed/io/nfc/rfal/include/rfal_nfcDep.h
View File

@ -174,7 +174,7 @@
#define rfalNfcDepDx2BRS( br ) ( (((uint8_t)(br) & RFAL_NFCDEP_BRS_Dx_MASK) << RFAL_NFCDEP_BRS_DSI_POS) | ((uint8_t)(br) & RFAL_NFCDEP_BRS_Dx_MASK) )
#define rfalNfcDepBRS2DRI( brs ) (uint8_t)( (uint8_t)(brs) & RFAL_NFCDEP_BRS_Dx_MASK ) /*!< Returns the DRI value from the given BRS byte */
#define rfalNfcDepBRS2DSI( brs ) (uint8_t)( ((uint8_t)(brs) >> RFAL_NFCDEP_BRS_DSI_POS) & RFAL_NFCDEP_BRS_Dx_MASK ) /*!< Returns the DSI value from the given BRS byte */
#define rfalNfcDepBRS2DSI( brs ) (uint8_t)( ((uint8_t)(brs) >> RFAL_NFCDEP_BRS_DSI_POS) & RFAL_NFCDEP_BRS_Dx_MASK ) /*!< Returns the DSI_ID value from the given BRS byte */
#define rfalNfcDepPP2LR( PPx ) ( ((uint8_t)(PPx) & RFAL_NFCDEP_PP_LR_MASK ) >> RFAL_NFCDEP_PP_LR_SHIFT) /*!< Returns the LR value from the given PPx byte */
#define rfalNfcDepLR2PP( LRx ) ( ((uint8_t)(LRx) << RFAL_NFCDEP_PP_LR_SHIFT) & RFAL_NFCDEP_PP_LR_MASK) /*!< Returns the PP byte with the given LRx value */
@ -332,7 +332,7 @@ typedef struct {
uint32_t dFWT; /*!< Delta FWT to be used (1/fc) */
uint8_t LR; /*!< Length Reduction coding the max payload */
uint16_t FS; /*!< Frame Size */
rfalBitRate DSI; /*!< Bit Rate coding from Initiator to Target */
rfalBitRate DSI_ID; /*!< Bit Rate coding from Initiator to Target */
rfalBitRate DRI; /*!< Bit Rate coding from Target to Initiator */
uint8_t DID; /*!< Device ID (RFAL_NFCDEP_DID_NO if no DID) */
uint8_t NAD; /*!< Node ADdress (RFAL_NFCDEP_NAD_NO if no NAD)*/

68
core/embed/io/nfc/rfal/source/rfal_isoDep.c
View File

@ -188,7 +188,7 @@
#define RFAL_ISODEP_PPS0_VALID_MASK (0xEFU) /*!< PPS REQ PPS0 valid coding mask ISO14443-4 5.4 */
#define RFAL_ISODEP_CMD_ATTRIB (0x1DU) /*!< ATTRIB command Digital 1.1 14.6.1 */
#define RFAL_ISODEP_ATTRIB_PARAM2_DSI_SHIFT (6U) /*!< ATTRIB PARAM2 DSI shift Digital 1.1 14.6.1 */
#define RFAL_ISODEP_ATTRIB_PARAM2_DSI_SHIFT (6U) /*!< ATTRIB PARAM2 DSI_ID shift Digital 1.1 14.6.1 */
#define RFAL_ISODEP_ATTRIB_PARAM2_DRI_SHIFT (4U) /*!< ATTRIB PARAM2 DRI shift Digital 1.1 14.6.1 */
#define RFAL_ISODEP_ATTRIB_PARAM2_DXI_MASK (0xF0U) /*!< ATTRIB PARAM2 DxI mask Digital 1.1 14.6.1 */
#define RFAL_ISODEP_ATTRIB_PARAM2_FSDI_MASK (0x0FU) /*!< ATTRIB PARAM2 FSDI mask Digital 1.1 14.6.1 */
@ -224,9 +224,9 @@
#define RFAL_ISODEP_PPS0_PPS1_PRESENT (0x11U) /*!< PPS0 byte indicating that PPS1 is present */
#define RFAL_ISODEP_PPS0_PPS1_NOT_PRESENT (0x01U) /*!< PPS0 byte indicating that PPS1 is NOT present */
#define RFAL_ISODEP_PPS1_DRI_MASK (0x03U) /*!< PPS1 byte DRI mask bits */
#define RFAL_ISODEP_PPS1_DSI_MASK (0x0CU) /*!< PPS1 byte DSI mask bits */
#define RFAL_ISODEP_PPS1_DSI_SHIFT (2U) /*!< PPS1 byte DSI shift */
#define RFAL_ISODEP_PPS1_DxI_MASK (0x03U) /*!< PPS1 byte DSI/DRS mask bits */
#define RFAL_ISODEP_PPS1_DSI_MASK (0x0CU) /*!< PPS1 byte DSI_ID mask bits */
#define RFAL_ISODEP_PPS1_DSI_SHIFT (2U) /*!< PPS1 byte DSI_ID shift */
#define RFAL_ISODEP_PPS1_DxI_MASK (0x03U) /*!< PPS1 byte DSI_ID/DRS mask bits */
/*! Delta Time for polling during Activation (ATS) : 20ms Digital 1.0 11.7.1.1 & A.7 */
@ -463,12 +463,12 @@ static void rfalIsoDepApdu2IBLockParam( rfalIsoDepApduTxRxParam apduParam, rfalI
#if RFAL_FEATURE_NFCA
static ReturnCode rfalIsoDepStartRATS( rfalIsoDepFSxI FSDI, uint8_t DID, rfalIsoDepAts *ats, uint8_t *atsLen );
static ReturnCode rfalIsoDepGetRATSStatus( void );
static ReturnCode rfalIsoDepStartPPS( uint8_t DID, rfalBitRate DSI, rfalBitRate DRI, rfalIsoDepPpsRes *ppsRes );
static ReturnCode rfalIsoDepStartPPS( uint8_t DID, rfalBitRate DSI_ID, rfalBitRate DRI, rfalIsoDepPpsRes *ppsRes );
static ReturnCode rfalIsoDepGetPPSSTatus( void );
#endif /* RFAL_FEATURE_NFCA */
#if RFAL_FEATURE_NFCB
static ReturnCode rfalIsoDepStartATTRIB( const uint8_t* nfcid0, uint8_t PARAM1, rfalBitRate DSI, rfalBitRate DRI, rfalIsoDepFSxI FSDI, uint8_t PARAM3, uint8_t DID, const uint8_t* HLInfo, uint8_t HLInfoLen, uint32_t fwt, rfalIsoDepAttribRes *attribRes, uint8_t *attribResLen );
static ReturnCode rfalIsoDepStartATTRIB( const uint8_t* nfcid0, uint8_t PARAM1, rfalBitRate DSI_ID, rfalBitRate DRI, rfalIsoDepFSxI FSDI, uint8_t PARAM3, uint8_t DID, const uint8_t* HLInfo, uint8_t HLInfoLen, uint32_t fwt, rfalIsoDepAttribRes *attribRes, uint8_t *attribResLen );
static ReturnCode rfalIsoDepGetATTRIBStatus( void );
#endif /* RFAL_FEATURE_NFCB */
@ -1296,7 +1296,7 @@ ReturnCode rfalIsoDepListenStartActivation( rfalIsoDepAtsParam *atsParam, const
actParam.isoDepDev->info.FSx = gIsoDep.fsx;
actParam.isoDepDev->info.FWT = gIsoDep.fwt;
actParam.isoDepDev->info.dFWT = 0;
actParam.isoDepDev->info.DSI = gIsoDep.txBR;
actParam.isoDepDev->info.DSI_ID = gIsoDep.txBR;
actParam.isoDepDev->info.DRI = gIsoDep.rxBR;
}
@ -1422,13 +1422,13 @@ ReturnCode rfalIsoDepListenGetActivationStatus( void )
{
rfalSetBitRate( dsi, dri );
gIsoDep.txBR = dsi; /* DSI codes the divisor from PICC to PCD */
gIsoDep.txBR = dsi; /* DSI_ID codes the divisor from PICC to PCD */
gIsoDep.rxBR = dri; /* DRI codes the divisor from PCD to PICC */
if(gIsoDep.actvParam.isoDepDev != NULL)
{
gIsoDep.actvParam.isoDepDev->info.DSI = dsi;
gIsoDep.actvParam.isoDepDev->info.DSI_ID = dsi;
gIsoDep.actvParam.isoDepDev->info.DRI = dri;
}
}
@ -1981,11 +1981,11 @@ ReturnCode rfalIsoDepRATS( rfalIsoDepFSxI FSDI, uint8_t DID, rfalIsoDepAts *ats
/*******************************************************************************/
static ReturnCode rfalIsoDepStartPPS( uint8_t DID, rfalBitRate DSI, rfalBitRate DRI, rfalIsoDepPpsRes *ppsRes )
static ReturnCode rfalIsoDepStartPPS( uint8_t DID, rfalBitRate DSI_ID, rfalBitRate DRI, rfalIsoDepPpsRes *ppsRes )
{
rfalTransceiveContext ctx;
if( (ppsRes == NULL) || (DSI > RFAL_BR_848) || (DRI > RFAL_BR_848) || ((DID > RFAL_ISODEP_DID_MAX) && (DID != RFAL_ISODEP_NO_DID)) )
if( (ppsRes == NULL) || (DSI_ID > RFAL_BR_848) || (DRI > RFAL_BR_848) || ((DID > RFAL_ISODEP_DID_MAX) && (DID != RFAL_ISODEP_NO_DID)) )
{
return RFAL_ERR_PARAM;
}
@ -1996,7 +1996,7 @@ static ReturnCode rfalIsoDepStartPPS( uint8_t DID, rfalBitRate DSI, rfalBitRate
/* Compose PPS Request */
gIsoDep.actv.ppsReq.PPSS = (RFAL_ISODEP_PPS_SB | (DID & RFAL_ISODEP_PPS_SB_DID_MASK));
gIsoDep.actv.ppsReq.PPS0 = RFAL_ISODEP_PPS_PPS0_PPS1_PRESENT;
gIsoDep.actv.ppsReq.PPS1 = (RFAL_ISODEP_PPS_PPS1 | ((((uint8_t)DSI<<RFAL_ISODEP_PPS_PPS1_DSI_SHIFT) | (uint8_t)DRI) & RFAL_ISODEP_PPS_PPS1_DXI_MASK));
gIsoDep.actv.ppsReq.PPS1 = (RFAL_ISODEP_PPS_PPS1 | ((((uint8_t)DSI_ID<<RFAL_ISODEP_PPS_PPS1_DSI_SHIFT) | (uint8_t)DRI) & RFAL_ISODEP_PPS_PPS1_DXI_MASK));
rfalCreateByteFlagsTxRxContext( ctx, (uint8_t*)&gIsoDep.actv.ppsReq, sizeof(rfalIsoDepPpsReq), (uint8_t*)ppsRes, sizeof(rfalIsoDepPpsRes), &gIsoDep.rxBufLen, RFAL_TXRX_FLAGS_DEFAULT, RFAL_ISODEP_T4T_FWT_ACTIVATION );
return rfalStartTransceive( &ctx );
@ -2024,11 +2024,11 @@ static ReturnCode rfalIsoDepGetPPSSTatus( void )
/*******************************************************************************/
ReturnCode rfalIsoDepPPS( uint8_t DID, rfalBitRate DSI, rfalBitRate DRI, rfalIsoDepPpsRes *ppsRes )
ReturnCode rfalIsoDepPPS( uint8_t DID, rfalBitRate DSI_ID, rfalBitRate DRI, rfalIsoDepPpsRes *ppsRes )
{
ReturnCode ret;
RFAL_EXIT_ON_ERR( ret, rfalIsoDepStartPPS(DID, DSI, DRI, ppsRes) );
RFAL_EXIT_ON_ERR( ret, rfalIsoDepStartPPS(DID, DSI_ID, DRI, ppsRes) );
rfalRunBlocking( ret, rfalIsoDepGetPPSSTatus() );
return ret;
@ -2039,11 +2039,11 @@ ReturnCode rfalIsoDepPPS( uint8_t DID, rfalBitRate DSI, rfalBitRate DRI, rfalIso
#if RFAL_FEATURE_NFCB
static ReturnCode rfalIsoDepStartATTRIB( const uint8_t* nfcid0, uint8_t PARAM1, rfalBitRate DSI, rfalBitRate DRI, rfalIsoDepFSxI FSDI, uint8_t PARAM3, uint8_t DID, const uint8_t* HLInfo, uint8_t HLInfoLen, uint32_t fwt, rfalIsoDepAttribRes *attribRes, uint8_t *attribResLen )
static ReturnCode rfalIsoDepStartATTRIB( const uint8_t* nfcid0, uint8_t PARAM1, rfalBitRate DSI_ID, rfalBitRate DRI, rfalIsoDepFSxI FSDI, uint8_t PARAM3, uint8_t DID, const uint8_t* HLInfo, uint8_t HLInfoLen, uint32_t fwt, rfalIsoDepAttribRes *attribRes, uint8_t *attribResLen )
{
rfalTransceiveContext ctx;
if( (attribRes == NULL) || (attribResLen == NULL) || (DSI > RFAL_BR_848) || (DRI > RFAL_BR_848) || ((DID > RFAL_ISODEP_DID_MAX) && (DID != RFAL_ISODEP_NO_DID)) )
if( (attribRes == NULL) || (attribResLen == NULL) || (DSI_ID > RFAL_BR_848) || (DRI > RFAL_BR_848) || ((DID > RFAL_ISODEP_DID_MAX) && (DID != RFAL_ISODEP_NO_DID)) )
{
return RFAL_ERR_NONE;
}
@ -2056,7 +2056,7 @@ static ReturnCode rfalIsoDepStartATTRIB( const uint8_t* nfcid0, uint8_t PARAM1,
/* Compose ATTRIB command */
gIsoDep.actv.attribReq.cmd = RFAL_ISODEP_CMD_ATTRIB;
gIsoDep.actv.attribReq.Param.PARAM1 = PARAM1;
gIsoDep.actv.attribReq.Param.PARAM2 = ( ((((uint8_t)DSI<<RFAL_ISODEP_ATTRIB_PARAM2_DSI_SHIFT) | ((uint8_t)DRI<<RFAL_ISODEP_ATTRIB_PARAM2_DRI_SHIFT)) & RFAL_ISODEP_ATTRIB_PARAM2_DXI_MASK) | ((uint8_t)FSDI & RFAL_ISODEP_ATTRIB_PARAM2_FSDI_MASK) );
gIsoDep.actv.attribReq.Param.PARAM2 = ( ((((uint8_t)DSI_ID<<RFAL_ISODEP_ATTRIB_PARAM2_DSI_SHIFT) | ((uint8_t)DRI<<RFAL_ISODEP_ATTRIB_PARAM2_DRI_SHIFT)) & RFAL_ISODEP_ATTRIB_PARAM2_DXI_MASK) | ((uint8_t)FSDI & RFAL_ISODEP_ATTRIB_PARAM2_FSDI_MASK) );
gIsoDep.actv.attribReq.Param.PARAM3 = PARAM3;
gIsoDep.actv.attribReq.Param.PARAM4 = (DID & RFAL_ISODEP_ATTRIB_PARAM4_DID_MASK);
RFAL_MEMCPY(gIsoDep.actv.attribReq.nfcid0, nfcid0, RFAL_NFCB_NFCID0_LEN);
@ -2101,11 +2101,11 @@ static ReturnCode rfalIsoDepGetATTRIBStatus( void )
/*******************************************************************************/
ReturnCode rfalIsoDepATTRIB( const uint8_t* nfcid0, uint8_t PARAM1, rfalBitRate DSI, rfalBitRate DRI, rfalIsoDepFSxI FSDI, uint8_t PARAM3, uint8_t DID, const uint8_t* HLInfo, uint8_t HLInfoLen, uint32_t fwt, rfalIsoDepAttribRes *attribRes, uint8_t *attribResLen )
ReturnCode rfalIsoDepATTRIB( const uint8_t* nfcid0, uint8_t PARAM1, rfalBitRate DSI_ID, rfalBitRate DRI, rfalIsoDepFSxI FSDI, uint8_t PARAM3, uint8_t DID, const uint8_t* HLInfo, uint8_t HLInfoLen, uint32_t fwt, rfalIsoDepAttribRes *attribRes, uint8_t *attribResLen )
{
ReturnCode ret;
RFAL_EXIT_ON_ERR( ret, rfalIsoDepStartATTRIB( nfcid0, PARAM1, DSI, DRI, FSDI, PARAM3, DID, HLInfo, HLInfoLen, fwt, attribRes, attribResLen ) );
RFAL_EXIT_ON_ERR( ret, rfalIsoDepStartATTRIB( nfcid0, PARAM1, DSI_ID, DRI, FSDI, PARAM3, DID, HLInfo, HLInfoLen, fwt, attribRes, attribResLen ) );
rfalRunBlocking( ret, rfalIsoDepGetATTRIBStatus() );
return ret;
@ -2144,7 +2144,7 @@ ReturnCode rfalIsoDepPollAStartActivation( rfalIsoDepFSxI FSDI, uint8_t DID, rfa
/* Start RATS Transceive */
RFAL_EXIT_ON_ERR( ret, rfalIsoDepStartRATS( FSDI, DID, &rfalIsoDepDev->activation.A.Listener.ATS, &rfalIsoDepDev->activation.A.Listener.ATSLen ) );
rfalIsoDepDev->info.DSI = maxBR;
rfalIsoDepDev->info.DSI_ID = maxBR;
gIsoDep.actvDev = rfalIsoDepDev;
gIsoDep.cntRRetrys = gIsoDep.maxRetriesRATS;
gIsoDep.state = ISODEP_ST_PCD_ACT_RATS;
@ -2207,14 +2207,14 @@ ReturnCode rfalIsoDepPollAGetActivationStatus( void )
}
else /* ATS received */
{
maxBR = gIsoDep.actvDev->info.DSI; /* Retrieve requested max bitrate */
maxBR = gIsoDep.actvDev->info.DSI_ID; /* Retrieve requested max bitrate */
/*******************************************************************************/
/* Process ATS Response */
gIsoDep.actvDev->info.FWI = RFAL_ISODEP_FWI_DEFAULT; /* Default value EMVCo 2.6 5.7.2.6 */
gIsoDep.actvDev->info.SFGI = 0U;
gIsoDep.actvDev->info.MBL = 0U;
gIsoDep.actvDev->info.DSI = RFAL_BR_106;
gIsoDep.actvDev->info.DSI_ID = RFAL_BR_106;
gIsoDep.actvDev->info.DRI = RFAL_BR_106;
gIsoDep.actvDev->info.FSxI = (uint8_t)RFAL_ISODEP_FSXI_32; /* FSC default value is 32 bytes ISO14443-A 5.2.3 */
@ -2234,7 +2234,7 @@ ReturnCode rfalIsoDepPollAGetActivationStatus( void )
/* Check if TA is present */
if( (gIsoDep.actvDev->activation.A.Listener.ATS.T0 & RFAL_ISODEP_ATS_T0_TA_PRESENCE_MASK) != 0U )
{
rfalIsoDepCalcBitRate( maxBR, ((uint8_t*)&gIsoDep.actvDev->activation.A.Listener.ATS)[msgIt++], &gIsoDep.actvDev->info.DSI, &gIsoDep.actvDev->info.DRI );
rfalIsoDepCalcBitRate( maxBR, ((uint8_t*)&gIsoDep.actvDev->activation.A.Listener.ATS)[msgIt++], &gIsoDep.actvDev->info.DSI_ID, &gIsoDep.actvDev->info.DRI );
}
/* Check if TB is present */
@ -2274,10 +2274,10 @@ ReturnCode rfalIsoDepPollAGetActivationStatus( void )
/*******************************************************************************/
/* If higher bit rates are supported by both devices, send PPS */
if( (gIsoDep.actvDev->info.DSI != RFAL_BR_106) || (gIsoDep.actvDev->info.DRI != RFAL_BR_106) )
if( (gIsoDep.actvDev->info.DSI_ID != RFAL_BR_106) || (gIsoDep.actvDev->info.DRI != RFAL_BR_106) )
{
/* Send PPS */ /* PRQA S 0310 1 # MISRA 11.3 - Intentional safe cast to avoiding buffer duplication */
RFAL_EXIT_ON_ERR( ret, rfalIsoDepStartPPS( gIsoDep.actvDev->info.DID, gIsoDep.actvDev->info.DSI, gIsoDep.actvDev->info.DRI, (rfalIsoDepPpsRes*)&gIsoDep.ctrlBuf ));
RFAL_EXIT_ON_ERR( ret, rfalIsoDepStartPPS( gIsoDep.actvDev->info.DID, gIsoDep.actvDev->info.DSI_ID, gIsoDep.actvDev->info.DRI, (rfalIsoDepPpsRes*)&gIsoDep.ctrlBuf ));
gIsoDep.state = ISODEP_ST_PCD_ACT_PPS;
return RFAL_ERR_BUSY;
@ -2297,14 +2297,14 @@ ReturnCode rfalIsoDepPollAGetActivationStatus( void )
/* Check whether PPS has been acknowledge */
if( ret == RFAL_ERR_NONE )
{
/* DSI code the divisor from PICC to PCD */
/* DSI_ID code the divisor from PICC to PCD */
/* DRI code the divisor from PCD to PICC */
rfalSetBitRate( gIsoDep.actvDev->info.DRI, gIsoDep.actvDev->info.DSI );
rfalSetBitRate( gIsoDep.actvDev->info.DRI, gIsoDep.actvDev->info.DSI_ID );
}
else
{
/* If PPS has faled keep activation bit rate */
gIsoDep.actvDev->info.DSI = RFAL_BR_106;
gIsoDep.actvDev->info.DSI_ID = RFAL_BR_106;
gIsoDep.actvDev->info.DRI = RFAL_BR_106;
/* Ignore PPS response fail, proceed to data exchange */
@ -2400,13 +2400,13 @@ ReturnCode rfalIsoDepPollBStartActivation( rfalIsoDepFSxI FSDI, uint8_t DID, rfa
/* Calculate max Bit Rate */
rfalIsoDepCalcBitRate( maxBR, nfcbDev->sensbRes.protInfo.BRC, &rfalIsoDepDev->info.DSI, &rfalIsoDepDev->info.DRI );
rfalIsoDepCalcBitRate( maxBR, nfcbDev->sensbRes.protInfo.BRC, &rfalIsoDepDev->info.DSI_ID, &rfalIsoDepDev->info.DRI );
/***************************************************************************/
/* Send ATTRIB Command */
RFAL_EXIT_ON_ERR( ret, rfalIsoDepStartATTRIB( (const uint8_t*)&nfcbDev->sensbRes.nfcid0,
(((nfcbDev->sensbRes.protInfo.FwiAdcFo & RFAL_NFCB_SENSB_RES_ADC_ADV_FEATURE_MASK) != 0U) ? PARAM1 : RFAL_ISODEP_ATTRIB_REQ_PARAM1_DEFAULT),
rfalIsoDepDev->info.DSI,
rfalIsoDepDev->info.DSI_ID,
rfalIsoDepDev->info.DRI,
FSDI,
(gIsoDep.compMode == RFAL_COMPLIANCE_MODE_EMV) ? RFAL_NFCB_SENSB_RES_PROTO_ISO_MASK : (nfcbDev->sensbRes.protInfo.FsciProType & ( (RFAL_NFCB_SENSB_RES_PROTO_TR2_MASK<<RFAL_NFCB_SENSB_RES_PROTO_TR2_SHIFT) | RFAL_NFCB_SENSB_RES_PROTO_ISO_MASK)), /* EMVCo 2.6 6.4.1.9 */
@ -2452,9 +2452,9 @@ ReturnCode rfalIsoDepPollBGetActivationStatus( void )
gIsoDep.actvDev->info.MBL = (gIsoDep.actvDev->info.FSx * ((uint32_t)1U<<(mbli-1U)));
}
/* DSI code the divisor from PICC to PCD */
/* DSI_ID code the divisor from PICC to PCD */
/* DRI code the divisor from PCD to PICC */
rfalSetBitRate( gIsoDep.actvDev->info.DRI, gIsoDep.actvDev->info.DSI );
rfalSetBitRate( gIsoDep.actvDev->info.DRI, gIsoDep.actvDev->info.DSI_ID );
/* REMARK: SoF EoF TR0 and TR1 are not passed on to RF layer */
@ -2466,7 +2466,7 @@ ReturnCode rfalIsoDepPollBGetActivationStatus( void )
}
else
{
gIsoDep.actvDev->info.DSI = RFAL_BR_106;
gIsoDep.actvDev->info.DSI_ID = RFAL_BR_106;
gIsoDep.actvDev->info.DRI = RFAL_BR_106;
}
@ -2599,7 +2599,7 @@ ReturnCode rfalIsoDepPollHandleSParameters( rfalIsoDepDevice *rfalIsoDepDev, rfa
RFAL_EXIT_ON_ERR( ret, rfalSetBitRate( txBR, rxBR ) );
rfalIsoDepDev->info.DRI = txBR;
rfalIsoDepDev->info.DSI = rxBR;
rfalIsoDepDev->info.DSI_ID = rxBR;
return RFAL_ERR_NONE;
}

28
core/embed/io/nfc/rfal/source/rfal_nfcDep.c
View File

@ -1928,7 +1928,7 @@ static ReturnCode nfcipTargetHandleActivation( rfalNfcDepDevice *nfcDepDev, uint
{
/* Update Bitrate info */
/* PRQA S 4342 2 # MISRA 10.5 - Layout of enum rfalBitRate and definition of rfalNfcDepBRS2DSI guarantee no invalid enum values to be created */
nfcDepDev->info.DSI = (rfalBitRate)rfalNfcDepBRS2DSI( *outBRS ); /* DSI codes the bit rate from Initiator to Target */
nfcDepDev->info.DSI_ID = (rfalBitRate)rfalNfcDepBRS2DSI( *outBRS ); /* DSI_ID codes the bit rate from Initiator to Target */
nfcDepDev->info.DRI = (rfalBitRate)rfalNfcDepBRS2DRI( *outBRS ); /* DRI codes the bit rate from Target to Initiator */
/* Update Length Reduction and Frame Size */
@ -1940,7 +1940,7 @@ static ReturnCode nfcipTargetHandleActivation( rfalNfcDepDevice *nfcDepDev, uint
nfcDepDev->activation.Initiator.ATR_REQ.PPi |= rfalNfcDepLR2PP( gNfcip.cfg.lr );
}
rfalSetBitRate( RFAL_BR_KEEP, gNfcip.nfcDepDev->info.DSI );
rfalSetBitRate( RFAL_BR_KEEP, gNfcip.nfcDepDev->info.DSI_ID );
RFAL_EXIT_ON_ERR( ret, nfcipTx( NFCIP_CMD_PSL_RES, txBuf, NULL, 0, 0, NFCIP_NO_FWT ) );
}
@ -2264,7 +2264,7 @@ ReturnCode rfalNfcDepInitiatorHandleActivation( rfalNfcDepAtrParam* param, rfalB
nfcDepDev->info.FWT = rfalNfcDepCalculateRWT( nfcDepDev->info.WT );
nfcDepDev->info.dFWT = RFAL_NFCDEP_WT_DELTA;
rfalGetBitRate( &nfcDepDev->info.DSI, &nfcDepDev->info.DRI );
rfalGetBitRate( &nfcDepDev->info.DSI_ID, &nfcDepDev->info.DRI );
@ -2272,7 +2272,7 @@ ReturnCode rfalNfcDepInitiatorHandleActivation( rfalNfcDepAtrParam* param, rfalB
/* Check if a PSL needs to be sent */
/*******************************************************************************/
sendPSL = false;
PSL_BRS = rfalNfcDepDx2BRS( nfcDepDev->info.DSI ); /* Set current bit rate divisor on both directions */
PSL_BRS = rfalNfcDepDx2BRS( nfcDepDev->info.DSI_ID ); /* Set current bit rate divisor on both directions */
PSL_FSL = nfcDepDev->info.LR; /* Set current Frame Size */
@ -2307,7 +2307,7 @@ ReturnCode rfalNfcDepInitiatorHandleActivation( rfalNfcDepAtrParam* param, rfalB
/*******************************************************************************/
/* Check Baud rates */
/*******************************************************************************/
if( (nfcDepDev->info.DSI != desiredBR) && (desiredBR != RFAL_BR_KEEP) ) /* if desired BR is different */
if( (nfcDepDev->info.DSI_ID != desiredBR) && (desiredBR != RFAL_BR_KEEP) ) /* if desired BR is different */
{
if( nfcipDxIsSupported( (uint8_t)desiredBR, nfcDepDev->activation.Target.ATR_RES.BRt, nfcDepDev->activation.Target.ATR_RES.BSt ) ) /* if desired BR is supported */ /* MISRA 13.5 */
{
@ -2331,10 +2331,10 @@ ReturnCode rfalNfcDepInitiatorHandleActivation( rfalNfcDepAtrParam* param, rfalB
RFAL_EXIT_ON_ERR( ret, rfalNfcDepPSL(PSL_BRS, PSL_FSL) );
/* Check if bit rate has been changed */
if( nfcDepDev->info.DSI != desiredBR )
if( nfcDepDev->info.DSI_ID != desiredBR )
{
/* Check if device was in Passive NFC-A and went to higher bit rates, use NFC-F */
if( (nfcDepDev->info.DSI == RFAL_BR_106) && (gNfcip.cfg.commMode == RFAL_NFCDEP_COMM_PASSIVE) )
if( (nfcDepDev->info.DSI_ID == RFAL_BR_106) && (gNfcip.cfg.commMode == RFAL_NFCDEP_COMM_PASSIVE) )
{
#if RFAL_FEATURE_NFCF
@ -2346,10 +2346,10 @@ ReturnCode rfalNfcDepInitiatorHandleActivation( rfalNfcDepAtrParam* param, rfalB
}
nfcDepDev->info.DRI = desiredBR; /* DSI Bit Rate coding from Initiator to Target */
nfcDepDev->info.DSI = desiredBR; /* DRI Bit Rate coding from Target to Initiator */
nfcDepDev->info.DRI = desiredBR; /* DSI_ID Bit Rate coding from Initiator to Target */
nfcDepDev->info.DSI_ID = desiredBR; /* DRI Bit Rate coding from Target to Initiator */
rfalSetBitRate( nfcDepDev->info.DSI, nfcDepDev->info.DRI );
rfalSetBitRate( nfcDepDev->info.DSI_ID, nfcDepDev->info.DRI );
}
@ -2451,7 +2451,7 @@ ReturnCode rfalNfcDepListenStartActivation( const rfalNfcDepTargetParam *param,
rxParam.nfcDepDev->info.FWT = NFCIP_NO_FWT;
rxParam.nfcDepDev->info.dFWT = NFCIP_NO_FWT;
rfalGetBitRate( &rxParam.nfcDepDev->info.DSI, &rxParam.nfcDepDev->info.DRI );
rfalGetBitRate( &rxParam.nfcDepDev->info.DSI_ID, &rxParam.nfcDepDev->info.DRI );
/* Store Device Info location, updated upon a PSL */
@ -2523,16 +2523,16 @@ ReturnCode rfalNfcDepListenGetActivationStatus( void )
if( BRS != RFAL_NFCDEP_BRS_MAINTAIN )
{
/* DSI codes the bit rate from Initiator to Target */
/* DSI_ID codes the bit rate from Initiator to Target */
/* DRI codes the bit rate from Target to Initiator */
if( gNfcip.cfg.commMode == RFAL_NFCDEP_COMM_ACTIVE )
{
RFAL_EXIT_ON_ERR( err, rfalSetMode( RFAL_MODE_LISTEN_ACTIVE_P2P, gNfcip.nfcDepDev->info.DRI, gNfcip.nfcDepDev->info.DSI ));
RFAL_EXIT_ON_ERR( err, rfalSetMode( RFAL_MODE_LISTEN_ACTIVE_P2P, gNfcip.nfcDepDev->info.DRI, gNfcip.nfcDepDev->info.DSI_ID ));
}
else
{
RFAL_EXIT_ON_ERR( err, rfalSetMode( ((RFAL_BR_106 == gNfcip.nfcDepDev->info.DRI) ? RFAL_MODE_LISTEN_NFCA : RFAL_MODE_LISTEN_NFCF), gNfcip.nfcDepDev->info.DRI, gNfcip.nfcDepDev->info.DSI ));
RFAL_EXIT_ON_ERR( err, rfalSetMode( ((RFAL_BR_106 == gNfcip.nfcDepDev->info.DRI) ? RFAL_MODE_LISTEN_NFCA : RFAL_MODE_LISTEN_NFCF), gNfcip.nfcDepDev->info.DRI, gNfcip.nfcDepDev->info.DSI_ID ));
}
}
break;

2
core/embed/io/nfc/rfal/source/rfal_nfcv.c
View File

@ -242,7 +242,7 @@ ReturnCode rfalNfcvPollerInventory(rfalNfcvNumSlots nSlots, uint8_t maskLen,
ReturnCode ret;
rfalNfcvInventoryReq invReq;
uint16_t rxLen;
`
if (((maskVal == NULL) && (maskLen != 0U)) || (invRes == NULL)) {
return RFAL_ERR_PARAM;
}