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https://github.com/trezor/trezor-firmware.git
synced 2024-12-24 15:28:10 +00:00
fix(core): we don't need separate linker script for zkp
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parent
d505edaaa0
commit
9e0cfa6783
@ -418,7 +418,7 @@ if TREZOR_MODEL == 'T':
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CPU_ASFLAGS = '-mthumb -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16'
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CPU_CCFLAGS = '-mthumb -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -mtune=cortex-m4 '
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CPU_MODEL = 'STM32F427xx'
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LD_VARIANT = '_zkp' if FEATURE_FLAGS["SECP256K1_ZKP"] else ''
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LD_VARIANT = ''
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RUST_TARGET = 'thumbv7em-none-eabihf'
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elif TREZOR_MODEL == '1':
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CPU_ASFLAGS = '-mthumb -mcpu=cortex-m3 -mfloat-abi=soft'
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@ -1,80 +0,0 @@
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/* TREZORv2 firmware linker script */
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ENTRY(reset_handler)
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MEMORY {
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FLASH (rx) : ORIGIN = 0x08040000, LENGTH = 768K
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FLASH2 (r) : ORIGIN = 0x08120000, LENGTH = 896K
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CCMRAM (wal) : ORIGIN = 0x10000000, LENGTH = 64K
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SRAM (wal) : ORIGIN = 0x20000000, LENGTH = 192K
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}
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main_stack_base = ORIGIN(SRAM) + LENGTH(SRAM); /* 8-byte aligned full descending stack */
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_estack = main_stack_base;
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/* used by the startup code to populate variables used by the C code */
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data_lma = LOADADDR(.data);
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data_vma = ADDR(.data);
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data_size = SIZEOF(.data);
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/* used by the startup code to wipe memory */
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ccmram_start = ORIGIN(CCMRAM);
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ccmram_end = ORIGIN(CCMRAM) + LENGTH(CCMRAM);
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/* used by the startup code to wipe memory */
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sram_start = ORIGIN(SRAM);
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sram_end = ORIGIN(SRAM) + LENGTH(SRAM);
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_ram_start = sram_start;
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_ram_end = sram_end;
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_codelen = LENGTH(FLASH) - SIZEOF(.vendorheader) - SIZEOF(.header) + SIZEOF(.flash2);
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_flash_start = ORIGIN(FLASH);
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_flash_end = ORIGIN(FLASH) + LENGTH(FLASH);
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_heap_start = ADDR(.heap);
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_heap_end = ADDR(.heap) + SIZEOF(.heap);
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SECTIONS {
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.vendorheader : ALIGN(4) {
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KEEP(*(.vendorheader))
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} >FLASH AT>FLASH
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.header : ALIGN(4) {
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KEEP(*(.header));
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} >FLASH AT>FLASH
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.flash2 : ALIGN(512) {
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build/firmware/frozen_mpy.o(.rodata*);
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build/firmware/vendor/secp256k1-zkp/src/secp256k1.o(.rodata*);
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. = ALIGN(512);
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} >FLASH2 AT>FLASH2
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.flash : ALIGN(512) {
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KEEP(*(.vector_table));
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. = ALIGN(4);
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*(.text*);
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. = ALIGN(4);
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*(.rodata*);
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. = ALIGN(4);
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*(.bootloader*);
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. = ALIGN(512);
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} >FLASH AT>FLASH
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.data : ALIGN(4) {
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*(.data*);
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. = ALIGN(512);
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} >SRAM AT>FLASH
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.bss : ALIGN(4) {
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*(.bss*);
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. = ALIGN(4);
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} >SRAM
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.heap : ALIGN(4) {
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. = 37K; /* this acts as a build time assertion that at least this much memory is available for heap use */
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. = ABSOLUTE(sram_end - 16K); /* this explicitly sets the end of the heap effectively giving the stack at most 16K */
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} >SRAM
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.stack : ALIGN(8) {
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. = 4K; /* this acts as a build time assertion that at least this much memory is available for stack use */
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} >SRAM
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}
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