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boardloader, bootloader: jump_to memory clearing and simplify code to asm

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This commit is contained in:
mcudev 2017-10-08 13:25:56 -04:00 committed by Pavol Rusnak
parent acca6a0945
commit 8d3540c858
5 changed files with 42 additions and 7 deletions
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2
SConscript.bootloader
View File

@ -76,6 +76,7 @@ SOURCE_STMHAL = [
]
SOURCE_BOOTLOADER = [
'embed/common/util.s',
'embed/bootloader/startup.S',
'embed/bootloader/header.S',
'embed/bootloader/main.c',
@ -141,6 +142,7 @@ env.Replace(
'MCU_SERIES_F4',
'PB_FIELD_16BIT',
] + CPPDEFINES_MOD,
ASFLAGS='-mthumb -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16',
ASPPFLAGS='$CFLAGS $CCFLAGS', )
env.Replace(

1
SConscript.firmware
View File

@ -344,6 +344,7 @@ env.Replace(
'STM32F405xx',
('STM32_HAL_H', '"<stm32f4xx_hal.h>"'),
] + CPPDEFINES_MOD,
ASFLAGS='-mthumb -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16',
ASPPFLAGS='$CFLAGS $CCFLAGS', )
env.Replace(

7
embed/bootloader/memory.ld
View File

@ -97,3 +97,10 @@ _ram_start = ORIGIN(RAM);
_ram_end = ORIGIN(RAM) + LENGTH(RAM);
_heap_start = _ebss; /* heap starts just after statically allocated memory */
_heap_end = 0x2001c000; /* tunable */
/* used by the startup code to wipe memory */
ccmram_start = ORIGIN(CCMRAM);
ccmram_end = ORIGIN(CCMRAM) + LENGTH(CCMRAM);
/* used by the startup code to wipe memory */
sram_start = ORIGIN(RAM);
sram_end = ORIGIN(RAM) + LENGTH(RAM);

32
embed/common/util.s
View File

@ -16,4 +16,36 @@ memset_reg:
bne .L_loop_begin
bx lr
.set SCB_VTOR, 0xE000ED08 // reference "Cortex-M4 Devices Generic User Guide" section 4.3
.global jump_to
.type jump_to, STT_FUNC
jump_to:
mov r4, r0 // save input argument r0
// todo: this subroutine re-points the exception handlers before the C code
// that comprises them have been given a good environment to run.
// so, the this needs to disable interrupts before the VTOR
// switch and then the reset_handler of the next stage needs to re-enable interrupts.
// todo: CPSID f
// wipe memory at the end of the current stage of code
ldr r0, =ccmram_start // r0 - point to beginning of CCMRAM
ldr r1, =ccmram_end // r1 - point to byte after the end of CCMRAM
ldr r2, =0 // r2 - the word-sized value to be written
bl memset_reg
ldr r0, =sram_start // r0 - point to beginning of SRAM
ldr r1, =sram_end // r1 - point to byte after the end of SRAM
ldr r2, =0 // r2 - the word-sized value to be written
bl memset_reg
// todo: need to think through exception handler races for the VTOR and MSP change below
// there are probably corner cases still.
// use the next stage's exception handlers
ldr r0, =SCB_VTOR
str r4, [r0]
// give the next stage a fresh main stack pointer
ldr r0, [r4]
msr msp, r0
// go on to the next stage
ldr r0, [r4, 4]
bx r0
.end

7
embed/trezorhal/common.c
View File

@ -54,13 +54,6 @@ void periph_init(void) {
DWT->CTRL |= DWT_CTRL_CYCCNTENA_Msk; // Enable Cycle Count Register
}
void jump_to(uint32_t start)
{
SCB->VTOR = start;
__asm__ volatile("msr msp, %0"::"g" (*(volatile uint32_t *)start));
(*(void (**)())(start + 4))();
}
void hal_delay(uint32_t ms)
{
HAL_Delay(ms);