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build(core): account for ARM unwinding info in memory layout
Currently the 8-byte section is inserted under semi-random name like .ARM.exidx.text._ZN50_$LT$T$u20$as$u20$core..convert..Into$LT$U$GT$$GT$4into17h79ccbc4bdfe3f200E. This makes it hard to include it in _codelen that is later baked into firmware header. This change adds new section because including it in .flash causes linker error due to mixing "ordered" and "unordered" sections. By renaming .exidx to /DISCARD/ we'd drop this info, there may also exist compiler flag to do that.
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@ -26,8 +26,7 @@ sram_end = ORIGIN(SRAM) + LENGTH(SRAM);
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_ram_start = sram_start;
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_ram_end = sram_end;
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/* .ARM.exidx.text.__aeabi_ui2f is probably not needed as long as we are using panic = "abort" */
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_codelen = SIZEOF(.flash) + SIZEOF(.data) + SIZEOF(.ARM.exidx) + SIZEOF(.ARM.exidx.text.__aeabi_ui2f);
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_codelen = SIZEOF(.flash) + SIZEOF(.data) + SIZEOF(.exidx);
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_flash_start = ORIGIN(FLASH);
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_flash_end = ORIGIN(FLASH) + LENGTH(FLASH);
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_heap_start = ADDR(.heap);
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@ -47,6 +46,12 @@ SECTIONS {
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. = ALIGN(512);
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} >FLASH AT>FLASH
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/* exception handling info generated by llvm which should consist of 8 bytes of "cantunwind" */
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.exidx : ALIGN(4) {
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*(.ARM.exidx*);
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. = ALIGN(4);
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} >FLASH AT>FLASH
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.data : ALIGN(4) {
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*(.data*);
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. = ALIGN(512);
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@ -26,8 +26,7 @@ sram_end = ORIGIN(SRAM) + LENGTH(SRAM);
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_ram_start = sram_start;
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_ram_end = sram_end;
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/* .ARM.exidx.text.__aeabi_ui2f is probably not needed as long as we are using panic = "abort" */
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_codelen = SIZEOF(.flash) + SIZEOF(.data) + SIZEOF(.ARM.exidx.text.__aeabi_ui2f);
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_codelen = SIZEOF(.flash) + SIZEOF(.data) + SIZEOF(.exidx);
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_flash_start = ORIGIN(FLASH);
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_flash_end = ORIGIN(FLASH) + LENGTH(FLASH);
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_heap_start = ADDR(.heap);
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@ -47,6 +46,12 @@ SECTIONS {
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. = ALIGN(512);
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} >FLASH AT>FLASH
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/* exception handling info generated by llvm which should consist of 8 bytes of "cantunwind" */
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.exidx : ALIGN(4) {
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*(.ARM.exidx*);
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. = ALIGN(4);
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} >FLASH AT>FLASH
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.data : ALIGN(4) {
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*(.data*);
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. = ALIGN(512);
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