style(core): style for systemview

core/embed/firmware/main.c

@@ -51,7 +51,6 @@
 #include "supervise.h"
 #include "touch.h"
 
-
 int main(void) {
   // initialize pseudo-random number generator
   drbg_init();

core/embed/firmware/systemview.c

@@ -1,10 +1,10 @@
 #ifdef SYSTEM_VIEW
 
-#include <stdint.h>
 #include "systemview.h"
+#include <stdint.h>
 
-#include "SEGGER_SYSVIEW_Conf.h"
 #include "SEGGER_SYSVIEW.h"
+#include "SEGGER_SYSVIEW_Conf.h"
 
 #define SYSTICK ((SYSTICK_REGS*)0xE000E010)
 #define SCS ((SCS_REGS*)0xE000ED00)
@@ -23,7 +23,8 @@ typedef struct {
   volatile unsigned int CPUID;  // CPUID Base Register
   volatile unsigned int ICSR;   // Interrupt Control and State Register
   volatile unsigned int VTOR;   // Vector Table Offset Register
-    volatile unsigned int AIRCR;       // Application Interrupt and Reset Control Register
+  volatile unsigned int
+      AIRCR;  // Application Interrupt and Reset Control Register
   volatile unsigned int SCR;    // System Control Register
   volatile unsigned int CCR;    // Configuration and Control Register
   volatile unsigned int SHPR1;  // System Handler Priority Register 1
@@ -61,8 +62,7 @@ uint32_t svc_get_dwt_cyccnt() {
   return cyccnt_cycles;
 }
 
-U32 SEGGER_SYSVIEW_X_GetInterruptId()
-{
+U32 SEGGER_SYSVIEW_X_GetInterruptId() {
   return ((*(U32*)(0xE000ED04)) & 0x1FF);
 }
 
@@ -74,12 +74,15 @@ void enable_systemview() {
   //
   // Configure SysTick and debug monitor interrupt priorities
   // Low value means high priority
-    // A maximum of 8 priority bits and a minimum of 3 bits is implemented per interrupt.
-    // How many bits are implemented depends on the actual CPU being used
-    // If less than 8 bits are supported, the lower bits of the priority byte are RAZ.
-    // In order to make sure that priority of monitor and SysTick always differ, please make sure that the difference is visible in the highest 3 bits
+  // A maximum of 8 priority bits and a minimum of 3 bits is implemented per
+  // interrupt. How many bits are implemented depends on the actual CPU being
+  // used If less than 8 bits are supported, the lower bits of the priority byte
+  // are RAZ. In order to make sure that priority of monitor and SysTick always
+  // differ, please make sure that the difference is visible in the highest 3
+  // bits
   v = SCS->SHPR3;
-    v |= (0xFFuL << 24);   // Lowest prio for SysTick so SystemView does not get interrupted by Systick
+  v |= (0xFFuL << 24);  // Lowest prio for SysTick so SystemView does not get
+                        // interrupted by Systick
   SCS->SHPR3 = v;
   //
   // Configure SysTick interrupt
@@ -89,7 +92,6 @@ void enable_systemview() {
   SYSTICK->RVR = (SystemCoreClock / 1000) - 1;  // set reload
   SYSTICK->CVR = 0x00;                          // set counter
   SYSTICK->CSR = 0x07;                          // enable systick
-
 }
 
 #endif

core/embed/firmware/systemview.h

@@ -20,4 +20,4 @@ uint32_t svc_get_dwt_cyccnt();
 #define SEGGER_SYSVIEW_RecordExitISR()
 #endif
 
-#endif //CORE_SYSTEMVIEW_H
+#endif  // CORE_SYSTEMVIEW_H

tools/style.c.exclude

@@ -13,3 +13,4 @@
 ^\./crypto/sha2
 ^\./crypto/sha3
 ^\./legacy/vendor
+^\./core/embed/segger