style(core): style for systemview

pull/1432/head
Ondrej Mikle 3 years ago committed by Pavol Rusnak
parent 0abcb57840
commit 869cfbbd1c

@ -51,7 +51,6 @@
#include "supervise.h" #include "supervise.h"
#include "touch.h" #include "touch.h"
int main(void) { int main(void) {
// initialize pseudo-random number generator // initialize pseudo-random number generator
drbg_init(); drbg_init();

@ -1,10 +1,10 @@
#ifdef SYSTEM_VIEW #ifdef SYSTEM_VIEW
#include <stdint.h>
#include "systemview.h" #include "systemview.h"
#include <stdint.h>
#include "SEGGER_SYSVIEW_Conf.h"
#include "SEGGER_SYSVIEW.h" #include "SEGGER_SYSVIEW.h"
#include "SEGGER_SYSVIEW_Conf.h"
#define SYSTICK ((SYSTICK_REGS*)0xE000E010) #define SYSTICK ((SYSTICK_REGS*)0xE000E010)
#define SCS ((SCS_REGS*)0xE000ED00) #define SCS ((SCS_REGS*)0xE000ED00)
@ -23,7 +23,8 @@ typedef struct {
volatile unsigned int CPUID; // CPUID Base Register volatile unsigned int CPUID; // CPUID Base Register
volatile unsigned int ICSR; // Interrupt Control and State Register volatile unsigned int ICSR; // Interrupt Control and State Register
volatile unsigned int VTOR; // Vector Table Offset Register volatile unsigned int VTOR; // Vector Table Offset Register
volatile unsigned int AIRCR; // Application Interrupt and Reset Control Register volatile unsigned int
AIRCR; // Application Interrupt and Reset Control Register
volatile unsigned int SCR; // System Control Register volatile unsigned int SCR; // System Control Register
volatile unsigned int CCR; // Configuration and Control Register volatile unsigned int CCR; // Configuration and Control Register
volatile unsigned int SHPR1; // System Handler Priority Register 1 volatile unsigned int SHPR1; // System Handler Priority Register 1
@ -61,8 +62,7 @@ uint32_t svc_get_dwt_cyccnt() {
return cyccnt_cycles; return cyccnt_cycles;
} }
U32 SEGGER_SYSVIEW_X_GetInterruptId() U32 SEGGER_SYSVIEW_X_GetInterruptId() {
{
return ((*(U32*)(0xE000ED04)) & 0x1FF); return ((*(U32*)(0xE000ED04)) & 0x1FF);
} }
@ -74,12 +74,15 @@ void enable_systemview() {
// //
// Configure SysTick and debug monitor interrupt priorities // Configure SysTick and debug monitor interrupt priorities
// Low value means high priority // Low value means high priority
// A maximum of 8 priority bits and a minimum of 3 bits is implemented per interrupt. // A maximum of 8 priority bits and a minimum of 3 bits is implemented per
// How many bits are implemented depends on the actual CPU being used // interrupt. How many bits are implemented depends on the actual CPU being
// If less than 8 bits are supported, the lower bits of the priority byte are RAZ. // used If less than 8 bits are supported, the lower bits of the priority byte
// In order to make sure that priority of monitor and SysTick always differ, please make sure that the difference is visible in the highest 3 bits // are RAZ. In order to make sure that priority of monitor and SysTick always
// differ, please make sure that the difference is visible in the highest 3
// bits
v = SCS->SHPR3; v = SCS->SHPR3;
v |= (0xFFuL << 24); // Lowest prio for SysTick so SystemView does not get interrupted by Systick v |= (0xFFuL << 24); // Lowest prio for SysTick so SystemView does not get
// interrupted by Systick
SCS->SHPR3 = v; SCS->SHPR3 = v;
// //
// Configure SysTick interrupt // Configure SysTick interrupt
@ -89,7 +92,6 @@ void enable_systemview() {
SYSTICK->RVR = (SystemCoreClock / 1000) - 1; // set reload SYSTICK->RVR = (SystemCoreClock / 1000) - 1; // set reload
SYSTICK->CVR = 0x00; // set counter SYSTICK->CVR = 0x00; // set counter
SYSTICK->CSR = 0x07; // enable systick SYSTICK->CSR = 0x07; // enable systick
} }
#endif #endif

@ -13,3 +13,4 @@
^\./crypto/sha2 ^\./crypto/sha2
^\./crypto/sha3 ^\./crypto/sha3
^\./legacy/vendor ^\./legacy/vendor
^\./core/embed/segger

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