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trezorhal: move irq handlers to subsystems

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pull/25/head
Jan Pochyla 7 years ago
parent 935e9b2912
commit 462f6bab7f
5 changed files with 110 additions and 447 deletions
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12
micropython/trezorhal/flash.c
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@ -9,3 +9,15 @@ int flash_init(void) {
return 0;
}
void FLASH_IRQHandler(void) {
// This calls the real flash IRQ handler, if needed
/*
uint32_t flash_cr = FLASH->CR;
if ((flash_cr & FLASH_IT_EOP) || (flash_cr & FLASH_IT_ERR)) {
HAL_FLASH_IRQHandler();
}
*/
// This call the storage IRQ handler, to check if the flash cache needs flushing
// storage_irq_handler();
}

1
micropython/trezorhal/rng.c
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@ -1,7 +1,6 @@
#include STM32_HAL_H
static RNG_HandleTypeDef rng_handle = {
.State = HAL_RNG_STATE_RESET,
.Instance = RNG,
};

446
micropython/trezorhal/stm32_it.c
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@ -77,8 +77,6 @@
#define IRQ_EXIT(irq)
extern void __fatal_error(const char*);
extern PCD_HandleTypeDef pcd_fs_handle;
extern PCD_HandleTypeDef pcd_hs_handle;
/******************************************************************************/
/* Cortex-M4 Processor Exceptions Handlers */
@ -305,447 +303,3 @@ void SysTick_Handler(void) {
// dma_idle_handler(uwTick);
// }
}
/******************************************************************************/
/* STM32F4xx Peripherals Interrupt Handlers */
/* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */
/* available peripheral interrupt handler's name please refer to the startup */
/* file (startup_stm32f4xx.s). */
/******************************************************************************/
/**
* @brief This function handles USB-On-The-Go FS global interrupt request.
* @param None
* @retval None
*/
#if defined(USE_USB_FS)
void OTG_FS_IRQHandler(void) {
IRQ_ENTER(OTG_FS_IRQn);
HAL_PCD_IRQHandler(&pcd_fs_handle);
IRQ_EXIT(OTG_FS_IRQn);
}
#endif
#if defined(USE_USB_HS)
void OTG_HS_IRQHandler(void) {
IRQ_ENTER(OTG_HS_IRQn);
HAL_PCD_IRQHandler(&pcd_hs_handle);
IRQ_EXIT(OTG_HS_IRQn);
}
#endif
#if defined(USE_USB_FS) || defined(USE_USB_HS)
/**
* @brief This function handles USB OTG Common FS/HS Wakeup functions.
* @param *pcd_handle for FS or HS
* @retval None
*/
STATIC void OTG_CMD_WKUP_Handler(PCD_HandleTypeDef *pcd_handle) {
if (pcd_handle->Init.low_power_enable) {
/* Reset SLEEPDEEP bit of Cortex System Control Register */
SCB->SCR &= (uint32_t)~((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk));
/* Configures system clock after wake-up from STOP: enable HSE, PLL and select
PLL as system clock source (HSE and PLL are disabled in STOP mode) */
__HAL_RCC_HSE_CONFIG(RCC_HSE_ON);
/* Wait till HSE is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
{}
/* Enable the main PLL. */
__HAL_RCC_PLL_ENABLE();
/* Wait till PLL is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
{}
/* Select PLL as SYSCLK */
MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, RCC_SYSCLKSOURCE_PLLCLK);
while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL)
{}
/* ungate PHY clock */
__HAL_PCD_UNGATE_PHYCLOCK(pcd_handle);
}
}
#endif
#if defined(USE_USB_FS)
/**
* @brief This function handles USB OTG FS Wakeup IRQ Handler.
* @param None
* @retval None
*/
void OTG_FS_WKUP_IRQHandler(void) {
IRQ_ENTER(OTG_FS_WKUP_IRQn);
OTG_CMD_WKUP_Handler(&pcd_fs_handle);
/* Clear EXTI pending Bit*/
__HAL_USB_FS_EXTI_CLEAR_FLAG();
IRQ_EXIT(OTG_FS_WKUP_IRQn);
}
#endif
#if defined(USE_USB_HS)
/**
* @brief This function handles USB OTG HS Wakeup IRQ Handler.
* @param None
* @retval None
*/
void OTG_HS_WKUP_IRQHandler(void) {
IRQ_ENTER(OTG_HS_WKUP_IRQn);
OTG_CMD_WKUP_Handler(&pcd_hs_handle);
/* Clear EXTI pending Bit*/
__HAL_USB_HS_EXTI_CLEAR_FLAG();
IRQ_EXIT(OTG_HS_WKUP_IRQn);
}
#endif
/**
* @brief This function handles PPP interrupt request.
* @param None
* @retval None
*/
/*void PPP_IRQHandler(void)
{
}*/
// Handle a flash (erase/program) interrupt.
void FLASH_IRQHandler(void) {
IRQ_ENTER(FLASH_IRQn);
// This calls the real flash IRQ handler, if needed
/*
uint32_t flash_cr = FLASH->CR;
if ((flash_cr & FLASH_IT_EOP) || (flash_cr & FLASH_IT_ERR)) {
HAL_FLASH_IRQHandler();
}
*/
// This call the storage IRQ handler, to check if the flash cache needs flushing
// storage_irq_handler();
IRQ_EXIT(FLASH_IRQn);
}
/**
* @brief These functions handle the EXTI interrupt requests.
* @param None
* @retval None
*/
// void EXTI0_IRQHandler(void) {
// IRQ_ENTER(EXTI0_IRQn);
// Handle_EXTI_Irq(0);
// IRQ_EXIT(EXTI0_IRQn);
// }
// void EXTI1_IRQHandler(void) {
// IRQ_ENTER(EXTI1_IRQn);
// Handle_EXTI_Irq(1);
// IRQ_EXIT(EXTI1_IRQn);
// }
// void EXTI2_IRQHandler(void) {
// IRQ_ENTER(EXTI2_IRQn);
// Handle_EXTI_Irq(2);
// IRQ_EXIT(EXTI2_IRQn);
// }
// void EXTI3_IRQHandler(void) {
// IRQ_ENTER(EXTI3_IRQn);
// Handle_EXTI_Irq(3);
// IRQ_EXIT(EXTI3_IRQn);
// }
// void EXTI4_IRQHandler(void) {
// IRQ_ENTER(EXTI4_IRQn);
// Handle_EXTI_Irq(4);
// IRQ_EXIT(EXTI4_IRQn);
// }
// void EXTI9_5_IRQHandler(void) {
// IRQ_ENTER(EXTI9_5_IRQn);
// Handle_EXTI_Irq(5);
// Handle_EXTI_Irq(6);
// Handle_EXTI_Irq(7);
// Handle_EXTI_Irq(8);
// Handle_EXTI_Irq(9);
// IRQ_EXIT(EXTI9_5_IRQn);
// }
// void EXTI15_10_IRQHandler(void) {
// IRQ_ENTER(EXTI15_10_IRQn);
// Handle_EXTI_Irq(10);
// Handle_EXTI_Irq(11);
// Handle_EXTI_Irq(12);
// Handle_EXTI_Irq(13);
// Handle_EXTI_Irq(14);
// Handle_EXTI_Irq(15);
// IRQ_EXIT(EXTI15_10_IRQn);
// }
// void PVD_IRQHandler(void) {
// IRQ_ENTER(PVD_IRQn);
// Handle_EXTI_Irq(EXTI_PVD_OUTPUT);
// IRQ_EXIT(PVD_IRQn);
// }
// #if defined(MCU_SERIES_L4)
// void PVD_PVM_IRQHandler(void) {
// IRQ_ENTER(PVD_PVM_IRQn);
// Handle_EXTI_Irq(EXTI_PVD_OUTPUT);
// IRQ_EXIT(PVD_PVM_IRQn);
// }
// #endif
// void RTC_Alarm_IRQHandler(void) {
// IRQ_ENTER(RTC_Alarm_IRQn);
// Handle_EXTI_Irq(EXTI_RTC_ALARM);
// IRQ_EXIT(RTC_Alarm_IRQn);
// }
// #if defined(ETH) // The 407 has ETH, the 405 doesn't
// void ETH_WKUP_IRQHandler(void) {
// IRQ_ENTER(ETH_WKUP_IRQn);
// Handle_EXTI_Irq(EXTI_ETH_WAKEUP);
// IRQ_EXIT(ETH_WKUP_IRQn);
// }
// #endif
// void TAMP_STAMP_IRQHandler(void) {
// IRQ_ENTER(TAMP_STAMP_IRQn);
// Handle_EXTI_Irq(EXTI_RTC_TIMESTAMP);
// IRQ_EXIT(TAMP_STAMP_IRQn);
// }
// void RTC_WKUP_IRQHandler(void) {
// IRQ_ENTER(RTC_WKUP_IRQn);
// RTC->ISR &= ~(1 << 10); // clear wakeup interrupt flag
// Handle_EXTI_Irq(EXTI_RTC_WAKEUP); // clear EXTI flag and execute optional callback
// IRQ_EXIT(RTC_WKUP_IRQn);
// }
// void TIM1_BRK_TIM9_IRQHandler(void) {
// IRQ_ENTER(TIM1_BRK_TIM9_IRQn);
// timer_irq_handler(9);
// IRQ_EXIT(TIM1_BRK_TIM9_IRQn);
// }
// #if defined(MCU_SERIES_L4)
// void TIM1_BRK_TIM15_IRQHandler(void) {
// IRQ_ENTER(TIM1_BRK_TIM15_IRQn);
// timer_irq_handler(15);
// IRQ_EXIT(TIM1_BRK_TIM15_IRQn);
// }
// #endif
// void TIM1_UP_TIM10_IRQHandler(void) {
// IRQ_ENTER(TIM1_UP_TIM10_IRQn);
// timer_irq_handler(1);
// timer_irq_handler(10);
// IRQ_EXIT(TIM1_UP_TIM10_IRQn);
// }
// #if defined(MCU_SERIES_L4)
// void TIM1_UP_TIM16_IRQHandler(void) {
// IRQ_ENTER(TIM1_UP_TIM16_IRQn);
// timer_irq_handler(1);
// timer_irq_handler(16);
// IRQ_EXIT(TIM1_UP_TIM16_IRQn);
// }
// #endif
// void TIM1_TRG_COM_TIM11_IRQHandler(void) {
// IRQ_ENTER(TIM1_TRG_COM_TIM11_IRQn);
// timer_irq_handler(11);
// IRQ_EXIT(TIM1_TRG_COM_TIM11_IRQn);
// }
// #if defined(MCU_SERIES_L4)
// void TIM1_TRG_COM_TIM17_IRQHandler(void) {
// IRQ_ENTER(TIM1_TRG_COM_TIM17_IRQn);
// timer_irq_handler(17);
// IRQ_EXIT(TIM1_TRG_COM_TIM17_IRQn);
// }
// #endif
// void TIM1_CC_IRQHandler(void) {
// IRQ_ENTER(TIM1_CC_IRQn);
// timer_irq_handler(1);
// IRQ_EXIT(TIM1_CC_IRQn);
// }
// void TIM2_IRQHandler(void) {
// IRQ_ENTER(TIM2_IRQn);
// timer_irq_handler(2);
// IRQ_EXIT(TIM2_IRQn);
// }
// void TIM3_IRQHandler(void) {
// IRQ_ENTER(TIM3_IRQn);
// timer_irq_handler(3);
// IRQ_EXIT(TIM3_IRQn);
// }
// void TIM4_IRQHandler(void) {
// IRQ_ENTER(TIM4_IRQn);
// timer_irq_handler(4);
// IRQ_EXIT(TIM4_IRQn);
// }
// void TIM5_IRQHandler(void) {
// IRQ_ENTER(TIM5_IRQn);
// timer_irq_handler(5);
// HAL_TIM_IRQHandler(&TIM5_Handle);
// IRQ_EXIT(TIM5_IRQn);
// }
// #if defined(TIM6) // STM32F401 doesn't have TIM6
// void TIM6_DAC_IRQHandler(void) {
// IRQ_ENTER(TIM6_DAC_IRQn);
// timer_irq_handler(6);
// IRQ_EXIT(TIM6_DAC_IRQn);
// }
// #endif
// #if defined(TIM7) // STM32F401 doesn't have TIM7
// void TIM7_IRQHandler(void) {
// IRQ_ENTER(TIM7_IRQn);
// timer_irq_handler(7);
// IRQ_EXIT(TIM7_IRQn);
// }
// #endif
// #if defined(TIM8) // STM32F401 doesn't have TIM8
// void TIM8_BRK_TIM12_IRQHandler(void) {
// IRQ_ENTER(TIM8_BRK_TIM12_IRQn);
// timer_irq_handler(12);
// IRQ_EXIT(TIM8_BRK_TIM12_IRQn);
// }
// void TIM8_UP_TIM13_IRQHandler(void) {
// IRQ_ENTER(TIM8_UP_TIM13_IRQn);
// timer_irq_handler(8);
// timer_irq_handler(13);
// IRQ_EXIT(TIM8_UP_TIM13_IRQn);
// }
// #if defined(MCU_SERIES_L4)
// void TIM8_UP_IRQHandler(void) {
// IRQ_ENTER(TIM8_UP_IRQn);
// timer_irq_handler(8);
// IRQ_EXIT(TIM8_UP_IRQn);
// }
// #endif
// void TIM8_CC_IRQHandler(void) {
// IRQ_ENTER(TIM8_CC_IRQn);
// timer_irq_handler(8);
// IRQ_EXIT(TIM8_CC_IRQn);
// }
// void TIM8_TRG_COM_TIM14_IRQHandler(void) {
// IRQ_ENTER(TIM8_TRG_COM_TIM14_IRQn);
// timer_irq_handler(14);
// IRQ_EXIT(TIM8_TRG_COM_TIM14_IRQn);
// }
// #endif
// // UART/USART IRQ handlers
// void USART1_IRQHandler(void) {
// IRQ_ENTER(USART1_IRQn);
// uart_irq_handler(1);
// IRQ_EXIT(USART1_IRQn);
// }
// void USART2_IRQHandler(void) {
// IRQ_ENTER(USART2_IRQn);
// uart_irq_handler(2);
// IRQ_EXIT(USART2_IRQn);
// }
// void USART3_IRQHandler(void) {
// IRQ_ENTER(USART3_IRQn);
// uart_irq_handler(3);
// IRQ_EXIT(USART3_IRQn);
// }
// void UART4_IRQHandler(void) {
// IRQ_ENTER(UART4_IRQn);
// uart_irq_handler(4);
// IRQ_EXIT(UART4_IRQn);
// }
// void UART5_IRQHandler(void) {
// IRQ_ENTER(UART5_IRQn);
// uart_irq_handler(5);
// IRQ_EXIT(UART5_IRQn);
// }
// void USART6_IRQHandler(void) {
// IRQ_ENTER(USART6_IRQn);
// uart_irq_handler(6);
// IRQ_EXIT(USART6_IRQn);
// }
// #if defined(MICROPY_HW_UART7_TX)
// void UART7_IRQHandler(void) {
// IRQ_ENTER(UART7_IRQn);
// uart_irq_handler(7);
// IRQ_EXIT(UART7_IRQn);
// }
// #endif
// #if defined(MICROPY_HW_UART8_TX)
// void UART8_IRQHandler(void) {
// IRQ_ENTER(UART8_IRQn);
// uart_irq_handler(8);
// IRQ_EXIT(UART8_IRQn);
// }
// #endif
// #if MICROPY_HW_ENABLE_CAN
// void CAN1_RX0_IRQHandler(void) {
// IRQ_ENTER(CAN1_RX0_IRQn);
// can_rx_irq_handler(PYB_CAN_1, CAN_FIFO0);
// IRQ_EXIT(CAN1_RX0_IRQn);
// }
// void CAN1_RX1_IRQHandler(void) {
// IRQ_ENTER(CAN1_RX1_IRQn);
// can_rx_irq_handler(PYB_CAN_1, CAN_FIFO1);
// IRQ_EXIT(CAN1_RX1_IRQn);
// }
// void CAN2_RX0_IRQHandler(void) {
// IRQ_ENTER(CAN2_RX0_IRQn);
// can_rx_irq_handler(PYB_CAN_2, CAN_FIFO0);
// IRQ_EXIT(CAN2_RX0_IRQn);
// }
// void CAN2_RX1_IRQHandler(void) {
// IRQ_ENTER(CAN2_RX1_IRQn);
// can_rx_irq_handler(PYB_CAN_2, CAN_FIFO1);
// IRQ_EXIT(CAN2_RX1_IRQn);
// }
// #endif // MICROPY_HW_ENABLE_CAN
extern I2C_HandleTypeDef i2c_handle;
void I2C1_EV_IRQHandler(void) {
IRQ_ENTER(I2C1_EV_IRQn);
HAL_I2C_EV_IRQHandler(&i2c_handle);
IRQ_EXIT(I2C1_EV_IRQn);
}
void I2C1_ER_IRQHandler(void) {
IRQ_ENTER(I2C1_ER_IRQn);
HAL_I2C_ER_IRQHandler(&i2c_handle);
IRQ_EXIT(I2C1_ER_IRQn);
}

8
micropython/trezorhal/touch.c
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@ -66,3 +66,11 @@ uint32_t touch_read(void) {
memcpy(old_data, data, 16);
return r;
}
void I2C1_EV_IRQHandler(void) {
HAL_I2C_EV_IRQHandler(&i2c_handle);
}
void I2C1_ER_IRQHandler(void) {
HAL_I2C_ER_IRQHandler(&i2c_handle);
}

90
micropython/trezorhal/usb.c
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@ -7,6 +7,8 @@
#include "usbd_hid_interface.h"
USBD_HandleTypeDef hUSBDDevice;
extern PCD_HandleTypeDef pcd_fs_handle;
extern PCD_HandleTypeDef pcd_hs_handle;
int usb_init(void) {
const uint16_t vid = 0x1209;
@ -33,3 +35,91 @@ int usb_init(void) {
return 0;
}
#if defined(USE_USB_FS)
/**
* @brief This function handles USB-On-The-Go FS global interrupt request.
* @param None
* @retval None
*/
void OTG_FS_IRQHandler(void) {
HAL_PCD_IRQHandler(&pcd_fs_handle);
}
#endif
#if defined(USE_USB_HS)
/**
* @brief This function handles USB-On-The-Go HS global interrupt request.
* @param None
* @retval None
*/
void OTG_HS_IRQHandler(void) {
HAL_PCD_IRQHandler(&pcd_hs_handle);
}
#endif
#if defined(USE_USB_FS) || defined(USE_USB_HS)
/**
* @brief This function handles USB OTG Common FS/HS Wakeup functions.
* @param *pcd_handle for FS or HS
* @retval None
*/
STATIC void OTG_CMD_WKUP_Handler(PCD_HandleTypeDef *pcd_handle) {
if (!(pcd_handle->Init.low_power_enable)) {
return;
}
/* Reset SLEEPDEEP bit of Cortex System Control Register */
SCB->SCR &= (uint32_t) ~((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk));
/* Configures system clock after wake-up from STOP: enable HSE, PLL and select
PLL as system clock source (HSE and PLL are disabled in STOP mode) */
__HAL_RCC_HSE_CONFIG(RCC_HSE_ON);
/* Wait till HSE is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) {}
/* Enable the main PLL. */
__HAL_RCC_PLL_ENABLE();
/* Wait till PLL is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) {}
/* Select PLL as SYSCLK */
MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, RCC_SYSCLKSOURCE_PLLCLK);
while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL) {}
/* ungate PHY clock */
__HAL_PCD_UNGATE_PHYCLOCK(pcd_handle);
}
#endif
#if defined(USE_USB_FS)
/**
* @brief This function handles USB OTG FS Wakeup IRQ Handler.
* @param None
* @retval None
*/
void OTG_FS_WKUP_IRQHandler(void) {
OTG_CMD_WKUP_Handler(&pcd_fs_handle);
/* Clear EXTI pending Bit*/
__HAL_USB_FS_EXTI_CLEAR_FLAG();
}
#endif
#if defined(USE_USB_HS)
/**
* @brief This function handles USB OTG HS Wakeup IRQ Handler.
* @param None
* @retval None
*/
void OTG_HS_WKUP_IRQHandler(void) {
OTG_CMD_WKUP_Handler(&pcd_hs_handle);
/* Clear EXTI pending Bit*/
__HAL_USB_HS_EXTI_CLEAR_FLAG();
}
#endif

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