mirror of
https://github.com/trezor/trezor-firmware.git
synced 2024-11-22 15:38:11 +00:00
issue 12: startup related changes
This commit is contained in:
mcudev
Pavol Rusnak
parent
11e223850f
commit
3bcd75fd94
@ -34,7 +34,6 @@ SOURCE_MOD += [
|
||||
|
||||
SOURCE_MICROPYTHON = [
|
||||
'vendor/micropython/lib/libc/string0.c',
|
||||
'vendor/micropython/ports/stm32/startup_stm32.S',
|
||||
]
|
||||
|
||||
SOURCE_STMHAL = [
|
||||
@ -71,6 +70,7 @@ SOURCE_STMHAL = [
|
||||
]
|
||||
|
||||
SOURCE_BOARDLOADER = [
|
||||
'embed/boardloader/startup.s',
|
||||
'embed/boardloader/main.c',
|
||||
]
|
||||
|
||||
@ -121,6 +121,7 @@ env.Replace(
|
||||
'TREZOR_STM32',
|
||||
'MCU_SERIES_F4',
|
||||
] + CPPDEFINES_MOD,
|
||||
ASFLAGS='-mthumb -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16',
|
||||
ASPPFLAGS='$CFLAGS $CCFLAGS', )
|
||||
|
||||
#
|
||||
@ -144,5 +145,5 @@ program_elf = env.Command(
|
||||
program_bin = env.Command(
|
||||
target='boardloader.bin',
|
||||
source=program_elf,
|
||||
action='$OBJCOPY -O binary -j .header -j .flash -j .data $SOURCE $TARGET',
|
||||
action='$OBJCOPY -O binary $SOURCE $TARGET',
|
||||
)
|
||||
|
||||
@ -131,7 +131,6 @@ void check_and_jump(void)
|
||||
|
||||
int main(void)
|
||||
{
|
||||
SCB->VTOR = BOARDLOADER_START;
|
||||
periph_init();
|
||||
|
||||
if (0 != display_init()) {
|
||||
|
||||
@ -1,92 +1,74 @@
|
||||
/*
|
||||
TREZORv2 linker script
|
||||
based on common.ld and stm32f405.ld
|
||||
*/
|
||||
/* TREZORv2 boardloader linker script */
|
||||
|
||||
/* Specify the memory areas */
|
||||
MEMORY
|
||||
{
|
||||
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 32K
|
||||
CCMRAM (xrw) : ORIGIN = 0x10000000, LENGTH = 64K
|
||||
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
|
||||
ENTRY(reset_handler)
|
||||
|
||||
MEMORY {
|
||||
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K
|
||||
CCMRAM (wal) : ORIGIN = 0x10000000, LENGTH = 64K
|
||||
SRAM (wal) : ORIGIN = 0x20000000, LENGTH = 128K /* note: the boardloader uses mostly CCMRAM */
|
||||
}
|
||||
|
||||
/* produce a link error if there is not this amount of RAM for these sections */
|
||||
_minimum_stack_size = 2K;
|
||||
_minimum_heap_size = 16K;
|
||||
main_stack_base = ORIGIN(CCMRAM) + LENGTH(CCMRAM); /* 8-byte aligned full descending stack */
|
||||
|
||||
/* Define tho top end of the stack. The stack is full descending so begins just
|
||||
above last byte of RAM. Note that EABI requires the stack to be 8-byte
|
||||
aligned for a call. */
|
||||
_estack = ORIGIN(RAM) + LENGTH(RAM);
|
||||
minimum_stack_size = 4K; /* reserve a chunk for stack space */
|
||||
|
||||
ENTRY(Reset_Handler)
|
||||
/* used by the startup code to populate variables used by the C code */
|
||||
data_lma = LOADADDR(.data);
|
||||
data_vma = ADDR(.data);
|
||||
data_size = SIZEOF(.data);
|
||||
|
||||
/* define output sections */
|
||||
SECTIONS
|
||||
{
|
||||
/* The startup code goes first into FLASH */
|
||||
.flash :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
KEEP(*(.isr_vector)) /* Startup code */
|
||||
. = ALIGN(4);
|
||||
*(.text*) /* .text* sections (code) */
|
||||
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
|
||||
. = ALIGN(4);
|
||||
_etext = .; /* define a global symbol at end of code */
|
||||
} >FLASH
|
||||
/* used by the startup code to wipe memory */
|
||||
ccmram_start = ORIGIN(CCMRAM);
|
||||
ccmram_end = ORIGIN(CCMRAM) + LENGTH(CCMRAM);
|
||||
|
||||
/* used by the startup to initialize data */
|
||||
_sidata = LOADADDR(.data);
|
||||
/* used by the startup code to wipe memory */
|
||||
sram_start = ORIGIN(SRAM);
|
||||
sram_end = ORIGIN(SRAM) + LENGTH(SRAM);
|
||||
|
||||
/* This is the initialized data section
|
||||
The program executes knowing that the data is in the RAM
|
||||
but the loader puts the initial values in the FLASH (inidata).
|
||||
It is one task of the startup to copy the initial values from FLASH to RAM. */
|
||||
.data :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */
|
||||
*(.data*) /* .data* sections */
|
||||
/* alignment references refer to sections in the ARM v7-M Architecture Reference Manual */
|
||||
|
||||
. = ALIGN(4);
|
||||
_edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */
|
||||
} >RAM AT> FLASH
|
||||
SECTIONS {
|
||||
.vector_table : ALIGN(512) { /* B1.5.3 and Table 61 of STM32F405 Reference Manual (RM0090) */
|
||||
KEEP(*(.vector_table))
|
||||
} >FLASH AT>FLASH
|
||||
|
||||
/* Uninitialized data section */
|
||||
.bss :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_sbss = .; /* define a global symbol at bss start; used by startup code */
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
.text : ALIGN(4) { /* A3.3.1 - needs at least 2 */
|
||||
KEEP(*(.text)) /* does not match all .text*, but influences their positioning */
|
||||
. = ALIGN(4); /* force the section to end on an word-aligned boundary */
|
||||
} >FLASH AT>FLASH
|
||||
|
||||
. = ALIGN(4);
|
||||
_ebss = .; /* define a global symbol at bss end; used by startup code and GC */
|
||||
} >RAM
|
||||
.rodata : ALIGN(4) {
|
||||
KEEP(*(.rodata)) /* does not match all .rodata*, but influences their positioning */
|
||||
. = ALIGN(4); /* force the section to end on an word-aligned boundary */
|
||||
} >FLASH AT>FLASH
|
||||
|
||||
/* this is to define the start of the heap, and make sure we have a minimum size */
|
||||
.heap :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
. = . + _minimum_heap_size;
|
||||
. = ALIGN(4);
|
||||
} >RAM
|
||||
.data : ALIGN(4) {
|
||||
KEEP(*(.data*)) /* combine all the .data* so that the startup code can copy it in all at once */
|
||||
. = ALIGN(4); /* force the section to end on an word-aligned boundary */
|
||||
} >CCMRAM AT>FLASH
|
||||
|
||||
/* this just checks there is enough RAM for the stack */
|
||||
.stack :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
. = . + _minimum_stack_size;
|
||||
. = ALIGN(4);
|
||||
} >RAM
|
||||
.bss : ALIGN(4) {
|
||||
KEEP(*(.bss)) /* does not match all .bss*, but influences their positioning */
|
||||
. = ALIGN(4); /* force the section to end on an word-aligned boundary */
|
||||
} >CCMRAM
|
||||
|
||||
.ARM.attributes 0 : { *(.ARM.attributes) }
|
||||
.stack : ALIGN(8) { /* B1.5.7 */
|
||||
. += minimum_stack_size;
|
||||
. = ALIGN(8); /* force the section to end on an double word-aligned boundary */
|
||||
} >CCMRAM
|
||||
|
||||
/* todo: reduce unused stuff being linked and garbage collected */
|
||||
/* requires moving code around and updating build scripts. */
|
||||
/DISCARD/ : {
|
||||
*/embed/extmod/modtrezorui/display.o (.text.get_glyph)
|
||||
*/embed/extmod/modtrezorui/display.o (.text.display_image)
|
||||
*/embed/extmod/modtrezorui/display.o (.text.display_avatar)
|
||||
*/embed/extmod/modtrezorui/display.o (.text.display_icon)
|
||||
*/embed/extmod/modtrezorui/display.o (.text.display_qrcode)
|
||||
*/embed/extmod/modtrezorui/display.o (.text.display_loader)
|
||||
*/embed/extmod/modtrezorui/display.o (.text.display_text)
|
||||
*/embed/extmod/modtrezorui/display.o (.text.display_text_width)
|
||||
*/embed/extmod/modtrezorui/display.o (.text.display_text_center)
|
||||
*/embed/extmod/modtrezorui/display.o (.text.display_text_right)
|
||||
}
|
||||
}
|
||||
|
||||
/* RAM extents for the garbage collector */
|
||||
_ram_start = ORIGIN(RAM);
|
||||
_ram_end = ORIGIN(RAM) + LENGTH(RAM);
|
||||
_heap_start = _ebss; /* heap starts just after statically allocated memory */
|
||||
_heap_end = 0x2001c000; /* tunable */
|
||||
|
||||
426
embed/boardloader/startup.s
Normal file
426
embed/boardloader/startup.s
Normal file
@ -0,0 +1,426 @@
|
||||
.syntax unified
|
||||
|
||||
// Reference:
|
||||
// Table 61 - STM32F405 Reference manual (RM0090)
|
||||
// Section B1.5 - ARMv7-M Architecture Reference Manual
|
||||
.section .vector_table, "a"
|
||||
vector_table:
|
||||
.word main_stack_base // defined in linker script
|
||||
.word reset_handler
|
||||
.word NMI_Handler
|
||||
.word HardFault_Handler
|
||||
.word MemManage_Handler
|
||||
.word BusFault_Handler
|
||||
.word UsageFault_Handler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word SVC_Handler
|
||||
.word DebugMon_Handler
|
||||
.word 0
|
||||
.word PendSV_Handler
|
||||
.word SysTick_Handler
|
||||
.word WWDG_IRQHandler
|
||||
.word PVD_IRQHandler
|
||||
.word TAMP_STAMP_IRQHandler
|
||||
.word RTC_WKUP_IRQHandler
|
||||
.word FLASH_IRQHandler
|
||||
.word RCC_IRQHandler
|
||||
.word EXTI0_IRQHandler
|
||||
.word EXTI1_IRQHandler
|
||||
.word EXTI2_IRQHandler
|
||||
.word EXTI3_IRQHandler
|
||||
.word EXTI4_IRQHandler
|
||||
.word DMA1_Stream0_IRQHandler
|
||||
.word DMA1_Stream1_IRQHandler
|
||||
.word DMA1_Stream2_IRQHandler
|
||||
.word DMA1_Stream3_IRQHandler
|
||||
.word DMA1_Stream4_IRQHandler
|
||||
.word DMA1_Stream5_IRQHandler
|
||||
.word DMA1_Stream6_IRQHandler
|
||||
.word ADC_IRQHandler
|
||||
.word CAN1_TX_IRQHandler
|
||||
.word CAN1_RX0_IRQHandler
|
||||
.word CAN1_RX1_IRQHandler
|
||||
.word CAN1_SCE_IRQHandler
|
||||
.word EXTI9_5_IRQHandler
|
||||
.word TIM1_BRK_TIM9_IRQHandler
|
||||
.word TIM1_UP_TIM10_IRQHandler
|
||||
.word TIM1_TRG_COM_TIM11_IRQHandler
|
||||
.word TIM1_CC_IRQHandler
|
||||
.word TIM2_IRQHandler
|
||||
.word TIM3_IRQHandler
|
||||
.word TIM4_IRQHandler
|
||||
.word I2C1_EV_IRQHandler
|
||||
.word I2C1_ER_IRQHandler
|
||||
.word I2C2_EV_IRQHandler
|
||||
.word I2C2_ER_IRQHandler
|
||||
.word SPI1_IRQHandler
|
||||
.word SPI2_IRQHandler
|
||||
.word USART1_IRQHandler
|
||||
.word USART2_IRQHandler
|
||||
.word USART3_IRQHandler
|
||||
.word EXTI15_10_IRQHandler
|
||||
.word RTC_Alarm_IRQHandler
|
||||
.word OTG_FS_WKUP_IRQHandler
|
||||
.word TIM8_BRK_TIM12_IRQHandler
|
||||
.word TIM8_UP_TIM13_IRQHandler
|
||||
.word TIM8_TRG_COM_TIM14_IRQHandler
|
||||
.word TIM8_CC_IRQHandler
|
||||
.word DMA1_Stream7_IRQHandler
|
||||
.word FSMC_IRQHandler
|
||||
.word SDIO_IRQHandler
|
||||
.word TIM5_IRQHandler
|
||||
.word SPI3_IRQHandler
|
||||
.word UART4_IRQHandler
|
||||
.word UART5_IRQHandler
|
||||
.word TIM6_DAC_IRQHandler
|
||||
.word TIM7_IRQHandler
|
||||
.word DMA2_Stream0_IRQHandler
|
||||
.word DMA2_Stream1_IRQHandler
|
||||
.word DMA2_Stream2_IRQHandler
|
||||
.word DMA2_Stream3_IRQHandler
|
||||
.word DMA2_Stream4_IRQHandler
|
||||
.word ETH_IRQHandler
|
||||
.word ETH_WKUP_IRQHandler
|
||||
.word CAN2_TX_IRQHandler
|
||||
.word CAN2_RX0_IRQHandler
|
||||
.word CAN2_RX1_IRQHandler
|
||||
.word CAN2_SCE_IRQHandler
|
||||
.word OTG_FS_IRQHandler
|
||||
.word DMA2_Stream5_IRQHandler
|
||||
.word DMA2_Stream6_IRQHandler
|
||||
.word DMA2_Stream7_IRQHandler
|
||||
.word USART6_IRQHandler
|
||||
.word I2C3_EV_IRQHandler
|
||||
.word I2C3_ER_IRQHandler
|
||||
.word OTG_HS_EP1_OUT_IRQHandler
|
||||
.word OTG_HS_EP1_IN_IRQHandler
|
||||
.word OTG_HS_WKUP_IRQHandler
|
||||
.word OTG_HS_IRQHandler
|
||||
.word DCMI_IRQHandler
|
||||
.word 0
|
||||
.word HASH_RNG_IRQHandler
|
||||
.word FPU_IRQHandler
|
||||
|
||||
.weak NMI_Handler
|
||||
.thumb_set NMI_Handler, default_handler
|
||||
|
||||
.weak HardFault_Handler
|
||||
.thumb_set HardFault_Handler, default_handler
|
||||
|
||||
.weak MemManage_Handler
|
||||
.thumb_set MemManage_Handler, default_handler
|
||||
|
||||
.weak BusFault_Handler
|
||||
.thumb_set BusFault_Handler, default_handler
|
||||
|
||||
.weak UsageFault_Handler
|
||||
.thumb_set UsageFault_Handler, default_handler
|
||||
|
||||
.weak SVC_Handler
|
||||
.thumb_set SVC_Handler, default_handler
|
||||
|
||||
.weak DebugMon_Handler
|
||||
.thumb_set DebugMon_Handler, default_handler
|
||||
|
||||
.weak PendSV_Handler
|
||||
.thumb_set PendSV_Handler, default_handler
|
||||
|
||||
.weak SysTick_Handler
|
||||
.thumb_set SysTick_Handler, default_handler
|
||||
|
||||
.weak WWDG_IRQHandler
|
||||
.thumb_set WWDG_IRQHandler, default_handler
|
||||
|
||||
.weak PVD_IRQHandler
|
||||
.thumb_set PVD_IRQHandler, default_handler
|
||||
|
||||
.weak TAMP_STAMP_IRQHandler
|
||||
.thumb_set TAMP_STAMP_IRQHandler, default_handler
|
||||
|
||||
.weak RTC_WKUP_IRQHandler
|
||||
.thumb_set RTC_WKUP_IRQHandler, default_handler
|
||||
|
||||
.weak FLASH_IRQHandler
|
||||
.thumb_set FLASH_IRQHandler, default_handler
|
||||
|
||||
.weak RCC_IRQHandler
|
||||
.thumb_set RCC_IRQHandler, default_handler
|
||||
|
||||
.weak EXTI0_IRQHandler
|
||||
.thumb_set EXTI0_IRQHandler, default_handler
|
||||
|
||||
.weak EXTI1_IRQHandler
|
||||
.thumb_set EXTI1_IRQHandler, default_handler
|
||||
|
||||
.weak EXTI2_IRQHandler
|
||||
.thumb_set EXTI2_IRQHandler, default_handler
|
||||
|
||||
.weak EXTI3_IRQHandler
|
||||
.thumb_set EXTI3_IRQHandler, default_handler
|
||||
|
||||
.weak EXTI4_IRQHandler
|
||||
.thumb_set EXTI4_IRQHandler, default_handler
|
||||
|
||||
.weak DMA1_Stream0_IRQHandler
|
||||
.thumb_set DMA1_Stream0_IRQHandler, default_handler
|
||||
|
||||
.weak DMA1_Stream1_IRQHandler
|
||||
.thumb_set DMA1_Stream1_IRQHandler, default_handler
|
||||
|
||||
.weak DMA1_Stream2_IRQHandler
|
||||
.thumb_set DMA1_Stream2_IRQHandler, default_handler
|
||||
|
||||
.weak DMA1_Stream3_IRQHandler
|
||||
.thumb_set DMA1_Stream3_IRQHandler, default_handler
|
||||
|
||||
.weak DMA1_Stream4_IRQHandler
|
||||
.thumb_set DMA1_Stream4_IRQHandler, default_handler
|
||||
|
||||
.weak DMA1_Stream5_IRQHandler
|
||||
.thumb_set DMA1_Stream5_IRQHandler, default_handler
|
||||
|
||||
.weak DMA1_Stream6_IRQHandler
|
||||
.thumb_set DMA1_Stream6_IRQHandler, default_handler
|
||||
|
||||
.weak ADC_IRQHandler
|
||||
.thumb_set ADC_IRQHandler, default_handler
|
||||
|
||||
.weak CAN1_TX_IRQHandler
|
||||
.thumb_set CAN1_TX_IRQHandler, default_handler
|
||||
|
||||
.weak CAN1_RX0_IRQHandler
|
||||
.thumb_set CAN1_RX0_IRQHandler, default_handler
|
||||
|
||||
.weak CAN1_RX1_IRQHandler
|
||||
.thumb_set CAN1_RX1_IRQHandler, default_handler
|
||||
|
||||
.weak CAN1_SCE_IRQHandler
|
||||
.thumb_set CAN1_SCE_IRQHandler, default_handler
|
||||
|
||||
.weak EXTI9_5_IRQHandler
|
||||
.thumb_set EXTI9_5_IRQHandler, default_handler
|
||||
|
||||
.weak TIM1_BRK_TIM9_IRQHandler
|
||||
.thumb_set TIM1_BRK_TIM9_IRQHandler, default_handler
|
||||
|
||||
.weak TIM1_UP_TIM10_IRQHandler
|
||||
.thumb_set TIM1_UP_TIM10_IRQHandler, default_handler
|
||||
|
||||
.weak TIM1_TRG_COM_TIM11_IRQHandler
|
||||
.thumb_set TIM1_TRG_COM_TIM11_IRQHandler, default_handler
|
||||
|
||||
.weak TIM1_CC_IRQHandler
|
||||
.thumb_set TIM1_CC_IRQHandler, default_handler
|
||||
|
||||
.weak TIM2_IRQHandler
|
||||
.thumb_set TIM2_IRQHandler, default_handler
|
||||
|
||||
.weak TIM3_IRQHandler
|
||||
.thumb_set TIM3_IRQHandler, default_handler
|
||||
|
||||
.weak TIM4_IRQHandler
|
||||
.thumb_set TIM4_IRQHandler, default_handler
|
||||
|
||||
.weak I2C1_EV_IRQHandler
|
||||
.thumb_set I2C1_EV_IRQHandler, default_handler
|
||||
|
||||
.weak I2C1_ER_IRQHandler
|
||||
.thumb_set I2C1_ER_IRQHandler, default_handler
|
||||
|
||||
.weak I2C2_EV_IRQHandler
|
||||
.thumb_set I2C2_EV_IRQHandler, default_handler
|
||||
|
||||
.weak I2C2_ER_IRQHandler
|
||||
.thumb_set I2C2_ER_IRQHandler, default_handler
|
||||
|
||||
.weak SPI1_IRQHandler
|
||||
.thumb_set SPI1_IRQHandler, default_handler
|
||||
|
||||
.weak SPI2_IRQHandler
|
||||
.thumb_set SPI2_IRQHandler, default_handler
|
||||
|
||||
.weak USART1_IRQHandler
|
||||
.thumb_set USART1_IRQHandler, default_handler
|
||||
|
||||
.weak USART2_IRQHandler
|
||||
.thumb_set USART2_IRQHandler, default_handler
|
||||
|
||||
.weak USART3_IRQHandler
|
||||
.thumb_set USART3_IRQHandler, default_handler
|
||||
|
||||
.weak EXTI15_10_IRQHandler
|
||||
.thumb_set EXTI15_10_IRQHandler, default_handler
|
||||
|
||||
.weak RTC_Alarm_IRQHandler
|
||||
.thumb_set RTC_Alarm_IRQHandler, default_handler
|
||||
|
||||
.weak OTG_FS_WKUP_IRQHandler
|
||||
.thumb_set OTG_FS_WKUP_IRQHandler, default_handler
|
||||
|
||||
.weak TIM8_BRK_TIM12_IRQHandler
|
||||
.thumb_set TIM8_BRK_TIM12_IRQHandler, default_handler
|
||||
|
||||
.weak TIM8_UP_TIM13_IRQHandler
|
||||
.thumb_set TIM8_UP_TIM13_IRQHandler, default_handler
|
||||
|
||||
.weak TIM8_TRG_COM_TIM14_IRQHandler
|
||||
.thumb_set TIM8_TRG_COM_TIM14_IRQHandler, default_handler
|
||||
|
||||
.weak TIM8_CC_IRQHandler
|
||||
.thumb_set TIM8_CC_IRQHandler, default_handler
|
||||
|
||||
.weak DMA1_Stream7_IRQHandler
|
||||
.thumb_set DMA1_Stream7_IRQHandler, default_handler
|
||||
|
||||
.weak FSMC_IRQHandler
|
||||
.thumb_set FSMC_IRQHandler, default_handler
|
||||
|
||||
.weak SDIO_IRQHandler
|
||||
.thumb_set SDIO_IRQHandler, default_handler
|
||||
|
||||
.weak TIM5_IRQHandler
|
||||
.thumb_set TIM5_IRQHandler, default_handler
|
||||
|
||||
.weak SPI3_IRQHandler
|
||||
.thumb_set SPI3_IRQHandler, default_handler
|
||||
|
||||
.weak UART4_IRQHandler
|
||||
.thumb_set UART4_IRQHandler, default_handler
|
||||
|
||||
.weak UART5_IRQHandler
|
||||
.thumb_set UART5_IRQHandler, default_handler
|
||||
|
||||
.weak TIM6_DAC_IRQHandler
|
||||
.thumb_set TIM6_DAC_IRQHandler, default_handler
|
||||
|
||||
.weak TIM7_IRQHandler
|
||||
.thumb_set TIM7_IRQHandler, default_handler
|
||||
|
||||
.weak DMA2_Stream0_IRQHandler
|
||||
.thumb_set DMA2_Stream0_IRQHandler, default_handler
|
||||
|
||||
.weak DMA2_Stream1_IRQHandler
|
||||
.thumb_set DMA2_Stream1_IRQHandler, default_handler
|
||||
|
||||
.weak DMA2_Stream2_IRQHandler
|
||||
.thumb_set DMA2_Stream2_IRQHandler, default_handler
|
||||
|
||||
.weak DMA2_Stream3_IRQHandler
|
||||
.thumb_set DMA2_Stream3_IRQHandler, default_handler
|
||||
|
||||
.weak DMA2_Stream4_IRQHandler
|
||||
.thumb_set DMA2_Stream4_IRQHandler, default_handler
|
||||
|
||||
.weak ETH_IRQHandler
|
||||
.thumb_set ETH_IRQHandler, default_handler
|
||||
|
||||
.weak ETH_WKUP_IRQHandler
|
||||
.thumb_set ETH_WKUP_IRQHandler, default_handler
|
||||
|
||||
.weak CAN2_TX_IRQHandler
|
||||
.thumb_set CAN2_TX_IRQHandler, default_handler
|
||||
|
||||
.weak CAN2_RX0_IRQHandler
|
||||
.thumb_set CAN2_RX0_IRQHandler, default_handler
|
||||
|
||||
.weak CAN2_RX1_IRQHandler
|
||||
.thumb_set CAN2_RX1_IRQHandler, default_handler
|
||||
|
||||
.weak CAN2_SCE_IRQHandler
|
||||
.thumb_set CAN2_SCE_IRQHandler, default_handler
|
||||
|
||||
.weak OTG_FS_IRQHandler
|
||||
.thumb_set OTG_FS_IRQHandler, default_handler
|
||||
|
||||
.weak DMA2_Stream5_IRQHandler
|
||||
.thumb_set DMA2_Stream5_IRQHandler, default_handler
|
||||
|
||||
.weak DMA2_Stream6_IRQHandler
|
||||
.thumb_set DMA2_Stream6_IRQHandler, default_handler
|
||||
|
||||
.weak DMA2_Stream7_IRQHandler
|
||||
.thumb_set DMA2_Stream7_IRQHandler, default_handler
|
||||
|
||||
.weak USART6_IRQHandler
|
||||
.thumb_set USART6_IRQHandler, default_handler
|
||||
|
||||
.weak I2C3_EV_IRQHandler
|
||||
.thumb_set I2C3_EV_IRQHandler, default_handler
|
||||
|
||||
.weak I2C3_ER_IRQHandler
|
||||
.thumb_set I2C3_ER_IRQHandler, default_handler
|
||||
|
||||
.weak OTG_HS_EP1_OUT_IRQHandler
|
||||
.thumb_set OTG_HS_EP1_OUT_IRQHandler, default_handler
|
||||
|
||||
.weak OTG_HS_EP1_IN_IRQHandler
|
||||
.thumb_set OTG_HS_EP1_IN_IRQHandler, default_handler
|
||||
|
||||
.weak OTG_HS_WKUP_IRQHandler
|
||||
.thumb_set OTG_HS_WKUP_IRQHandler, default_handler
|
||||
|
||||
.weak OTG_HS_IRQHandler
|
||||
.thumb_set OTG_HS_IRQHandler, default_handler
|
||||
|
||||
.weak DCMI_IRQHandler
|
||||
.thumb_set DCMI_IRQHandler, default_handler
|
||||
|
||||
.weak HASH_RNG_IRQHandler
|
||||
.thumb_set HASH_RNG_IRQHandler, default_handler
|
||||
|
||||
.weak FPU_IRQHandler
|
||||
.thumb_set FPU_IRQHandler, default_handler
|
||||
|
||||
.text
|
||||
|
||||
.global memset_reg
|
||||
.type memset_reg, STT_FUNC
|
||||
memset_reg:
|
||||
// call with the following (note that the arguments are not validated prior to use):
|
||||
// r0 - address of first word to write (inclusive)
|
||||
// r1 - address of first word following the address in r0 to NOT write (exclusive)
|
||||
// r2 - word value to be written
|
||||
// both addresses in r0 and r1 needs to be divisible by 4!
|
||||
.L_loop_begin:
|
||||
str r2, [r0], 4 // store the word in r2 to the address in r0, post-indexed
|
||||
cmp r0, r1
|
||||
bne .L_loop_begin
|
||||
bx lr
|
||||
|
||||
.global reset_handler
|
||||
.type reset_handler, STT_FUNC
|
||||
reset_handler:
|
||||
// wipe memory to remove any possible vestiges of sensitive data
|
||||
ldr r0, =ccmram_start // r0 - point to beginning of CCMRAM
|
||||
ldr r1, =ccmram_end // r1 - point to byte after the end of CCMRAM
|
||||
ldr r2, =0 // r2 - the word-sized value to be written
|
||||
bl memset_reg
|
||||
|
||||
ldr r0, =sram_start // r0 - point to beginning of SRAM
|
||||
ldr r1, =sram_end // r1 - point to byte after the end of SRAM
|
||||
ldr r2, =0 // r2 - the word-sized value to be written
|
||||
bl memset_reg
|
||||
|
||||
// copy data in from flash
|
||||
ldr r0, =data_vma // dst addr
|
||||
ldr r1, =data_lma // src addr
|
||||
ldr r2, =data_size // size in bytes
|
||||
bl memcpy
|
||||
|
||||
// CMSIS initialization
|
||||
bl SystemInit
|
||||
|
||||
// enter the application code
|
||||
bl main
|
||||
|
||||
// loop forever if the application code returns
|
||||
b .
|
||||
|
||||
.type default_handler, STT_FUNC
|
||||
default_handler:
|
||||
b . // loop forever
|
||||
|
||||
.end
|
||||
@ -80,73 +80,6 @@
|
||||
/* Cortex-M4 Processor Exceptions Handlers */
|
||||
/******************************************************************************/
|
||||
|
||||
void HardFault_Handler(void) {
|
||||
/* Go to infinite loop when Hard Fault exception occurs */
|
||||
while (1) {
|
||||
__fatal_error("HardFault", __FILE__, __LINE__, __FUNCTION__);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles NMI exception.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void NMI_Handler(void) {
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Memory Manage exception.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void MemManage_Handler(void) {
|
||||
/* Go to infinite loop when Memory Manage exception occurs */
|
||||
while (1) {
|
||||
__fatal_error("MemManage", __FILE__, __LINE__, __FUNCTION__);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Bus Fault exception.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void BusFault_Handler(void) {
|
||||
/* Go to infinite loop when Bus Fault exception occurs */
|
||||
while (1) {
|
||||
__fatal_error("BusFault", __FILE__, __LINE__, __FUNCTION__);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Usage Fault exception.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void UsageFault_Handler(void) {
|
||||
/* Go to infinite loop when Usage Fault exception occurs */
|
||||
while (1) {
|
||||
__fatal_error("UsageFault", __FILE__, __LINE__, __FUNCTION__);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles SVCall exception.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SVC_Handler(void) {
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Debug Monitor exception.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void DebugMon_Handler(void) {
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles PendSVC exception.
|
||||
* @param None
|
||||
|
||||
Loading…
Reference in New Issue
Block a user