mirror of
https://github.com/trezor/trezor-firmware.git
synced 2024-11-22 07:28:10 +00:00
issue 12: startup related changes
This commit is contained in:
mcudev
Pavol Rusnak
parent
11e223850f
commit
3bcd75fd94
@ -34,7 +34,6 @@ SOURCE_MOD += [
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SOURCE_MICROPYTHON = [
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'vendor/micropython/lib/libc/string0.c',
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'vendor/micropython/ports/stm32/startup_stm32.S',
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]
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SOURCE_STMHAL = [
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@ -71,6 +70,7 @@ SOURCE_STMHAL = [
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]
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SOURCE_BOARDLOADER = [
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'embed/boardloader/startup.s',
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'embed/boardloader/main.c',
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]
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@ -121,6 +121,7 @@ env.Replace(
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'TREZOR_STM32',
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'MCU_SERIES_F4',
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] + CPPDEFINES_MOD,
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ASFLAGS='-mthumb -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16',
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ASPPFLAGS='$CFLAGS $CCFLAGS', )
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#
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@ -144,5 +145,5 @@ program_elf = env.Command(
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program_bin = env.Command(
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target='boardloader.bin',
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source=program_elf,
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action='$OBJCOPY -O binary -j .header -j .flash -j .data $SOURCE $TARGET',
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action='$OBJCOPY -O binary $SOURCE $TARGET',
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)
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@ -131,7 +131,6 @@ void check_and_jump(void)
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int main(void)
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{
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SCB->VTOR = BOARDLOADER_START;
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periph_init();
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if (0 != display_init()) {
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@ -1,92 +1,74 @@
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/*
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TREZORv2 linker script
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based on common.ld and stm32f405.ld
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*/
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/* TREZORv2 boardloader linker script */
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/* Specify the memory areas */
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MEMORY
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{
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FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 32K
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CCMRAM (xrw) : ORIGIN = 0x10000000, LENGTH = 64K
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RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
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ENTRY(reset_handler)
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MEMORY {
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FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K
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CCMRAM (wal) : ORIGIN = 0x10000000, LENGTH = 64K
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SRAM (wal) : ORIGIN = 0x20000000, LENGTH = 128K /* note: the boardloader uses mostly CCMRAM */
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}
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/* produce a link error if there is not this amount of RAM for these sections */
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_minimum_stack_size = 2K;
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_minimum_heap_size = 16K;
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main_stack_base = ORIGIN(CCMRAM) + LENGTH(CCMRAM); /* 8-byte aligned full descending stack */
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/* Define tho top end of the stack. The stack is full descending so begins just
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above last byte of RAM. Note that EABI requires the stack to be 8-byte
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aligned for a call. */
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_estack = ORIGIN(RAM) + LENGTH(RAM);
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minimum_stack_size = 4K; /* reserve a chunk for stack space */
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ENTRY(Reset_Handler)
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/* used by the startup code to populate variables used by the C code */
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data_lma = LOADADDR(.data);
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data_vma = ADDR(.data);
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data_size = SIZEOF(.data);
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/* define output sections */
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SECTIONS
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{
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/* The startup code goes first into FLASH */
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.flash :
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{
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. = ALIGN(4);
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KEEP(*(.isr_vector)) /* Startup code */
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. = ALIGN(4);
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*(.text*) /* .text* sections (code) */
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*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
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. = ALIGN(4);
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_etext = .; /* define a global symbol at end of code */
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} >FLASH
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/* used by the startup code to wipe memory */
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ccmram_start = ORIGIN(CCMRAM);
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ccmram_end = ORIGIN(CCMRAM) + LENGTH(CCMRAM);
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/* used by the startup to initialize data */
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_sidata = LOADADDR(.data);
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/* used by the startup code to wipe memory */
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sram_start = ORIGIN(SRAM);
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sram_end = ORIGIN(SRAM) + LENGTH(SRAM);
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/* This is the initialized data section
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The program executes knowing that the data is in the RAM
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but the loader puts the initial values in the FLASH (inidata).
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It is one task of the startup to copy the initial values from FLASH to RAM. */
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.data :
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{
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. = ALIGN(4);
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_sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */
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*(.data*) /* .data* sections */
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/* alignment references refer to sections in the ARM v7-M Architecture Reference Manual */
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. = ALIGN(4);
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_edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */
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} >RAM AT> FLASH
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SECTIONS {
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.vector_table : ALIGN(512) { /* B1.5.3 and Table 61 of STM32F405 Reference Manual (RM0090) */
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KEEP(*(.vector_table))
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} >FLASH AT>FLASH
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/* Uninitialized data section */
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.bss :
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{
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. = ALIGN(4);
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_sbss = .; /* define a global symbol at bss start; used by startup code */
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*(.bss*)
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*(COMMON)
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.text : ALIGN(4) { /* A3.3.1 - needs at least 2 */
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KEEP(*(.text)) /* does not match all .text*, but influences their positioning */
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. = ALIGN(4); /* force the section to end on an word-aligned boundary */
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} >FLASH AT>FLASH
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. = ALIGN(4);
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_ebss = .; /* define a global symbol at bss end; used by startup code and GC */
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} >RAM
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.rodata : ALIGN(4) {
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KEEP(*(.rodata)) /* does not match all .rodata*, but influences their positioning */
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. = ALIGN(4); /* force the section to end on an word-aligned boundary */
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} >FLASH AT>FLASH
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/* this is to define the start of the heap, and make sure we have a minimum size */
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.heap :
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{
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. = ALIGN(4);
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. = . + _minimum_heap_size;
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. = ALIGN(4);
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} >RAM
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.data : ALIGN(4) {
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KEEP(*(.data*)) /* combine all the .data* so that the startup code can copy it in all at once */
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. = ALIGN(4); /* force the section to end on an word-aligned boundary */
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} >CCMRAM AT>FLASH
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/* this just checks there is enough RAM for the stack */
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.stack :
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{
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. = ALIGN(4);
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. = . + _minimum_stack_size;
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. = ALIGN(4);
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} >RAM
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.bss : ALIGN(4) {
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KEEP(*(.bss)) /* does not match all .bss*, but influences their positioning */
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. = ALIGN(4); /* force the section to end on an word-aligned boundary */
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} >CCMRAM
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.ARM.attributes 0 : { *(.ARM.attributes) }
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.stack : ALIGN(8) { /* B1.5.7 */
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. += minimum_stack_size;
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. = ALIGN(8); /* force the section to end on an double word-aligned boundary */
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} >CCMRAM
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/* todo: reduce unused stuff being linked and garbage collected */
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/* requires moving code around and updating build scripts. */
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/DISCARD/ : {
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*/embed/extmod/modtrezorui/display.o (.text.get_glyph)
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*/embed/extmod/modtrezorui/display.o (.text.display_image)
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*/embed/extmod/modtrezorui/display.o (.text.display_avatar)
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*/embed/extmod/modtrezorui/display.o (.text.display_icon)
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*/embed/extmod/modtrezorui/display.o (.text.display_qrcode)
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*/embed/extmod/modtrezorui/display.o (.text.display_loader)
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*/embed/extmod/modtrezorui/display.o (.text.display_text)
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*/embed/extmod/modtrezorui/display.o (.text.display_text_width)
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*/embed/extmod/modtrezorui/display.o (.text.display_text_center)
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*/embed/extmod/modtrezorui/display.o (.text.display_text_right)
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}
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}
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/* RAM extents for the garbage collector */
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_ram_start = ORIGIN(RAM);
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_ram_end = ORIGIN(RAM) + LENGTH(RAM);
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_heap_start = _ebss; /* heap starts just after statically allocated memory */
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_heap_end = 0x2001c000; /* tunable */
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426
embed/boardloader/startup.s
Normal file
426
embed/boardloader/startup.s
Normal file
@ -0,0 +1,426 @@
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.syntax unified
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// Reference:
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// Table 61 - STM32F405 Reference manual (RM0090)
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// Section B1.5 - ARMv7-M Architecture Reference Manual
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.section .vector_table, "a"
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vector_table:
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.word main_stack_base // defined in linker script
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.word reset_handler
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.word NMI_Handler
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.word HardFault_Handler
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.word MemManage_Handler
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.word BusFault_Handler
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.word UsageFault_Handler
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.word 0
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.word 0
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.word 0
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.word 0
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.word SVC_Handler
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.word DebugMon_Handler
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.word 0
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.word PendSV_Handler
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.word SysTick_Handler
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.word WWDG_IRQHandler
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.word PVD_IRQHandler
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.word TAMP_STAMP_IRQHandler
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.word RTC_WKUP_IRQHandler
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.word FLASH_IRQHandler
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.word RCC_IRQHandler
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.word EXTI0_IRQHandler
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.word EXTI1_IRQHandler
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.word EXTI2_IRQHandler
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.word EXTI3_IRQHandler
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.word EXTI4_IRQHandler
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.word DMA1_Stream0_IRQHandler
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.word DMA1_Stream1_IRQHandler
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.word DMA1_Stream2_IRQHandler
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.word DMA1_Stream3_IRQHandler
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.word DMA1_Stream4_IRQHandler
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.word DMA1_Stream5_IRQHandler
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.word DMA1_Stream6_IRQHandler
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.word ADC_IRQHandler
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.word CAN1_TX_IRQHandler
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.word CAN1_RX0_IRQHandler
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.word CAN1_RX1_IRQHandler
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.word CAN1_SCE_IRQHandler
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.word EXTI9_5_IRQHandler
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.word TIM1_BRK_TIM9_IRQHandler
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.word TIM1_UP_TIM10_IRQHandler
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.word TIM1_TRG_COM_TIM11_IRQHandler
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.word TIM1_CC_IRQHandler
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.word TIM2_IRQHandler
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.word TIM3_IRQHandler
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.word TIM4_IRQHandler
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.word I2C1_EV_IRQHandler
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.word I2C1_ER_IRQHandler
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.word I2C2_EV_IRQHandler
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.word I2C2_ER_IRQHandler
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.word SPI1_IRQHandler
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.word SPI2_IRQHandler
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.word USART1_IRQHandler
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.word USART2_IRQHandler
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.word USART3_IRQHandler
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.word EXTI15_10_IRQHandler
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.word RTC_Alarm_IRQHandler
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.word OTG_FS_WKUP_IRQHandler
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.word TIM8_BRK_TIM12_IRQHandler
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.word TIM8_UP_TIM13_IRQHandler
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.word TIM8_TRG_COM_TIM14_IRQHandler
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.word TIM8_CC_IRQHandler
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.word DMA1_Stream7_IRQHandler
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.word FSMC_IRQHandler
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.word SDIO_IRQHandler
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.word TIM5_IRQHandler
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.word SPI3_IRQHandler
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.word UART4_IRQHandler
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.word UART5_IRQHandler
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.word TIM6_DAC_IRQHandler
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.word TIM7_IRQHandler
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.word DMA2_Stream0_IRQHandler
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.word DMA2_Stream1_IRQHandler
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.word DMA2_Stream2_IRQHandler
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.word DMA2_Stream3_IRQHandler
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.word DMA2_Stream4_IRQHandler
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.word ETH_IRQHandler
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.word ETH_WKUP_IRQHandler
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.word CAN2_TX_IRQHandler
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.word CAN2_RX0_IRQHandler
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.word CAN2_RX1_IRQHandler
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.word CAN2_SCE_IRQHandler
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.word OTG_FS_IRQHandler
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.word DMA2_Stream5_IRQHandler
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.word DMA2_Stream6_IRQHandler
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.word DMA2_Stream7_IRQHandler
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.word USART6_IRQHandler
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.word I2C3_EV_IRQHandler
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.word I2C3_ER_IRQHandler
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.word OTG_HS_EP1_OUT_IRQHandler
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.word OTG_HS_EP1_IN_IRQHandler
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.word OTG_HS_WKUP_IRQHandler
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.word OTG_HS_IRQHandler
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.word DCMI_IRQHandler
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.word 0
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.word HASH_RNG_IRQHandler
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.word FPU_IRQHandler
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.weak NMI_Handler
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.thumb_set NMI_Handler, default_handler
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.weak HardFault_Handler
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.thumb_set HardFault_Handler, default_handler
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.weak MemManage_Handler
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.thumb_set MemManage_Handler, default_handler
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.weak BusFault_Handler
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.thumb_set BusFault_Handler, default_handler
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.weak UsageFault_Handler
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.thumb_set UsageFault_Handler, default_handler
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.weak SVC_Handler
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.thumb_set SVC_Handler, default_handler
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.weak DebugMon_Handler
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.thumb_set DebugMon_Handler, default_handler
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.weak PendSV_Handler
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.thumb_set PendSV_Handler, default_handler
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.weak SysTick_Handler
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.thumb_set SysTick_Handler, default_handler
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.weak WWDG_IRQHandler
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.thumb_set WWDG_IRQHandler, default_handler
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.weak PVD_IRQHandler
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.thumb_set PVD_IRQHandler, default_handler
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.weak TAMP_STAMP_IRQHandler
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.thumb_set TAMP_STAMP_IRQHandler, default_handler
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.weak RTC_WKUP_IRQHandler
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.thumb_set RTC_WKUP_IRQHandler, default_handler
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.weak FLASH_IRQHandler
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.thumb_set FLASH_IRQHandler, default_handler
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.weak RCC_IRQHandler
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.thumb_set RCC_IRQHandler, default_handler
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.weak EXTI0_IRQHandler
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.thumb_set EXTI0_IRQHandler, default_handler
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.weak EXTI1_IRQHandler
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.thumb_set EXTI1_IRQHandler, default_handler
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.weak EXTI2_IRQHandler
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.thumb_set EXTI2_IRQHandler, default_handler
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.weak EXTI3_IRQHandler
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.thumb_set EXTI3_IRQHandler, default_handler
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.weak EXTI4_IRQHandler
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.thumb_set EXTI4_IRQHandler, default_handler
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.weak DMA1_Stream0_IRQHandler
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.thumb_set DMA1_Stream0_IRQHandler, default_handler
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.weak DMA1_Stream1_IRQHandler
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.thumb_set DMA1_Stream1_IRQHandler, default_handler
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.weak DMA1_Stream2_IRQHandler
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.thumb_set DMA1_Stream2_IRQHandler, default_handler
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.weak DMA1_Stream3_IRQHandler
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.thumb_set DMA1_Stream3_IRQHandler, default_handler
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.weak DMA1_Stream4_IRQHandler
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.thumb_set DMA1_Stream4_IRQHandler, default_handler
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.weak DMA1_Stream5_IRQHandler
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.thumb_set DMA1_Stream5_IRQHandler, default_handler
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.weak DMA1_Stream6_IRQHandler
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.thumb_set DMA1_Stream6_IRQHandler, default_handler
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.weak ADC_IRQHandler
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.thumb_set ADC_IRQHandler, default_handler
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.weak CAN1_TX_IRQHandler
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.thumb_set CAN1_TX_IRQHandler, default_handler
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.weak CAN1_RX0_IRQHandler
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.thumb_set CAN1_RX0_IRQHandler, default_handler
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.weak CAN1_RX1_IRQHandler
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.thumb_set CAN1_RX1_IRQHandler, default_handler
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.weak CAN1_SCE_IRQHandler
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.thumb_set CAN1_SCE_IRQHandler, default_handler
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.weak EXTI9_5_IRQHandler
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.thumb_set EXTI9_5_IRQHandler, default_handler
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.weak TIM1_BRK_TIM9_IRQHandler
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.thumb_set TIM1_BRK_TIM9_IRQHandler, default_handler
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.weak TIM1_UP_TIM10_IRQHandler
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.thumb_set TIM1_UP_TIM10_IRQHandler, default_handler
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.weak TIM1_TRG_COM_TIM11_IRQHandler
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.thumb_set TIM1_TRG_COM_TIM11_IRQHandler, default_handler
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.weak TIM1_CC_IRQHandler
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.thumb_set TIM1_CC_IRQHandler, default_handler
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.weak TIM2_IRQHandler
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.thumb_set TIM2_IRQHandler, default_handler
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.weak TIM3_IRQHandler
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.thumb_set TIM3_IRQHandler, default_handler
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.weak TIM4_IRQHandler
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.thumb_set TIM4_IRQHandler, default_handler
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.weak I2C1_EV_IRQHandler
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.thumb_set I2C1_EV_IRQHandler, default_handler
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.weak I2C1_ER_IRQHandler
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.thumb_set I2C1_ER_IRQHandler, default_handler
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.weak I2C2_EV_IRQHandler
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.thumb_set I2C2_EV_IRQHandler, default_handler
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.weak I2C2_ER_IRQHandler
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.thumb_set I2C2_ER_IRQHandler, default_handler
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.weak SPI1_IRQHandler
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.thumb_set SPI1_IRQHandler, default_handler
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.weak SPI2_IRQHandler
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.thumb_set SPI2_IRQHandler, default_handler
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.weak USART1_IRQHandler
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.thumb_set USART1_IRQHandler, default_handler
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.weak USART2_IRQHandler
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.thumb_set USART2_IRQHandler, default_handler
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.weak USART3_IRQHandler
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.thumb_set USART3_IRQHandler, default_handler
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.weak EXTI15_10_IRQHandler
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.thumb_set EXTI15_10_IRQHandler, default_handler
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.weak RTC_Alarm_IRQHandler
|
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.thumb_set RTC_Alarm_IRQHandler, default_handler
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.weak OTG_FS_WKUP_IRQHandler
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.thumb_set OTG_FS_WKUP_IRQHandler, default_handler
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.weak TIM8_BRK_TIM12_IRQHandler
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.thumb_set TIM8_BRK_TIM12_IRQHandler, default_handler
|
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.weak TIM8_UP_TIM13_IRQHandler
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.thumb_set TIM8_UP_TIM13_IRQHandler, default_handler
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||||
.weak TIM8_TRG_COM_TIM14_IRQHandler
|
||||
.thumb_set TIM8_TRG_COM_TIM14_IRQHandler, default_handler
|
||||
|
||||
.weak TIM8_CC_IRQHandler
|
||||
.thumb_set TIM8_CC_IRQHandler, default_handler
|
||||
|
||||
.weak DMA1_Stream7_IRQHandler
|
||||
.thumb_set DMA1_Stream7_IRQHandler, default_handler
|
||||
|
||||
.weak FSMC_IRQHandler
|
||||
.thumb_set FSMC_IRQHandler, default_handler
|
||||
|
||||
.weak SDIO_IRQHandler
|
||||
.thumb_set SDIO_IRQHandler, default_handler
|
||||
|
||||
.weak TIM5_IRQHandler
|
||||
.thumb_set TIM5_IRQHandler, default_handler
|
||||
|
||||
.weak SPI3_IRQHandler
|
||||
.thumb_set SPI3_IRQHandler, default_handler
|
||||
|
||||
.weak UART4_IRQHandler
|
||||
.thumb_set UART4_IRQHandler, default_handler
|
||||
|
||||
.weak UART5_IRQHandler
|
||||
.thumb_set UART5_IRQHandler, default_handler
|
||||
|
||||
.weak TIM6_DAC_IRQHandler
|
||||
.thumb_set TIM6_DAC_IRQHandler, default_handler
|
||||
|
||||
.weak TIM7_IRQHandler
|
||||
.thumb_set TIM7_IRQHandler, default_handler
|
||||
|
||||
.weak DMA2_Stream0_IRQHandler
|
||||
.thumb_set DMA2_Stream0_IRQHandler, default_handler
|
||||
|
||||
.weak DMA2_Stream1_IRQHandler
|
||||
.thumb_set DMA2_Stream1_IRQHandler, default_handler
|
||||
|
||||
.weak DMA2_Stream2_IRQHandler
|
||||
.thumb_set DMA2_Stream2_IRQHandler, default_handler
|
||||
|
||||
.weak DMA2_Stream3_IRQHandler
|
||||
.thumb_set DMA2_Stream3_IRQHandler, default_handler
|
||||
|
||||
.weak DMA2_Stream4_IRQHandler
|
||||
.thumb_set DMA2_Stream4_IRQHandler, default_handler
|
||||
|
||||
.weak ETH_IRQHandler
|
||||
.thumb_set ETH_IRQHandler, default_handler
|
||||
|
||||
.weak ETH_WKUP_IRQHandler
|
||||
.thumb_set ETH_WKUP_IRQHandler, default_handler
|
||||
|
||||
.weak CAN2_TX_IRQHandler
|
||||
.thumb_set CAN2_TX_IRQHandler, default_handler
|
||||
|
||||
.weak CAN2_RX0_IRQHandler
|
||||
.thumb_set CAN2_RX0_IRQHandler, default_handler
|
||||
|
||||
.weak CAN2_RX1_IRQHandler
|
||||
.thumb_set CAN2_RX1_IRQHandler, default_handler
|
||||
|
||||
.weak CAN2_SCE_IRQHandler
|
||||
.thumb_set CAN2_SCE_IRQHandler, default_handler
|
||||
|
||||
.weak OTG_FS_IRQHandler
|
||||
.thumb_set OTG_FS_IRQHandler, default_handler
|
||||
|
||||
.weak DMA2_Stream5_IRQHandler
|
||||
.thumb_set DMA2_Stream5_IRQHandler, default_handler
|
||||
|
||||
.weak DMA2_Stream6_IRQHandler
|
||||
.thumb_set DMA2_Stream6_IRQHandler, default_handler
|
||||
|
||||
.weak DMA2_Stream7_IRQHandler
|
||||
.thumb_set DMA2_Stream7_IRQHandler, default_handler
|
||||
|
||||
.weak USART6_IRQHandler
|
||||
.thumb_set USART6_IRQHandler, default_handler
|
||||
|
||||
.weak I2C3_EV_IRQHandler
|
||||
.thumb_set I2C3_EV_IRQHandler, default_handler
|
||||
|
||||
.weak I2C3_ER_IRQHandler
|
||||
.thumb_set I2C3_ER_IRQHandler, default_handler
|
||||
|
||||
.weak OTG_HS_EP1_OUT_IRQHandler
|
||||
.thumb_set OTG_HS_EP1_OUT_IRQHandler, default_handler
|
||||
|
||||
.weak OTG_HS_EP1_IN_IRQHandler
|
||||
.thumb_set OTG_HS_EP1_IN_IRQHandler, default_handler
|
||||
|
||||
.weak OTG_HS_WKUP_IRQHandler
|
||||
.thumb_set OTG_HS_WKUP_IRQHandler, default_handler
|
||||
|
||||
.weak OTG_HS_IRQHandler
|
||||
.thumb_set OTG_HS_IRQHandler, default_handler
|
||||
|
||||
.weak DCMI_IRQHandler
|
||||
.thumb_set DCMI_IRQHandler, default_handler
|
||||
|
||||
.weak HASH_RNG_IRQHandler
|
||||
.thumb_set HASH_RNG_IRQHandler, default_handler
|
||||
|
||||
.weak FPU_IRQHandler
|
||||
.thumb_set FPU_IRQHandler, default_handler
|
||||
|
||||
.text
|
||||
|
||||
.global memset_reg
|
||||
.type memset_reg, STT_FUNC
|
||||
memset_reg:
|
||||
// call with the following (note that the arguments are not validated prior to use):
|
||||
// r0 - address of first word to write (inclusive)
|
||||
// r1 - address of first word following the address in r0 to NOT write (exclusive)
|
||||
// r2 - word value to be written
|
||||
// both addresses in r0 and r1 needs to be divisible by 4!
|
||||
.L_loop_begin:
|
||||
str r2, [r0], 4 // store the word in r2 to the address in r0, post-indexed
|
||||
cmp r0, r1
|
||||
bne .L_loop_begin
|
||||
bx lr
|
||||
|
||||
.global reset_handler
|
||||
.type reset_handler, STT_FUNC
|
||||
reset_handler:
|
||||
// wipe memory to remove any possible vestiges of sensitive data
|
||||
ldr r0, =ccmram_start // r0 - point to beginning of CCMRAM
|
||||
ldr r1, =ccmram_end // r1 - point to byte after the end of CCMRAM
|
||||
ldr r2, =0 // r2 - the word-sized value to be written
|
||||
bl memset_reg
|
||||
|
||||
ldr r0, =sram_start // r0 - point to beginning of SRAM
|
||||
ldr r1, =sram_end // r1 - point to byte after the end of SRAM
|
||||
ldr r2, =0 // r2 - the word-sized value to be written
|
||||
bl memset_reg
|
||||
|
||||
// copy data in from flash
|
||||
ldr r0, =data_vma // dst addr
|
||||
ldr r1, =data_lma // src addr
|
||||
ldr r2, =data_size // size in bytes
|
||||
bl memcpy
|
||||
|
||||
// CMSIS initialization
|
||||
bl SystemInit
|
||||
|
||||
// enter the application code
|
||||
bl main
|
||||
|
||||
// loop forever if the application code returns
|
||||
b .
|
||||
|
||||
.type default_handler, STT_FUNC
|
||||
default_handler:
|
||||
b . // loop forever
|
||||
|
||||
.end
|
||||
@ -80,73 +80,6 @@
|
||||
/* Cortex-M4 Processor Exceptions Handlers */
|
||||
/******************************************************************************/
|
||||
|
||||
void HardFault_Handler(void) {
|
||||
/* Go to infinite loop when Hard Fault exception occurs */
|
||||
while (1) {
|
||||
__fatal_error("HardFault", __FILE__, __LINE__, __FUNCTION__);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles NMI exception.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void NMI_Handler(void) {
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Memory Manage exception.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void MemManage_Handler(void) {
|
||||
/* Go to infinite loop when Memory Manage exception occurs */
|
||||
while (1) {
|
||||
__fatal_error("MemManage", __FILE__, __LINE__, __FUNCTION__);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Bus Fault exception.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void BusFault_Handler(void) {
|
||||
/* Go to infinite loop when Bus Fault exception occurs */
|
||||
while (1) {
|
||||
__fatal_error("BusFault", __FILE__, __LINE__, __FUNCTION__);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Usage Fault exception.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void UsageFault_Handler(void) {
|
||||
/* Go to infinite loop when Usage Fault exception occurs */
|
||||
while (1) {
|
||||
__fatal_error("UsageFault", __FILE__, __LINE__, __FUNCTION__);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles SVCall exception.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SVC_Handler(void) {
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Debug Monitor exception.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void DebugMon_Handler(void) {
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles PendSVC exception.
|
||||
* @param None
|
||||
|
||||
Loading…
Reference in New Issue
Block a user