mirror of
https://github.com/trezor/trezor-firmware.git
synced 2025-05-29 20:28:45 +00:00
feat(core): improve t3w1 display driver init/deinit
[no changelog]
This commit is contained in:
parent
1f3e640dd9
commit
3165443dfe
@ -1,3 +1,21 @@
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/*
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* This file is part of the Trezor project, https://trezor.io/
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*
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* Copyright (c) SatoshiLabs
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <trezor_bsp.h>
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#include <trezor_bsp.h>
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#include <trezor_model.h>
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#include <trezor_model.h>
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@ -21,6 +39,8 @@ display_driver_t g_display_driver = {
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.initialized = false,
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.initialized = false,
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};
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};
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static void display_pll_deinit(void) { __HAL_RCC_PLL3_DISABLE(); }
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static bool display_pll_init(void) {
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static bool display_pll_init(void) {
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RCC_PeriphCLKInitTypeDef PLL3InitPeriph = {0};
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RCC_PeriphCLKInitTypeDef PLL3InitPeriph = {0};
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@ -46,17 +66,34 @@ static bool display_pll_init(void) {
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PLL3InitPeriph.PLL3.PLL3RGE = RCC_PLLVCIRANGE_0;
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PLL3InitPeriph.PLL3.PLL3RGE = RCC_PLLVCIRANGE_0;
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PLL3InitPeriph.PLL3.PLL3ClockOut = RCC_PLL3_DIVR | RCC_PLL3_DIVP;
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PLL3InitPeriph.PLL3.PLL3ClockOut = RCC_PLL3_DIVR | RCC_PLL3_DIVP;
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PLL3InitPeriph.PLL3.PLL3Source = RCC_PLLSOURCE_HSE;
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PLL3InitPeriph.PLL3.PLL3Source = RCC_PLLSOURCE_HSE;
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return HAL_RCCEx_PeriphCLKConfig(&PLL3InitPeriph) == HAL_OK;
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if (HAL_RCCEx_PeriphCLKConfig(&PLL3InitPeriph) != HAL_OK) {
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goto cleanup;
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}
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return true;
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cleanup:
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display_pll_deinit();
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return false;
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}
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}
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static bool display_dsi_init(void) {
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static void display_dsi_deinit(display_driver_t *drv) {
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display_driver_t *drv = &g_display_driver;
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__HAL_RCC_DSI_CLK_DISABLE();
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__HAL_RCC_DSI_FORCE_RESET();
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__HAL_RCC_DSI_RELEASE_RESET();
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memset(&drv->hlcd_dsi, 0, sizeof(drv->hlcd_dsi));
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}
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static bool display_dsi_init(display_driver_t *drv) {
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RCC_PeriphCLKInitTypeDef DSIPHYInitPeriph = {0};
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RCC_PeriphCLKInitTypeDef DSIPHYInitPeriph = {0};
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DSI_PLLInitTypeDef PLLInit = {0};
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DSI_PLLInitTypeDef PLLInit = {0};
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DSI_PHY_TimerTypeDef PhyTimers = {0};
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DSI_PHY_TimerTypeDef PhyTimers = {0};
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DSI_HOST_TimeoutTypeDef HostTimeouts = {0};
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DSI_HOST_TimeoutTypeDef HostTimeouts = {0};
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__HAL_RCC_DSI_FORCE_RESET();
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__HAL_RCC_DSI_RELEASE_RESET();
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/* Enable DSI clock */
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/* Enable DSI clock */
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__HAL_RCC_DSI_CLK_ENABLE();
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__HAL_RCC_DSI_CLK_ENABLE();
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@ -84,7 +121,7 @@ static bool display_dsi_init(void) {
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DSIPHYInitPeriph.DsiClockSelection = RCC_DSICLKSOURCE_DSIPHY;
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DSIPHYInitPeriph.DsiClockSelection = RCC_DSICLKSOURCE_DSIPHY;
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if (HAL_RCCEx_PeriphCLKConfig(&DSIPHYInitPeriph) != HAL_OK) {
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if (HAL_RCCEx_PeriphCLKConfig(&DSIPHYInitPeriph) != HAL_OK) {
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return false;
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goto cleanup;
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}
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}
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/* Reset the TX escape clock division factor */
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/* Reset the TX escape clock division factor */
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@ -119,10 +156,10 @@ static bool display_dsi_init(void) {
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PLLInit.PLLTuning = DSI_PLL_LOOP_FILTER_2000HZ_4400HZ;
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PLLInit.PLLTuning = DSI_PLL_LOOP_FILTER_2000HZ_4400HZ;
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if (HAL_DSI_Init(&drv->hlcd_dsi, &PLLInit) != HAL_OK) {
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if (HAL_DSI_Init(&drv->hlcd_dsi, &PLLInit) != HAL_OK) {
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return false;
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goto cleanup;
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}
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}
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if (HAL_DSI_SetGenericVCID(&drv->hlcd_dsi, 0) != HAL_OK) {
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if (HAL_DSI_SetGenericVCID(&drv->hlcd_dsi, 0) != HAL_OK) {
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return false;
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goto cleanup;
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}
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}
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/* Configure the DSI for Video mode */
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/* Configure the DSI for Video mode */
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@ -157,7 +194,7 @@ static bool display_dsi_init(void) {
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/* Drive the display */
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/* Drive the display */
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if (HAL_DSI_ConfigVideoMode(&drv->hlcd_dsi, &drv->DSIVidCfg) != HAL_OK) {
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if (HAL_DSI_ConfigVideoMode(&drv->hlcd_dsi, &drv->DSIVidCfg) != HAL_OK) {
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return false;
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goto cleanup;
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}
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}
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/*********************/
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/*********************/
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@ -171,7 +208,7 @@ static bool display_dsi_init(void) {
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PhyTimers.StopWaitTime = 7;
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PhyTimers.StopWaitTime = 7;
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if (HAL_DSI_ConfigPhyTimer(&drv->hlcd_dsi, &PhyTimers)) {
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if (HAL_DSI_ConfigPhyTimer(&drv->hlcd_dsi, &PhyTimers)) {
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return false;
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goto cleanup;
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}
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}
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HostTimeouts.TimeoutCkdiv = 1;
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HostTimeouts.TimeoutCkdiv = 1;
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@ -185,18 +222,22 @@ static bool display_dsi_init(void) {
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HostTimeouts.BTATimeout = 0;
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HostTimeouts.BTATimeout = 0;
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if (HAL_DSI_ConfigHostTimeouts(&drv->hlcd_dsi, &HostTimeouts) != HAL_OK) {
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if (HAL_DSI_ConfigHostTimeouts(&drv->hlcd_dsi, &HostTimeouts) != HAL_OK) {
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return false;
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goto cleanup;
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}
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}
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if (HAL_DSI_ConfigFlowControl(&drv->hlcd_dsi, DSI_FLOW_CONTROL_BTA) !=
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if (HAL_DSI_ConfigFlowControl(&drv->hlcd_dsi, DSI_FLOW_CONTROL_BTA) !=
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HAL_OK) {
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HAL_OK) {
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return false;
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goto cleanup;
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}
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}
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/* Enable the DSI host */
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/* Enable the DSI host */
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__HAL_DSI_ENABLE(&drv->hlcd_dsi);
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__HAL_DSI_ENABLE(&drv->hlcd_dsi);
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return true;
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return true;
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cleanup:
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display_dsi_deinit(drv);
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return false;
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}
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}
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static bool display_ltdc_config_layer(LTDC_HandleTypeDef *hltdc,
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static bool display_ltdc_config_layer(LTDC_HandleTypeDef *hltdc,
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@ -227,8 +268,15 @@ static bool display_ltdc_config_layer(LTDC_HandleTypeDef *hltdc,
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return HAL_LTDC_ConfigLayer(hltdc, &LayerCfg, LTDC_LAYER_1) == HAL_OK;
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return HAL_LTDC_ConfigLayer(hltdc, &LayerCfg, LTDC_LAYER_1) == HAL_OK;
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}
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}
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static bool display_ltdc_init(uint32_t fb_addr) {
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void display_ltdc_deinit(display_driver_t *drv) {
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display_driver_t *drv = &g_display_driver;
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__HAL_RCC_LTDC_CLK_DISABLE();
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__HAL_RCC_LTDC_FORCE_RESET();
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__HAL_RCC_LTDC_RELEASE_RESET();
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}
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static bool display_ltdc_init(display_driver_t *drv, uint32_t fb_addr) {
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__HAL_RCC_LTDC_FORCE_RESET();
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__HAL_RCC_LTDC_RELEASE_RESET();
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__HAL_RCC_LTDC_CLK_ENABLE();
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__HAL_RCC_LTDC_CLK_ENABLE();
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@ -249,14 +297,22 @@ static bool display_ltdc_init(uint32_t fb_addr) {
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if (HAL_LTDCEx_StructInitFromVideoConfig(&drv->hlcd_ltdc, &drv->DSIVidCfg) !=
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if (HAL_LTDCEx_StructInitFromVideoConfig(&drv->hlcd_ltdc, &drv->DSIVidCfg) !=
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HAL_OK) {
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HAL_OK) {
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return false;
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goto cleanup;
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}
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}
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if (HAL_LTDC_Init(&drv->hlcd_ltdc) != HAL_OK) {
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if (HAL_LTDC_Init(&drv->hlcd_ltdc) != HAL_OK) {
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return false;
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goto cleanup;
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}
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}
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return display_ltdc_config_layer(&drv->hlcd_ltdc, fb_addr);
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if (!display_ltdc_config_layer(&drv->hlcd_ltdc, fb_addr)) {
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goto cleanup;
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}
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return true;
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cleanup:
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display_ltdc_deinit(drv);
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return false;
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}
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}
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bool display_set_fb(uint32_t fb_addr) {
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bool display_set_fb(uint32_t fb_addr) {
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@ -264,7 +320,8 @@ bool display_set_fb(uint32_t fb_addr) {
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return display_ltdc_config_layer(&drv->hlcd_ltdc, fb_addr);
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return display_ltdc_config_layer(&drv->hlcd_ltdc, fb_addr);
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}
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}
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// Fully initializes the display controller.
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// This implementation does not support `mode` parameter, it
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// behaves as if `mode` is always `DISPLAY_RESET_CONTENT`.
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bool display_init(display_content_mode_t mode) {
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bool display_init(display_content_mode_t mode) {
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display_driver_t *drv = &g_display_driver;
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display_driver_t *drv = &g_display_driver;
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@ -274,9 +331,6 @@ bool display_init(display_content_mode_t mode) {
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GPIO_InitTypeDef GPIO_InitStructure = {0};
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GPIO_InitTypeDef GPIO_InitStructure = {0};
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__HAL_RCC_DSI_FORCE_RESET();
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__HAL_RCC_LTDC_FORCE_RESET();
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#ifdef DISPLAY_PWREN_PIN
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#ifdef DISPLAY_PWREN_PIN
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DISPLAY_PWREN_CLK_ENA();
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DISPLAY_PWREN_CLK_ENA();
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HAL_GPIO_WritePin(DISPLAY_PWREN_PORT, DISPLAY_PWREN_PIN, GPIO_PIN_RESET);
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HAL_GPIO_WritePin(DISPLAY_PWREN_PORT, DISPLAY_PWREN_PIN, GPIO_PIN_RESET);
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@ -317,9 +371,6 @@ bool display_init(display_content_mode_t mode) {
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uint32_t fb_addr = display_fb_init();
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uint32_t fb_addr = display_fb_init();
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__HAL_RCC_LTDC_RELEASE_RESET();
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__HAL_RCC_DSI_RELEASE_RESET();
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#ifdef DISPLAY_GFXMMU
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#ifdef DISPLAY_GFXMMU
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display_gfxmmu_init(drv);
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display_gfxmmu_init(drv);
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#endif
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#endif
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@ -327,10 +378,10 @@ bool display_init(display_content_mode_t mode) {
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if (!display_pll_init()) {
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if (!display_pll_init()) {
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goto cleanup;
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goto cleanup;
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}
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}
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if (!display_dsi_init()) {
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if (!display_dsi_init(drv)) {
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goto cleanup;
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goto cleanup;
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}
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}
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if (!display_ltdc_init(fb_addr)) {
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if (!display_ltdc_init(drv, fb_addr)) {
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goto cleanup;
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goto cleanup;
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}
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}
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@ -360,22 +411,67 @@ bool display_init(display_content_mode_t mode) {
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return true;
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return true;
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cleanup:
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cleanup:
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display_deinit(DISPLAY_RESET_CONTENT);
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return false;
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}
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// This implementation does not support `mode` parameter, it
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// behaves as if `mode` is always `DISPLAY_RESET_CONTENT`.
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void display_deinit(display_content_mode_t mode) {
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display_driver_t *drv = &g_display_driver;
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if (mode == DISPLAY_RETAIN_CONTENT) {
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// This is a temporary workaround for T3W1 to avoid clearing
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// the display after drawing RSOD screen in `secure_shutdown()`
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// function. The workaround should be removed once we have
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// proper replacement for `secure_shutdown()` that resets the
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// device instead of waiting for manual power off.
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return;
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}
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GPIO_InitTypeDef GPIO_InitStructure = {0};
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NVIC_DisableIRQ(LTDC_IRQn);
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NVIC_DisableIRQ(LTDC_IRQn);
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NVIC_DisableIRQ(LTDC_ER_IRQn);
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NVIC_DisableIRQ(LTDC_ER_IRQn);
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__HAL_RCC_DSI_FORCE_RESET();
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#ifdef DISPLAY_BACKLIGHT_PIN
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__HAL_RCC_LTDC_FORCE_RESET();
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GPIO_InitStructure.Mode = GPIO_MODE_ANALOG;
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GPIO_InitStructure.Pull = GPIO_NOPULL;
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__HAL_RCC_LTDC_RELEASE_RESET();
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GPIO_InitStructure.Speed = GPIO_SPEED_LOW;
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__HAL_RCC_DSI_RELEASE_RESET();
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GPIO_InitStructure.Pin = DISPLAY_BACKLIGHT_PIN;
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HAL_GPIO_Init(DISPLAY_BACKLIGHT_PORT, &GPIO_InitStructure);
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#ifdef DISPLAY_GFXMMU
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__HAL_RCC_GFXMMU_FORCE_RESET();
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__HAL_RCC_GFXMMU_RELEASE_RESET();
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#endif
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#endif
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drv->initialized = false;
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#ifdef USE_BACKLIGHT
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return false;
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backlight_pwm_deinit(BACKLIGHT_RESET);
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#endif
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display_dsi_deinit(drv);
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display_ltdc_deinit(drv);
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#ifdef DISPLAY_GFXMMU
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display_gfxmmu_deinit(drv);
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#endif
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display_pll_deinit();
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#ifdef DISPLAY_PWREN_PIN
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// Release PWREN pin and switch display power off
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GPIO_InitStructure.Mode = GPIO_MODE_ANALOG;
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GPIO_InitStructure.Pull = GPIO_NOPULL;
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GPIO_InitStructure.Speed = GPIO_SPEED_LOW;
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GPIO_InitStructure.Pin = DISPLAY_PWREN_PIN;
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HAL_GPIO_Init(DISPLAY_PWREN_PORT, &GPIO_InitStructure);
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#endif
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#ifdef DISPLAY_RESET_PIN
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// Release the RESET pin
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GPIO_InitStructure.Mode = GPIO_MODE_ANALOG;
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GPIO_InitStructure.Pull = GPIO_NOPULL;
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GPIO_InitStructure.Speed = GPIO_SPEED_LOW;
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GPIO_InitStructure.Pin = DISPLAY_RESET_PIN;
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HAL_GPIO_Init(DISPLAY_RESET_PORT, &GPIO_InitStructure);
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#endif
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memset(drv, 0, sizeof(display_driver_t));
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}
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}
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int display_set_backlight(int level) {
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int display_set_backlight(int level) {
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@ -447,17 +543,4 @@ void LTDC_ER_IRQHandler(void) {
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IRQ_LOG_EXIT();
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IRQ_LOG_EXIT();
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}
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}
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void display_deinit(display_content_mode_t mode) {
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display_driver_t *drv = &g_display_driver;
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if (!drv->initialized) {
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return;
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}
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// todo
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NVIC_DisableIRQ(LTDC_IRQn);
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NVIC_DisableIRQ(LTDC_ER_IRQn);
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}
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#endif
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#endif
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@ -1,5 +1,26 @@
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/*
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* This file is part of the Trezor project, https://trezor.io/
|
||||||
|
*
|
||||||
|
* Copyright (c) SatoshiLabs
|
||||||
|
*
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* This program is free software: you can redistribute it and/or modify
|
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|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation, either version 3 of the License, or
|
||||||
|
* (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||||
|
*/
|
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|
||||||
#ifdef KERNEL_MODE
|
#ifdef KERNEL_MODE
|
||||||
|
|
||||||
#include <trezor_bsp.h>
|
#include <trezor_bsp.h>
|
||||||
|
#include <trezor_rtl.h>
|
||||||
|
|
||||||
#include <sys/irq.h>
|
#include <sys/irq.h>
|
||||||
|
|
||||||
@ -9,13 +30,14 @@ extern uint8_t physical_frame_buffer_0[PHYSICAL_FRAME_BUFFER_SIZE];
|
|||||||
extern uint8_t physical_frame_buffer_1[PHYSICAL_FRAME_BUFFER_SIZE];
|
extern uint8_t physical_frame_buffer_1[PHYSICAL_FRAME_BUFFER_SIZE];
|
||||||
|
|
||||||
bool display_gfxmmu_init(display_driver_t *drv) {
|
bool display_gfxmmu_init(display_driver_t *drv) {
|
||||||
|
// Reset GFXMMU
|
||||||
__HAL_RCC_GFXMMU_FORCE_RESET();
|
__HAL_RCC_GFXMMU_FORCE_RESET();
|
||||||
__HAL_RCC_GFXMMU_RELEASE_RESET();
|
__HAL_RCC_GFXMMU_RELEASE_RESET();
|
||||||
|
|
||||||
/* GFXMMU clock enable */
|
// GFXMMU clock enable
|
||||||
__HAL_RCC_GFXMMU_CLK_ENABLE();
|
__HAL_RCC_GFXMMU_CLK_ENABLE();
|
||||||
|
|
||||||
/* GFXMMU peripheral initialization */
|
// GFXMMU peripheral initialization
|
||||||
drv->hlcd_gfxmmu.Instance = GFXMMU;
|
drv->hlcd_gfxmmu.Instance = GFXMMU;
|
||||||
drv->hlcd_gfxmmu.Init.BlocksPerLine = GFXMMU_192BLOCKS;
|
drv->hlcd_gfxmmu.Init.BlocksPerLine = GFXMMU_192BLOCKS;
|
||||||
drv->hlcd_gfxmmu.Init.DefaultValue = 0xFFFFFFFFU;
|
drv->hlcd_gfxmmu.Init.DefaultValue = 0xFFFFFFFFU;
|
||||||
@ -27,38 +49,56 @@ bool display_gfxmmu_init(display_driver_t *drv) {
|
|||||||
drv->hlcd_gfxmmu.Init.CachePrefetch.Activation = DISABLE;
|
drv->hlcd_gfxmmu.Init.CachePrefetch.Activation = DISABLE;
|
||||||
drv->hlcd_gfxmmu.Init.CachePrefetch.CacheLock = GFXMMU_CACHE_LOCK_DISABLE;
|
drv->hlcd_gfxmmu.Init.CachePrefetch.CacheLock = GFXMMU_CACHE_LOCK_DISABLE;
|
||||||
drv->hlcd_gfxmmu.Init.CachePrefetch.CacheLockBuffer =
|
drv->hlcd_gfxmmu.Init.CachePrefetch.CacheLockBuffer =
|
||||||
GFXMMU_CACHE_LOCK_BUFFER0; /* NU */
|
GFXMMU_CACHE_LOCK_BUFFER0; // NU
|
||||||
drv->hlcd_gfxmmu.Init.CachePrefetch.CacheForce =
|
drv->hlcd_gfxmmu.Init.CachePrefetch.CacheForce =
|
||||||
GFXMMU_CACHE_FORCE_ENABLE; /* NU */
|
GFXMMU_CACHE_FORCE_ENABLE; // NU
|
||||||
drv->hlcd_gfxmmu.Init.CachePrefetch.OutterBufferability =
|
drv->hlcd_gfxmmu.Init.CachePrefetch.OutterBufferability =
|
||||||
GFXMMU_OUTTER_BUFFERABILITY_DISABLE;
|
GFXMMU_OUTTER_BUFFERABILITY_DISABLE;
|
||||||
drv->hlcd_gfxmmu.Init.CachePrefetch.OutterCachability =
|
drv->hlcd_gfxmmu.Init.CachePrefetch.OutterCachability =
|
||||||
GFXMMU_OUTTER_CACHABILITY_DISABLE;
|
GFXMMU_OUTTER_CACHABILITY_DISABLE;
|
||||||
drv->hlcd_gfxmmu.Init.CachePrefetch.Prefetch = GFXMMU_PREFETCH_DISABLE;
|
drv->hlcd_gfxmmu.Init.CachePrefetch.Prefetch = GFXMMU_PREFETCH_DISABLE;
|
||||||
#endif /* GFXMMU_CR_CE */
|
#endif // GFXMMU_CR_CE
|
||||||
#if defined(GFXMMU_CR_ACE)
|
#if defined(GFXMMU_CR_ACE)
|
||||||
drv->hlcd_gfxmmu.Init.AddressCache.Activation = DISABLE;
|
drv->hlcd_gfxmmu.Init.AddressCache.Activation = DISABLE;
|
||||||
drv->hlcd_gfxmmu.Init.AddressCache.AddressCacheLockBuffer =
|
drv->hlcd_gfxmmu.Init.AddressCache.AddressCacheLockBuffer =
|
||||||
GFXMMU_ADDRESSCACHE_LOCK_BUFFER0;
|
GFXMMU_ADDRESSCACHE_LOCK_BUFFER0;
|
||||||
#endif /* GFXMMU_CR_ACE */
|
#endif // GFXMMU_CR_ACE
|
||||||
drv->hlcd_gfxmmu.Init.Interrupts.Activation = DISABLE;
|
drv->hlcd_gfxmmu.Init.Interrupts.Activation = DISABLE;
|
||||||
drv->hlcd_gfxmmu.Init.Interrupts.UsedInterrupts =
|
drv->hlcd_gfxmmu.Init.Interrupts.UsedInterrupts =
|
||||||
GFXMMU_AHB_MASTER_ERROR_IT; /* NU */
|
GFXMMU_AHB_MASTER_ERROR_IT; // NU
|
||||||
if (HAL_GFXMMU_Init(&drv->hlcd_gfxmmu) != HAL_OK) {
|
if (HAL_GFXMMU_Init(&drv->hlcd_gfxmmu) != HAL_OK) {
|
||||||
return false;
|
memset(&drv->hlcd_gfxmmu, 0, sizeof(drv->hlcd_gfxmmu));
|
||||||
|
goto cleanup;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Initialize LUT */
|
// Initialize LUT
|
||||||
if (HAL_GFXMMU_ConfigLut(&drv->hlcd_gfxmmu, 0, LCD_HEIGHT,
|
if (HAL_GFXMMU_ConfigLut(&drv->hlcd_gfxmmu, 0, LCD_HEIGHT,
|
||||||
(uint32_t)panel_lut_get()) != HAL_OK) {
|
(uint32_t)panel_lut_get()) != HAL_OK) {
|
||||||
return false;
|
goto cleanup;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (HAL_GFXMMU_DisableLutLines(&drv->hlcd_gfxmmu, LCD_HEIGHT,
|
if (HAL_GFXMMU_DisableLutLines(&drv->hlcd_gfxmmu, LCD_HEIGHT,
|
||||||
1024 - LCD_HEIGHT) != HAL_OK) {
|
1024 - LCD_HEIGHT) != HAL_OK) {
|
||||||
return false;
|
goto cleanup;
|
||||||
}
|
}
|
||||||
|
|
||||||
return true;
|
return true;
|
||||||
|
|
||||||
|
cleanup:
|
||||||
|
display_gfxmmu_deinit(drv);
|
||||||
|
return false;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
void display_gfxmmu_deinit(display_driver_t *drv) {
|
||||||
|
if (drv->hlcd_gfxmmu.Instance != NULL) {
|
||||||
|
HAL_GFXMMU_DeInit(&drv->hlcd_gfxmmu);
|
||||||
|
}
|
||||||
|
|
||||||
|
__HAL_RCC_GFXMMU_FORCE_RESET();
|
||||||
|
__HAL_RCC_GFXMMU_RELEASE_RESET();
|
||||||
|
__HAL_RCC_GFXMMU_CLK_DISABLE();
|
||||||
|
|
||||||
|
memset(&drv->hlcd_gfxmmu, 0, sizeof(drv->hlcd_gfxmmu));
|
||||||
|
}
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
@ -86,6 +86,7 @@ bool panel_init(display_driver_t *drv);
|
|||||||
const uint32_t *panel_lut_get(void);
|
const uint32_t *panel_lut_get(void);
|
||||||
|
|
||||||
bool display_gfxmmu_init(display_driver_t *drv);
|
bool display_gfxmmu_init(display_driver_t *drv);
|
||||||
|
void display_gfxmmu_deinit(display_driver_t *drv);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#endif // TREZOR_HAL_DISPLAY_INTERNAL_H
|
#endif // TREZOR_HAL_DISPLAY_INTERNAL_H
|
||||||
|
Loading…
Reference in New Issue
Block a user