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Code Issues Releases Wiki Activity

refactor(core): streamline layout definitions

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This commit is contained in:
tychovrahe 2024-09-23 16:25:18 +02:00 committed by TychoVrahe
parent 3b49e5400d
commit 21c1359ac6
45 changed files with 649 additions and 343 deletions
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24
core/Makefile
View File

@ -73,26 +73,28 @@ $(error Unknown TREZOR_MODEL: $(TREZOR_MODEL))
endif
FLASH_START = $(shell layout_parser ${TREZOR_MODEL} FLASH_START)
FLASH_START = $(shell layout_parser ${TREZOR_MODEL} FLASH_START)
BOARDLOADER_START = $(shell layout_parser ${TREZOR_MODEL} BOARDLOADER_START)
BOOTLOADER_START = $(shell layout_parser ${TREZOR_MODEL} BOOTLOADER_START)
KERNEL_START = $(shell layout_parser ${TREZOR_MODEL} KERNEL_START)
FIRMWARE_START = $(shell layout_parser ${TREZOR_MODEL} FIRMWARE_START)
FIRMWARE_P2_START = $(shell layout_parser ${TREZOR_MODEL} FIRMWARE_P2_START)
STORAGE_1_OFFSET = $(shell layout_parser ${TREZOR_MODEL} STORAGE_1_OFFSET)
STORAGE_2_OFFSET = $(shell layout_parser ${TREZOR_MODEL} STORAGE_2_OFFSET)
STORAGE_1_START = $(shell layout_parser ${TREZOR_MODEL} STORAGE_1_START)
STORAGE_2_START = $(shell layout_parser ${TREZOR_MODEL} STORAGE_2_START)
STORAGE_SIZE = $(shell layout_parser ${TREZOR_MODEL} NORCOW_SECTOR_SIZE)
BOARDLOADER_MAXSIZE = $(shell layout_parser ${TREZOR_MODEL} BOARDLOADER_IMAGE_MAXSIZE)
BOOTLOADER_MAXSIZE = $(shell layout_parser ${TREZOR_MODEL} BOOTLOADER_IMAGE_MAXSIZE)
FIRMWARE_MAXSIZE = $(shell layout_parser ${TREZOR_MODEL} FIRMWARE_IMAGE_MAXSIZE)
FIRMWARE_P1_MAXSIZE = $(shell layout_parser ${TREZOR_MODEL} FIRMWARE_P1_IMAGE_MAXSIZE)
FIRMWARE_P2_MAXSIZE = $(shell layout_parser ${TREZOR_MODEL} FIRMWARE_P2_IMAGE_MAXSIZE)
BOARDLOADER_MAXSIZE = $(shell layout_parser ${TREZOR_MODEL} BOARDLOADER_MAXSIZE)
BOOTLOADER_MAXSIZE = $(shell layout_parser ${TREZOR_MODEL} BOOTLOADER_MAXSIZE)
FIRMWARE_MAXSIZE = $(shell layout_parser ${TREZOR_MODEL} FIRMWARE_MAXSIZE)
FIRMWARE_P1_MAXSIZE = $(shell layout_parser ${TREZOR_MODEL} FIRMWARE_P1_MAXSIZE)
FIRMWARE_P2_MAXSIZE = $(shell layout_parser ${TREZOR_MODEL} FIRMWARE_P2_MAXSIZE)
BOARDLOADER_SECTOR_START = $(shell layout_parser ${TREZOR_MODEL} BOARDLOADER_SECTOR_START)
BOARDLOADER_SECTOR_END = $(shell layout_parser ${TREZOR_MODEL} BOARDLOADER_SECTOR_END)
BOOTLOADER_SECTOR_START = $(shell layout_parser ${TREZOR_MODEL} BOOTLOADER_SECTOR_START)
BOOTLOADER_SECTOR_END = $(shell layout_parser ${TREZOR_MODEL} BOOTLOADER_SECTOR_END)
FIRMWARE_SECTOR_START = $(shell layout_parser ${TREZOR_MODEL} FIRMWARE_SECTOR_START)
FIRMWARE_SECTOR_END = $(shell layout_parser ${TREZOR_MODEL} FIRMWARE_SECTOR_END)
FIRMWARE_P1_SECTOR_START = $(shell layout_parser ${TREZOR_MODEL} FIRMWARE_P1_SECTOR_START)
FIRMWARE_P1_SECTOR_END = $(shell layout_parser ${TREZOR_MODEL} FIRMWARE_P1_SECTOR_END)
FIRMWARE_P2_SECTOR_START = $(shell layout_parser ${TREZOR_MODEL} FIRMWARE_P2_SECTOR_START)
FIRMWARE_P2_SECTOR_END = $(shell layout_parser ${TREZOR_MODEL} FIRMWARE_P2_SECTOR_END)
STORAGE_1_SECTOR_START = $(shell layout_parser ${TREZOR_MODEL} STORAGE_1_SECTOR_START)
@ -100,6 +102,10 @@ STORAGE_1_SECTOR_END = $(shell layout_parser ${TREZOR_MODEL} STORAGE_1_SECTO
STORAGE_2_SECTOR_START = $(shell layout_parser ${TREZOR_MODEL} STORAGE_2_SECTOR_START)
STORAGE_2_SECTOR_END = $(shell layout_parser ${TREZOR_MODEL} STORAGE_2_SECTOR_END)
STORAGE_1_OFFSET := $(shell expr $(STORAGE_1_START) - $(FLASH_START))
STORAGE_2_OFFSET := $(shell expr $(STORAGE_2_START) - $(FLASH_START))
OPENOCD = openocd -f interface/$(OPENOCD_INTERFACE).cfg -c "transport select $(OPENOCD_TRANSPORT)" -f $(OPENOCD_TARGET)
CFLAGS += -DSCM_REVISION='\"$(shell git rev-parse HEAD | sed 's:\(..\):\\x\1:g')\"'
@ -374,7 +380,7 @@ flash_erase_bootloader: ## erase bootloader
flash_erase_firmware: ## erase bootloader
ifeq ($(MCU),$(filter $(MCU),STM32F4))
$(OPENOCD) -c "init; reset halt; flash info 0; flash erase_sector 0 $(FIRMWARE_SECTOR_START) $(FIRMWARE_SECTOR_END); flash erase_sector 0 $(FIRMWARE_P2_SECTOR_START) $(FIRMWARE_P2_SECTOR_END); exit"
$(OPENOCD) -c "init; reset halt; flash info 0; flash erase_sector 0 $(FIRMWARE_P1_SECTOR_START) $(FIRMWARE_P1_SECTOR_END); flash erase_sector 0 $(FIRMWARE_P2_SECTOR_START) $(FIRMWARE_P2_SECTOR_END); exit"
else
$(OPENOCD) -c "init; reset halt; flash info 0; flash erase_sector 0 $(FIRMWARE_SECTOR_START) $(FIRMWARE_SECTOR_END); exit"

10
core/embed/boardloader/main.c
View File

@ -108,7 +108,7 @@ struct BoardCapabilities capabilities
.terminator_length = 0};
// we use SRAM as SD card read buffer (because DMA can't access the CCMRAM)
BUFFER_SECTION uint32_t sdcard_buf[BOOTLOADER_IMAGE_MAXSIZE / sizeof(uint32_t)];
BUFFER_SECTION uint32_t sdcard_buf[BOOTLOADER_MAXSIZE / sizeof(uint32_t)];
#if defined USE_SD_CARD
static uint32_t check_sdcard(void) {
@ -124,15 +124,15 @@ static uint32_t check_sdcard(void) {
memzero(sdcard_buf, IMAGE_HEADER_SIZE);
const secbool read_status = sdcard_read_blocks(
sdcard_buf, 0, BOOTLOADER_IMAGE_MAXSIZE / SDCARD_BLOCK_SIZE);
const secbool read_status =
sdcard_read_blocks(sdcard_buf, 0, BOOTLOADER_MAXSIZE / SDCARD_BLOCK_SIZE);
sdcard_power_off();
if (sectrue == read_status) {
const image_header *hdr =
read_image_header((const uint8_t *)sdcard_buf, BOOTLOADER_IMAGE_MAGIC,
BOOTLOADER_IMAGE_MAXSIZE);
BOOTLOADER_MAXSIZE);
if (hdr != (const image_header *)sdcard_buf) {
return 0;
@ -148,7 +148,7 @@ static uint32_t check_sdcard(void) {
return 0;
}
_Static_assert(IMAGE_CHUNK_SIZE >= BOOTLOADER_IMAGE_MAXSIZE,
_Static_assert(IMAGE_CHUNK_SIZE >= BOOTLOADER_MAXSIZE,
"BOOTLOADER IMAGE MAXSIZE too large for IMAGE_CHUNK_SIZE");
const uint32_t headers_end_offset = hdr->hdrlen;

2
core/embed/bootloader/emulator.c
View File

@ -76,7 +76,7 @@ bool load_firmware(const char *filename, uint8_t *hash) {
return false;
}
const image_header *hdr = read_image_header(
buffer + vhdr.hdrlen, FIRMWARE_IMAGE_MAGIC, FIRMWARE_IMAGE_MAXSIZE);
buffer + vhdr.hdrlen, FIRMWARE_IMAGE_MAGIC, FIRMWARE_MAXSIZE);
if (hdr != (const image_header *)(buffer + vhdr.hdrlen)) {
printf("File '%s' does not contain a valid firmware image.\n", filename);
return false;

4
core/embed/bootloader/main.c
View File

@ -281,7 +281,7 @@ void real_jump_to_firmware(void) {
hdr =
read_image_header((const uint8_t *)(size_t)(FIRMWARE_START + vhdr.hdrlen),
FIRMWARE_IMAGE_MAGIC, FIRMWARE_IMAGE_MAXSIZE);
FIRMWARE_IMAGE_MAGIC, FIRMWARE_MAXSIZE);
ensure(hdr == (const image_header *)(size_t)(FIRMWARE_START + vhdr.hdrlen)
? sectrue
@ -431,7 +431,7 @@ int bootloader_main(void) {
if (sectrue == vhdr_lock_ok) {
hdr = read_image_header(
(const uint8_t *)(size_t)(FIRMWARE_START + vhdr.hdrlen),
FIRMWARE_IMAGE_MAGIC, FIRMWARE_IMAGE_MAXSIZE);
FIRMWARE_IMAGE_MAGIC, FIRMWARE_MAXSIZE);
if (hdr == (const image_header *)(size_t)(FIRMWARE_START + vhdr.hdrlen)) {
img_hdr_ok = sectrue;
}

6
core/embed/bootloader/messages.c
View File

@ -371,7 +371,7 @@ void process_msg_FirmwareErase(uint8_t iface_num, uint32_t msg_size,
firmware_remaining = msg_recv.has_length ? msg_recv.length : 0;
if ((firmware_remaining > 0) &&
((firmware_remaining % sizeof(uint32_t)) == 0) &&
(firmware_remaining <= FIRMWARE_IMAGE_MAXSIZE)) {
(firmware_remaining <= FIRMWARE_MAXSIZE)) {
// request new firmware
chunk_requested = (firmware_remaining > IMAGE_INIT_CHUNK_SIZE)
? IMAGE_INIT_CHUNK_SIZE
@ -552,7 +552,7 @@ int process_msg_FirmwareUpload(uint8_t iface_num, uint32_t msg_size,
const image_header *received_hdr =
read_image_header(CHUNK_BUFFER_PTR + vhdr.hdrlen,
FIRMWARE_IMAGE_MAGIC, FIRMWARE_IMAGE_MAXSIZE);
FIRMWARE_IMAGE_MAGIC, FIRMWARE_MAXSIZE);
if (received_hdr !=
(const image_header *)(CHUNK_BUFFER_PTR + vhdr.hdrlen)) {
@ -619,7 +619,7 @@ int process_msg_FirmwareUpload(uint8_t iface_num, uint32_t msg_size,
if (is_new == secfalse) {
current_hdr = read_image_header(
(const uint8_t *)FIRMWARE_START + current_vhdr.hdrlen,
FIRMWARE_IMAGE_MAGIC, FIRMWARE_IMAGE_MAXSIZE);
FIRMWARE_IMAGE_MAGIC, FIRMWARE_MAXSIZE);
if (current_hdr !=
(const image_header *)(FIRMWARE_START + current_vhdr.hdrlen)) {

4
core/embed/bootloader_ci/main.c
View File

@ -216,7 +216,7 @@ int main(void) {
if (sectrue == firmware_present) {
hdr = read_image_header((const uint8_t *)(FIRMWARE_START + vhdr.hdrlen),
FIRMWARE_IMAGE_MAGIC, FIRMWARE_IMAGE_MAXSIZE);
FIRMWARE_IMAGE_MAGIC, FIRMWARE_MAXSIZE);
if (hdr != (const image_header *)(FIRMWARE_START + vhdr.hdrlen)) {
firmware_present = secfalse;
}
@ -253,7 +253,7 @@ int main(void) {
ensure(check_vendor_header_lock(&vhdr), "unauthorized vendor keys");
hdr = read_image_header((const uint8_t *)(FIRMWARE_START + vhdr.hdrlen),
FIRMWARE_IMAGE_MAGIC, FIRMWARE_IMAGE_MAXSIZE);
FIRMWARE_IMAGE_MAGIC, FIRMWARE_MAXSIZE);
ensure(hdr == (const image_header *)(FIRMWARE_START + vhdr.hdrlen) ? sectrue
: secfalse,

9
core/embed/bootloader_ci/messages.c
View File

@ -342,7 +342,7 @@ void process_msg_FirmwareErase(uint8_t iface_num, uint32_t msg_size,
firmware_remaining = msg_recv.has_length ? msg_recv.length : 0;
if ((firmware_remaining > 0) &&
((firmware_remaining % sizeof(uint32_t)) == 0) &&
(firmware_remaining <= (FIRMWARE_IMAGE_MAXSIZE))) {
(firmware_remaining <= (FIRMWARE_MAXSIZE))) {
// request new firmware
chunk_requested = (firmware_remaining > IMAGE_INIT_CHUNK_SIZE)
? IMAGE_INIT_CHUNK_SIZE
@ -499,9 +499,8 @@ int process_msg_FirmwareUpload(uint8_t iface_num, uint32_t msg_size,
return UPLOAD_ERR_INVALID_VENDOR_HEADER_SIG;
}
const image_header *received_hdr =
read_image_header(chunk_buffer + vhdr.hdrlen, FIRMWARE_IMAGE_MAGIC,
FIRMWARE_IMAGE_MAXSIZE);
const image_header *received_hdr = read_image_header(
chunk_buffer + vhdr.hdrlen, FIRMWARE_IMAGE_MAGIC, FIRMWARE_MAXSIZE);
if (received_hdr != (const image_header *)(chunk_buffer + vhdr.hdrlen)) {
MSG_SEND_INIT(Failure);
@ -544,7 +543,7 @@ int process_msg_FirmwareUpload(uint8_t iface_num, uint32_t msg_size,
if (is_new == secfalse) {
current_hdr = read_image_header(
(const uint8_t *)FIRMWARE_START + current_vhdr.hdrlen,
FIRMWARE_IMAGE_MAGIC, FIRMWARE_IMAGE_MAXSIZE);
FIRMWARE_IMAGE_MAGIC, FIRMWARE_MAXSIZE);
if (current_hdr !=
(const image_header *)(FIRMWARE_START + current_vhdr.hdrlen)) {

6
core/embed/lib/bl_check.c
View File

@ -117,15 +117,15 @@ void check_and_replace_bootloader(void) {
"Bootloader header decompression failed");
const image_header *new_bld_hdr = read_image_header(
(uint8_t *)decomp_out, BOOTLOADER_IMAGE_MAGIC, BOOTLOADER_IMAGE_MAXSIZE);
(uint8_t *)decomp_out, BOOTLOADER_IMAGE_MAGIC, BOOTLOADER_MAXSIZE);
ensure(new_bld_hdr == (const image_header *)decomp_out ? sectrue : secfalse,
"Invalid embedded bootloader");
ensure(check_image_model(new_bld_hdr), "Incompatible embedded bootloader");
const image_header *current_bld_hdr = read_image_header(
bl_data, BOOTLOADER_IMAGE_MAGIC, BOOTLOADER_IMAGE_MAXSIZE);
const image_header *current_bld_hdr =
read_image_header(bl_data, BOOTLOADER_IMAGE_MAGIC, BOOTLOADER_MAXSIZE);
// cannot find valid header for current bootloader, something is wrong
ensure(current_bld_hdr == (const image_header *)bl_data ? sectrue : secfalse,

2
core/embed/lib/image.c
View File

@ -363,7 +363,7 @@ secbool check_firmware_header(const uint8_t *header, size_t header_size,
// parse and check image header
const image_header *ihdr;
if ((ihdr = read_image_header(header + vhdr.hdrlen, FIRMWARE_IMAGE_MAGIC,
FIRMWARE_IMAGE_MAXSIZE)) == NULL) {
FIRMWARE_MAXSIZE)) == NULL) {
return secfalse;
}
if (sectrue !=

58
core/embed/models/D001/memory.ld
View File

@ -1,36 +1,52 @@
/* Auto-generated file, do not edit.*/
NORCOW_SECTOR_SIZE = 0x10000;
FLASH_START = 0x8000000;
BOARDLOADER_START = 0x8000000;
BOOTLOADER_START = 0x8020000;
FIRMWARE_START = 0x8040000;
FIRMWARE_P2_START = 0x8120000;
KERNEL_START = 0x8040000;
STORAGE_1_OFFSET = 0x10000;
STORAGE_2_OFFSET = 0x110000;
NORCOW_SECTOR_SIZE = 0x10000;
BOARDLOADER_IMAGE_MAXSIZE = 0xc000;
BOOTLOADER_IMAGE_MAXSIZE = 0x20000;
FIRMWARE_IMAGE_MAXSIZE = 0x1a0000;
FIRMWARE_P1_IMAGE_MAXSIZE = 0xc0000;
FIRMWARE_P2_IMAGE_MAXSIZE = 0xe0000;
KERNEL_IMAGE_MAXSIZE = 0x80000;
BOARDLOADER_MAXSIZE = 0xc000;
BOARDLOADER_SECTOR_START = 0x0;
BOARDLOADER_SECTOR_END = 0x3;
BOOTLOADER_SECTOR_START = 0x5;
BOOTLOADER_SECTOR_END = 0x5;
FIRMWARE_SECTOR_START = 0x6;
FIRMWARE_SECTOR_END = 0xb;
FIRMWARE_P2_SECTOR_START = 0x11;
FIRMWARE_P2_SECTOR_END = 0x17;
BOARDLOADER_SECTOR_END = 0x2;
BOARDCAPS_START = 0x800bf00;
BOARDCAPS_MAXSIZE = 0x100;
UNUSED_1_START = 0x800c000;
UNUSED_1_MAXSIZE = 0x4000;
UNUSED_1_SECTOR_START = 0x3;
UNUSED_1_SECTOR_END = 0x3;
STORAGE_1_START = 0x8010000;
STORAGE_1_MAXSIZE = 0x10000;
STORAGE_1_SECTOR_START = 0x4;
STORAGE_1_SECTOR_END = 0x4;
BOOTLOADER_START = 0x8020000;
BOOTLOADER_MAXSIZE = 0x20000;
BOOTLOADER_SECTOR_START = 0x5;
BOOTLOADER_SECTOR_END = 0x5;
FIRMWARE_START = 0x8040000;
FIRMWARE_MAXSIZE = 0x1a0000;
FIRMWARE_P1_START = 0x8040000;
FIRMWARE_P1_MAXSIZE = 0xc0000;
FIRMWARE_P1_SECTOR_START = 0x6;
FIRMWARE_P1_SECTOR_END = 0xb;
KERNEL_START = 0x8040000;
KERNEL_MAXSIZE = 0x80000;
ASSETS_START = 0x8100000;
ASSETS_MAXSIZE = 0xc000;
ASSETS_SECTOR_START = 0xc;
ASSETS_SECTOR_END = 0xe;
UNUSED_2_START = 0x810c000;
UNUSED_2_MAXSIZE = 0x4000;
UNUSED_2_SECTOR_START = 0xf;
UNUSED_2_SECTOR_END = 0xf;
STORAGE_2_START = 0x8110000;
STORAGE_2_MAXSIZE = 0x10000;
STORAGE_2_SECTOR_START = 0x10;
STORAGE_2_SECTOR_END = 0x10;
FIRMWARE_P2_START = 0x8120000;
FIRMWARE_P2_MAXSIZE = 0xe0000;
FIRMWARE_P2_SECTOR_START = 0x11;
FIRMWARE_P2_SECTOR_END = 0x17;
KERNEL_STACK_SIZE = 0x2000;
KERNEL_CCMRAM_SIZE = 0x4000;
KERNEL_FRAMEBUFFER_SIZE = 0x0;
KERNEL_SRAM_SIZE = 0x400;
BOOTARGS_SIZE = 0x100;
BOARD_CAPABILITIES_ADDR = 0x800bf00;
CODE_ALIGNMENT = 0x200;

74
core/embed/models/D001/model_D001.h
View File

@ -25,40 +25,72 @@
#define DISPLAY_JUMP_BEHAVIOR DISPLAY_RESET_CONTENT
// SHARED WITH MAKEFILE
// common
#define NORCOW_SECTOR_SIZE (1 * 64 * 1024) // 64 kB
#define FLASH_START 0x08000000
// FLASH layout
#define BOARDLOADER_START 0x08000000
#define BOOTLOADER_START 0x08020000
#define FIRMWARE_START 0x08040000
#define FIRMWARE_P2_START 0x08120000
#define KERNEL_START 0x08040000
#define STORAGE_1_OFFSET 0x10000
#define STORAGE_2_OFFSET 0x110000
#define NORCOW_SECTOR_SIZE (1 * 64 * 1024) // 64 kB
#define BOARDLOADER_IMAGE_MAXSIZE (3 * 16 * 1024) // 48 kB
#define BOOTLOADER_IMAGE_MAXSIZE (1 * 128 * 1024) // 128 kB
#define FIRMWARE_IMAGE_MAXSIZE (13 * 128 * 1024) // 1664 kB
#define FIRMWARE_P1_IMAGE_MAXSIZE (6 * 128 * 1024)
#define FIRMWARE_P2_IMAGE_MAXSIZE (7 * 128 * 1024)
#define KERNEL_IMAGE_MAXSIZE (4 * 128 * 1024)
#define BOARDLOADER_MAXSIZE (3 * 16 * 1024) // 48 kB
#define BOARDLOADER_SECTOR_START 0
#define BOARDLOADER_SECTOR_END 3
#define BOOTLOADER_SECTOR_START 5
#define BOOTLOADER_SECTOR_END 5
#define FIRMWARE_SECTOR_START 6
#define FIRMWARE_SECTOR_END 11
#define FIRMWARE_P2_SECTOR_START 17
#define FIRMWARE_P2_SECTOR_END 23
#define BOARDLOADER_SECTOR_END 2
#define BOARDCAPS_START 0x0800BF00
#define BOARDCAPS_MAXSIZE 0x100
#define UNUSED_1_START 0x0800C000
#define UNUSED_1_MAXSIZE (1 * 16 * 1024) // 16 kB
#define UNUSED_1_SECTOR_START 3
#define UNUSED_1_SECTOR_END 3
#define STORAGE_1_START 0x08010000
#define STORAGE_1_MAXSIZE (1 * 64 * 1024) // 64 kB
#define STORAGE_1_SECTOR_START 4
#define STORAGE_1_SECTOR_END 4
#define BOOTLOADER_START 0x08020000
#define BOOTLOADER_MAXSIZE (1 * 128 * 1024) // 128 kB
#define BOOTLOADER_SECTOR_START 5
#define BOOTLOADER_SECTOR_END 5
#define FIRMWARE_START 0x08040000
#define FIRMWARE_MAXSIZE (13 * 128 * 1024) // 1664 kB
#define FIRMWARE_P1_START 0x08040000
#define FIRMWARE_P1_MAXSIZE (6 * 128 * 1024)
#define FIRMWARE_P1_SECTOR_START 6
#define FIRMWARE_P1_SECTOR_END 11
// part of firmware P1
#define KERNEL_START 0x08040000
#define KERNEL_MAXSIZE (4 * 128 * 1024)
#define ASSETS_START 0x08100000
#define ASSETS_MAXSIZE (3 * 16 * 1024) // 48 kB
#define ASSETS_SECTOR_START 12
#define ASSETS_SECTOR_END 14
#define UNUSED_2_START 0x0810C000
#define UNUSED_2_MAXSIZE (1 * 16 * 1024) // 16 kB
#define UNUSED_2_SECTOR_START 15
#define UNUSED_2_SECTOR_END 15
#define STORAGE_2_START 0x08110000
#define STORAGE_2_MAXSIZE (1 * 64 * 1024) // 64 kB
#define STORAGE_2_SECTOR_START 16
#define STORAGE_2_SECTOR_END 16
#define FIRMWARE_P2_START 0x08120000
#define FIRMWARE_P2_MAXSIZE (7 * 128 * 1024)
#define FIRMWARE_P2_SECTOR_START 17
#define FIRMWARE_P2_SECTOR_END 23
// RAM layout
#define KERNEL_STACK_SIZE 8 * 1024
#define KERNEL_CCMRAM_SIZE 16 * 1024
#define KERNEL_FRAMEBUFFER_SIZE 0 * 1024
#define KERNEL_SRAM_SIZE 1 * 1024
#define BOOTARGS_SIZE 0x100
#define BOARD_CAPABILITIES_ADDR 0x0800BF00
#define CODE_ALIGNMENT 0x200
#endif

43
core/embed/models/D002/memory.ld
View File

@ -1,32 +1,47 @@
/* Auto-generated file, do not edit.*/
FLASH_START = 0xc000000;
BOARDLOADER_START = 0xc004000;
BOOTLOADER_START = 0xc010000;
KERNEL_START = 0xc050000;
FIRMWARE_START = 0xc050000;
STORAGE_1_OFFSET = 0x30000;
STORAGE_2_OFFSET = 0x40000;
FLASH_START = 0xc004000;
NORCOW_SECTOR_SIZE = 0x10000;
BOARDLOADER_IMAGE_MAXSIZE = 0xc000;
BOOTLOADER_IMAGE_MAXSIZE = 0x20000;
FIRMWARE_IMAGE_MAXSIZE = 0x3a0000;
KERNEL_IMAGE_MAXSIZE = 0x80000;
SECRET_START = 0xc000000;
SECRET_MAXSIZE = 0x4000;
SECRET_SECTOR_START = 0x0;
SECRET_SECTOR_END = 0x1;
BHK_START = 0xc002000;
BHK_MAXSIZE = 0x4000;
BHK_SECTOR_START = 0x1;
BHK_SECTOR_END = 0x1;
BOARDLOADER_START = 0xc004000;
BOARDLOADER_MAXSIZE = 0xc000;
BOARDLOADER_SECTOR_START = 0x2;
BOARDLOADER_SECTOR_END = 0x7;
BOARDCAPS_START = 0xc00ff00;
BOARDCAPS_MAXSIZE = 0x100;
BOOTLOADER_START = 0xc010000;
BOOTLOADER_MAXSIZE = 0x20000;
BOOTLOADER_SECTOR_START = 0x8;
BOOTLOADER_SECTOR_END = 0x17;
FIRMWARE_SECTOR_START = 0x28;
FIRMWARE_SECTOR_END = 0x1f7;
STORAGE_1_START = 0xc030000;
STORAGE_1_MAXSIZE = 0x10000;
STORAGE_1_SECTOR_START = 0x18;
STORAGE_1_SECTOR_END = 0x1f;
STORAGE_2_START = 0xc040000;
STORAGE_2_MAXSIZE = 0x10000;
STORAGE_2_SECTOR_START = 0x20;
STORAGE_2_SECTOR_END = 0x27;
FIRMWARE_START = 0xc050000;
FIRMWARE_MAXSIZE = 0x3a0000;
FIRMWARE_SECTOR_START = 0x28;
FIRMWARE_SECTOR_END = 0x1f7;
KERNEL_START = 0xc050000;
KERNEL_MAXSIZE = 0x80000;
KERNEL_U_FLASH_SIZE = 0x200;
ASSETS_START = 0xc3f0000;
ASSETS_MAXSIZE = 0x10000;
ASSETS_SECTOR_START = 0x1f8;
ASSETS_SECTOR_END = 0x1ff;
KERNEL_U_RAM_SIZE = 0x200;
KERNEL_SRAM1_SIZE = 0x4000;
KERNEL_SRAM2_SIZE = 0x2400;
KERNEL_SRAM3_SIZE = 0xbb800;
BOOTARGS_SIZE = 0x100;
BOARD_CAPABILITIES_ADDR = 0xc00ff00;
CODE_ALIGNMENT = 0x400;

56
core/embed/models/D002/model_D002.h
View File

@ -28,37 +28,65 @@
#define DISPLAY_JUMP_BEHAVIOR DISPLAY_RESET_CONTENT
// SHARED WITH MAKEFILE, LINKER SCRIPT etc.
#define FLASH_START 0x0C000000
// misc
#define FLASH_START 0x0C004000
#define NORCOW_SECTOR_SIZE (8 * 8 * 1024) // 64 kB
// FLASH layout
#define SECRET_START 0x0C000000
#define SECRET_MAXSIZE (2 * 8 * 1024) // 8 kB
#define SECRET_SECTOR_START 0x0
#define SECRET_SECTOR_END 0x1
// overlaps with secret
#define BHK_START 0x0C002000
#define BHK_MAXSIZE (2 * 8 * 1024) // 8 kB
#define BHK_SECTOR_START 0x1
#define BHK_SECTOR_END 0x1
#define BOARDLOADER_START 0x0C004000
#define BOOTLOADER_START 0x0C010000
#define KERNEL_START 0x0C050000
#define FIRMWARE_START 0x0C050000
#define STORAGE_1_OFFSET 0x30000
#define STORAGE_2_OFFSET 0x40000
#define NORCOW_SECTOR_SIZE (8 * 8 * 1024) // 64 kB
#define BOARDLOADER_IMAGE_MAXSIZE (6 * 8 * 1024) // 48 kB
#define BOOTLOADER_IMAGE_MAXSIZE (16 * 8 * 1024) // 128 kB
#define FIRMWARE_IMAGE_MAXSIZE (464 * 8 * 1024) // 3712 kB
#define KERNEL_IMAGE_MAXSIZE (512 * 1024) // 512 kB
#define BOARDLOADER_MAXSIZE (6 * 8 * 1024) // 48 kB
#define BOARDLOADER_SECTOR_START 0x2
#define BOARDLOADER_SECTOR_END 0x7
#define BOARDCAPS_START 0x0C00FF00
#define BOARDCAPS_MAXSIZE 0x100
#define BOOTLOADER_START 0x0C010000
#define BOOTLOADER_MAXSIZE (16 * 8 * 1024) // 128 kB
#define BOOTLOADER_SECTOR_START 0x8
#define BOOTLOADER_SECTOR_END 0x17
#define FIRMWARE_SECTOR_START 0x28
#define FIRMWARE_SECTOR_END 0x1F7
#define STORAGE_1_START 0x0C030000
#define STORAGE_1_MAXSIZE (8 * 8 * 1024) // 64 kB
#define STORAGE_1_SECTOR_START 0x18
#define STORAGE_1_SECTOR_END 0x1F
#define STORAGE_2_START 0x0C040000
#define STORAGE_2_MAXSIZE (8 * 8 * 1024) // 64 kB
#define STORAGE_2_SECTOR_START 0x20
#define STORAGE_2_SECTOR_END 0x27
#define FIRMWARE_START 0x0C050000
#define FIRMWARE_MAXSIZE (464 * 8 * 1024) // 3712 kB
#define FIRMWARE_SECTOR_START 0x28
#define FIRMWARE_SECTOR_END 0x1F7
#define KERNEL_START 0x0C050000
#define KERNEL_MAXSIZE (512 * 1024) // 512 kB
#define KERNEL_U_FLASH_SIZE 512
#define ASSETS_START 0x0C3F0000
#define ASSETS_MAXSIZE (8 * 8 * 1024) // 64 kB
#define ASSETS_SECTOR_START 0x1F8
#define ASSETS_SECTOR_END 0x1FF
// RAM layout
#define KERNEL_U_RAM_SIZE 512
#define KERNEL_SRAM1_SIZE 16 * 1024
#define KERNEL_SRAM2_SIZE 9 * 1024
#define KERNEL_SRAM3_SIZE 750 * 1024
#define BOOTARGS_SIZE 0x100
#define BOARD_CAPABILITIES_ADDR 0x0C00FF00
#define CODE_ALIGNMENT 0x400
#endif

12
core/embed/models/D002/model_D002_layout.c
View File

@ -54,8 +54,8 @@ const flash_area_t SECRET_AREA = {
.num_subareas = 1,
.subarea[0] =
{
.first_sector = 0,
.num_sectors = 2,
.first_sector = SECRET_SECTOR_START,
.num_sectors = SECRET_SECTOR_END - SECRET_SECTOR_START + 1,
},
};
@ -63,8 +63,8 @@ const flash_area_t BHK_AREA = {
.num_subareas = 1,
.subarea[0] =
{
.first_sector = 1,
.num_sectors = 1,
.first_sector = BHK_SECTOR_START,
.num_sectors = BHK_SECTOR_END - BHK_SECTOR_START + 1,
},
};
@ -72,8 +72,8 @@ const flash_area_t TRANSLATIONS_AREA = {
.num_subareas = 1,
.subarea[0] =
{
.first_sector = 504,
.num_sectors = 8,
.first_sector = ASSETS_SECTOR_START,
.num_sectors = ASSETS_SECTOR_END - ASSETS_SECTOR_START + 1,
},
};

62
core/embed/models/T2B1/memory.ld
View File

@ -1,36 +1,56 @@
/* Auto-generated file, do not edit.*/
NORCOW_SECTOR_SIZE = 0x10000;
FLASH_START = 0x8000000;
BOARDLOADER_START = 0x8000000;
BOOTLOADER_START = 0x8020000;
FIRMWARE_START = 0x8040000;
FIRMWARE_P2_START = 0x8120000;
KERNEL_START = 0x8040000;
STORAGE_1_OFFSET = 0x10000;
STORAGE_2_OFFSET = 0x110000;
NORCOW_SECTOR_SIZE = 0x10000;
BOARDLOADER_IMAGE_MAXSIZE = 0xc000;
BOOTLOADER_IMAGE_MAXSIZE = 0x20000;
FIRMWARE_IMAGE_MAXSIZE = 0x1a0000;
FIRMWARE_P1_IMAGE_MAXSIZE = 0xc0000;
FIRMWARE_P2_IMAGE_MAXSIZE = 0xe0000;
KERNEL_IMAGE_MAXSIZE = 0x80000;
BOARDLOADER_MAXSIZE = 0xc000;
BOARDLOADER_SECTOR_START = 0x0;
BOARDLOADER_SECTOR_END = 0x3;
BOOTLOADER_SECTOR_START = 0x5;
BOOTLOADER_SECTOR_END = 0x5;
FIRMWARE_SECTOR_START = 0x6;
FIRMWARE_SECTOR_END = 0xb;
FIRMWARE_P2_SECTOR_START = 0x11;
FIRMWARE_P2_SECTOR_END = 0x17;
BOARDLOADER_SECTOR_END = 0x2;
BOARDCAPS_START = 0x800bf00;
BOARDCAPS_MAXSIZE = 0x100;
UNUSED_1_START = 0x800c000;
UNUSED_1_MAXSIZE = 0x4000;
UNUSED_1_SECTOR_START = 0x3;
UNUSED_1_SECTOR_END = 0x3;
STORAGE_1_START = 0x8010000;
STORAGE_1_MAXSIZE = 0x10000;
STORAGE_1_SECTOR_START = 0x4;
STORAGE_1_SECTOR_END = 0x4;
BOOTLOADER_START = 0x8020000;
BOOTLOADER_MAXSIZE = 0x20000;
BOOTLOADER_SECTOR_START = 0x5;
BOOTLOADER_SECTOR_END = 0x5;
FIRMWARE_START = 0x8040000;
FIRMWARE_MAXSIZE = 0x1a0000;
FIRMWARE_P1_START = 0x8040000;
FIRMWARE_P1_MAXSIZE = 0xc0000;
FIRMWARE_P1_SECTOR_START = 0x6;
FIRMWARE_P1_SECTOR_END = 0xb;
KERNEL_START = 0x8040000;
KERNEL_MAXSIZE = 0x80000;
SECRET_START = 0x8104000;
SECRET_MAXSIZE = 0x4000;
SECRET_SECTOR_START = 0xc;
SECRET_SECTOR_END = 0xc;
ASSETS_START = 0x8100000;
ASSETS_MAXSIZE = 0x8000;
ASSETS_SECTOR_START = 0xd;
ASSETS_SECTOR_END = 0xe;
UNUSED_2_START = 0x810c000;
UNUSED_2_MAXSIZE = 0x4000;
UNUSED_2_SECTOR_START = 0xf;
UNUSED_2_SECTOR_END = 0xf;
STORAGE_2_START = 0x8110000;
STORAGE_2_MAXSIZE = 0x10000;
STORAGE_2_SECTOR_START = 0x10;
STORAGE_2_SECTOR_END = 0x10;
FIRMWARE_P2_START = 0x8120000;
FIRMWARE_P2_MAXSIZE = 0xe0000;
FIRMWARE_P2_SECTOR_START = 0x11;
FIRMWARE_P2_SECTOR_END = 0x17;
KERNEL_STACK_SIZE = 0x2000;
KERNEL_CCMRAM_SIZE = 0x4000;
KERNEL_FRAMEBUFFER_SIZE = 0x2000;
KERNEL_SRAM_SIZE = 0x400;
BOOTARGS_SIZE = 0x100;
BOARD_CAPABILITIES_ADDR = 0x800bf00;
CODE_ALIGNMENT = 0x200;

79
core/embed/models/T2B1/model_T2B1.h
View File

@ -27,40 +27,77 @@
#define DISPLAY_JUMP_BEHAVIOR DISPLAY_RETAIN_CONTENT
// SHARED WITH MAKEFILE
// common
#define NORCOW_SECTOR_SIZE (1 * 64 * 1024) // 64 kB
#define FLASH_START 0x08000000
// FLASH layout
#define BOARDLOADER_START 0x08000000
#define BOOTLOADER_START 0x08020000
#define FIRMWARE_START 0x08040000
#define FIRMWARE_P2_START 0x08120000
#define KERNEL_START 0x08040000
#define STORAGE_1_OFFSET 0x10000
#define STORAGE_2_OFFSET 0x110000
#define NORCOW_SECTOR_SIZE (1 * 64 * 1024) // 64 kB
#define BOARDLOADER_IMAGE_MAXSIZE (3 * 16 * 1024) // 48 kB
#define BOOTLOADER_IMAGE_MAXSIZE (1 * 128 * 1024) // 128 kB
#define FIRMWARE_IMAGE_MAXSIZE (13 * 128 * 1024) // 1664 kB
#define FIRMWARE_P1_IMAGE_MAXSIZE (6 * 128 * 1024)
#define FIRMWARE_P2_IMAGE_MAXSIZE (7 * 128 * 1024)
#define KERNEL_IMAGE_MAXSIZE (4 * 128 * 1024)
#define BOARDLOADER_MAXSIZE (3 * 16 * 1024) // 48 kB
#define BOARDLOADER_SECTOR_START 0
#define BOARDLOADER_SECTOR_END 3
#define BOOTLOADER_SECTOR_START 5
#define BOOTLOADER_SECTOR_END 5
#define FIRMWARE_SECTOR_START 6
#define FIRMWARE_SECTOR_END 11
#define FIRMWARE_P2_SECTOR_START 17
#define FIRMWARE_P2_SECTOR_END 23
#define BOARDLOADER_SECTOR_END 2
#define BOARDCAPS_START 0x0800BF00
#define BOARDCAPS_MAXSIZE 0x100
#define UNUSED_1_START 0x0800C000
#define UNUSED_1_MAXSIZE (1 * 16 * 1024) // 16 kB
#define UNUSED_1_SECTOR_START 3
#define UNUSED_1_SECTOR_END 3
#define STORAGE_1_START 0x08010000
#define STORAGE_1_MAXSIZE (1 * 64 * 1024) // 64 kB
#define STORAGE_1_SECTOR_START 4
#define STORAGE_1_SECTOR_END 4
#define BOOTLOADER_START 0x08020000
#define BOOTLOADER_MAXSIZE (1 * 128 * 1024) // 128 kB
#define BOOTLOADER_SECTOR_START 5
#define BOOTLOADER_SECTOR_END 5
#define FIRMWARE_START 0x08040000
#define FIRMWARE_MAXSIZE (13 * 128 * 1024) // 1664 kB
#define FIRMWARE_P1_START 0x08040000
#define FIRMWARE_P1_MAXSIZE (6 * 128 * 1024)
#define FIRMWARE_P1_SECTOR_START 6
#define FIRMWARE_P1_SECTOR_END 11
// part of firmware P1
#define KERNEL_START 0x08040000
#define KERNEL_MAXSIZE (4 * 128 * 1024)
#define SECRET_START 0x08104000
#define SECRET_MAXSIZE (1 * 16 * 1024) // 16 kB
#define SECRET_SECTOR_START 12
#define SECRET_SECTOR_END 12
#define ASSETS_START 0x08100000
#define ASSETS_MAXSIZE (2 * 16 * 1024) // 32 kB
#define ASSETS_SECTOR_START 13
#define ASSETS_SECTOR_END 14
#define UNUSED_2_START 0x0810C000
#define UNUSED_2_MAXSIZE (1 * 16 * 1024) // 16 kB
#define UNUSED_2_SECTOR_START 15
#define UNUSED_2_SECTOR_END 15
#define STORAGE_2_START 0x08110000
#define STORAGE_2_MAXSIZE (1 * 64 * 1024) // 64 kB
#define STORAGE_2_SECTOR_START 16
#define STORAGE_2_SECTOR_END 16
#define FIRMWARE_P2_START 0x08120000
#define FIRMWARE_P2_MAXSIZE (7 * 128 * 1024)
#define FIRMWARE_P2_SECTOR_START 17
#define FIRMWARE_P2_SECTOR_END 23
// RAM layout
#define KERNEL_STACK_SIZE 8 * 1024
#define KERNEL_CCMRAM_SIZE 16 * 1024
#define KERNEL_FRAMEBUFFER_SIZE 8 * 1024
#define KERNEL_SRAM_SIZE 1 * 1024
#define BOOTARGS_SIZE 0x100
#define BOARD_CAPABILITIES_ADDR 0x0800BF00
#define CODE_ALIGNMENT 0x200
#endif

47
core/embed/models/T2B1/model_T2B1_layout.c
View File

@ -32,21 +32,12 @@ const flash_area_t BOARDLOADER_AREA = {
},
};
const flash_area_t SECRET_AREA = {
.num_subareas = 1,
.subarea[0] =
{
.first_sector = 12,
.num_sectors = 1,
},
};
const flash_area_t TRANSLATIONS_AREA = {
.num_subareas = 1,
.subarea[0] =
{
.first_sector = 13,
.num_sectors = 2,
.first_sector = ASSETS_SECTOR_START,
.num_sectors = ASSETS_SECTOR_END - ASSETS_SECTOR_START + 1,
},
};
@ -63,8 +54,9 @@ const flash_area_t FIRMWARE_AREA = {
.num_subareas = 2,
.subarea[0] =
{
.first_sector = FIRMWARE_SECTOR_START,
.num_sectors = FIRMWARE_SECTOR_END - FIRMWARE_SECTOR_START + 1,
.first_sector = FIRMWARE_P1_SECTOR_START,
.num_sectors =
FIRMWARE_P1_SECTOR_END - FIRMWARE_P1_SECTOR_START + 1,
},
.subarea[1] =
{
@ -74,16 +66,37 @@ const flash_area_t FIRMWARE_AREA = {
},
};
#ifdef SECRET_SECTOR_START
const flash_area_t SECRET_AREA = {
.num_subareas = 1,
.subarea[0] =
{
.first_sector = SECRET_SECTOR_START,
.num_sectors = SECRET_SECTOR_END - SECRET_SECTOR_START + 1,
},
};
#else
const flash_area_t SECRET_AREA = {
.num_subareas = 1,
.subarea[0] =
{
.first_sector = 0,
.num_sectors = 0,
},
};
#endif
const flash_area_t UNUSED_AREA = {
.num_subareas = 2,
.subarea[0] =
{
.first_sector = 3,
.num_sectors = 1,
.first_sector = UNUSED_1_SECTOR_START,
.num_sectors = UNUSED_1_SECTOR_END - UNUSED_1_SECTOR_START + 1,
},
.subarea[1] =
{
.first_sector = 15,
.num_sectors = 1,
.first_sector = UNUSED_2_SECTOR_START,
.num_sectors = UNUSED_2_SECTOR_END - UNUSED_2_SECTOR_START + 1,
},
};

58
core/embed/models/T2T1/memory.ld
View File

@ -1,36 +1,52 @@
/* Auto-generated file, do not edit.*/
NORCOW_SECTOR_SIZE = 0x10000;
FLASH_START = 0x8000000;
BOARDLOADER_START = 0x8000000;
BOOTLOADER_START = 0x8020000;
FIRMWARE_START = 0x8040000;
FIRMWARE_P2_START = 0x8120000;
KERNEL_START = 0x8040000;
STORAGE_1_OFFSET = 0x10000;
STORAGE_2_OFFSET = 0x110000;
NORCOW_SECTOR_SIZE = 0x10000;
BOARDLOADER_IMAGE_MAXSIZE = 0xc000;
BOOTLOADER_IMAGE_MAXSIZE = 0x20000;
FIRMWARE_IMAGE_MAXSIZE = 0x1a0000;
FIRMWARE_P1_IMAGE_MAXSIZE = 0xc0000;
FIRMWARE_P2_IMAGE_MAXSIZE = 0xe0000;
KERNEL_IMAGE_MAXSIZE = 0x80000;
BOARDLOADER_MAXSIZE = 0xc000;
BOARDLOADER_SECTOR_START = 0x0;
BOARDLOADER_SECTOR_END = 0x3;
BOOTLOADER_SECTOR_START = 0x5;
BOOTLOADER_SECTOR_END = 0x5;
FIRMWARE_SECTOR_START = 0x6;
FIRMWARE_SECTOR_END = 0xb;
FIRMWARE_P2_SECTOR_START = 0x11;
FIRMWARE_P2_SECTOR_END = 0x17;
BOARDLOADER_SECTOR_END = 0x2;
BOARDCAPS_START = 0x800bf00;
BOARDCAPS_MAXSIZE = 0x100;
UNUSED_1_START = 0x800c000;
UNUSED_1_MAXSIZE = 0x4000;
UNUSED_1_SECTOR_START = 0x3;
UNUSED_1_SECTOR_END = 0x3;
STORAGE_1_START = 0x8010000;
STORAGE_1_MAXSIZE = 0x10000;
STORAGE_1_SECTOR_START = 0x4;
STORAGE_1_SECTOR_END = 0x4;
BOOTLOADER_START = 0x8020000;
BOOTLOADER_MAXSIZE = 0x20000;
BOOTLOADER_SECTOR_START = 0x5;
BOOTLOADER_SECTOR_END = 0x5;
FIRMWARE_START = 0x8040000;
FIRMWARE_MAXSIZE = 0x1a0000;
FIRMWARE_P1_START = 0x8040000;
FIRMWARE_P1_MAXSIZE = 0xc0000;
FIRMWARE_P1_SECTOR_START = 0x6;
FIRMWARE_P1_SECTOR_END = 0xb;
KERNEL_START = 0x8040000;
KERNEL_MAXSIZE = 0x80000;
ASSETS_START = 0x8100000;
ASSETS_MAXSIZE = 0xc000;
ASSETS_SECTOR_START = 0xc;
ASSETS_SECTOR_END = 0xe;
UNUSED_2_START = 0x810c000;
UNUSED_2_MAXSIZE = 0x4000;
UNUSED_2_SECTOR_START = 0xf;
UNUSED_2_SECTOR_END = 0xf;
STORAGE_2_START = 0x8110000;
STORAGE_2_MAXSIZE = 0x10000;
STORAGE_2_SECTOR_START = 0x10;
STORAGE_2_SECTOR_END = 0x10;
FIRMWARE_P2_START = 0x8120000;
FIRMWARE_P2_MAXSIZE = 0xe0000;
FIRMWARE_P2_SECTOR_START = 0x11;
FIRMWARE_P2_SECTOR_END = 0x17;
KERNEL_STACK_SIZE = 0x2000;
KERNEL_CCMRAM_SIZE = 0x4000;
KERNEL_FRAMEBUFFER_SIZE = 0x0;
KERNEL_SRAM_SIZE = 0x400;
BOOTARGS_SIZE = 0x100;
BOARD_CAPABILITIES_ADDR = 0x800bf00;
CODE_ALIGNMENT = 0x200;

74
core/embed/models/T2T1/model_T2T1.h
View File

@ -27,40 +27,72 @@
#define DISPLAY_JUMP_BEHAVIOR DISPLAY_RETAIN_CONTENT
// SHARED WITH MAKEFILE
// common
#define NORCOW_SECTOR_SIZE (1 * 64 * 1024) // 64 kB
#define FLASH_START 0x08000000
// FLASH layout
#define BOARDLOADER_START 0x08000000
#define BOOTLOADER_START 0x08020000
#define FIRMWARE_START 0x08040000
#define FIRMWARE_P2_START 0x08120000
#define KERNEL_START 0x08040000
#define STORAGE_1_OFFSET 0x10000
#define STORAGE_2_OFFSET 0x110000
#define NORCOW_SECTOR_SIZE (1 * 64 * 1024) // 64 kB
#define BOARDLOADER_IMAGE_MAXSIZE (3 * 16 * 1024) // 48 kB
#define BOOTLOADER_IMAGE_MAXSIZE (1 * 128 * 1024) // 128 kB
#define FIRMWARE_IMAGE_MAXSIZE (13 * 128 * 1024) // 1664 kB
#define FIRMWARE_P1_IMAGE_MAXSIZE (6 * 128 * 1024)
#define FIRMWARE_P2_IMAGE_MAXSIZE (7 * 128 * 1024)
#define KERNEL_IMAGE_MAXSIZE (4 * 128 * 1024)
#define BOARDLOADER_MAXSIZE (3 * 16 * 1024) // 48 kB
#define BOARDLOADER_SECTOR_START 0
#define BOARDLOADER_SECTOR_END 3
#define BOOTLOADER_SECTOR_START 5
#define BOOTLOADER_SECTOR_END 5
#define FIRMWARE_SECTOR_START 6
#define FIRMWARE_SECTOR_END 11
#define FIRMWARE_P2_SECTOR_START 17
#define FIRMWARE_P2_SECTOR_END 23
#define BOARDLOADER_SECTOR_END 2
#define BOARDCAPS_START 0x0800BF00
#define BOARDCAPS_MAXSIZE 0x100
#define UNUSED_1_START 0x0800C000
#define UNUSED_1_MAXSIZE (1 * 16 * 1024) // 16 kB
#define UNUSED_1_SECTOR_START 3
#define UNUSED_1_SECTOR_END 3
#define STORAGE_1_START 0x08010000
#define STORAGE_1_MAXSIZE (1 * 64 * 1024) // 64 kB
#define STORAGE_1_SECTOR_START 4
#define STORAGE_1_SECTOR_END 4
#define BOOTLOADER_START 0x08020000
#define BOOTLOADER_MAXSIZE (1 * 128 * 1024) // 128 kB
#define BOOTLOADER_SECTOR_START 5
#define BOOTLOADER_SECTOR_END 5
#define FIRMWARE_START 0x08040000
#define FIRMWARE_MAXSIZE (13 * 128 * 1024) // 1664 kB
#define FIRMWARE_P1_START 0x08040000
#define FIRMWARE_P1_MAXSIZE (6 * 128 * 1024)
#define FIRMWARE_P1_SECTOR_START 6
#define FIRMWARE_P1_SECTOR_END 11
// part of firmware P1
#define KERNEL_START 0x08040000
#define KERNEL_MAXSIZE (4 * 128 * 1024)
#define ASSETS_START 0x08100000
#define ASSETS_MAXSIZE (3 * 16 * 1024) // 48 kB
#define ASSETS_SECTOR_START 12
#define ASSETS_SECTOR_END 14
#define UNUSED_2_START 0x0810C000
#define UNUSED_2_MAXSIZE (1 * 16 * 1024) // 16 kB
#define UNUSED_2_SECTOR_START 15
#define UNUSED_2_SECTOR_END 15
#define STORAGE_2_START 0x08110000
#define STORAGE_2_MAXSIZE (1 * 64 * 1024) // 64 kB
#define STORAGE_2_SECTOR_START 16
#define STORAGE_2_SECTOR_END 16
#define FIRMWARE_P2_START 0x08120000
#define FIRMWARE_P2_MAXSIZE (7 * 128 * 1024)
#define FIRMWARE_P2_SECTOR_START 17
#define FIRMWARE_P2_SECTOR_END 23
// RAM layout
#define KERNEL_STACK_SIZE 8 * 1024
#define KERNEL_CCMRAM_SIZE 16 * 1024
#define KERNEL_FRAMEBUFFER_SIZE 0 * 1024
#define KERNEL_SRAM_SIZE 1 * 1024
#define BOOTARGS_SIZE 0x100
#define BOARD_CAPABILITIES_ADDR 0x0800BF00
#define CODE_ALIGNMENT 0x200
#endif

29
core/embed/models/T2T1/model_T2T1_layout.c
View File

@ -36,8 +36,8 @@ const flash_area_t TRANSLATIONS_AREA = {
.num_subareas = 1,
.subarea[0] =
{
.first_sector = 12,
.num_sectors = 3,
.first_sector = ASSETS_SECTOR_START,
.num_sectors = ASSETS_SECTOR_END - ASSETS_SECTOR_START + 1,
},
};
@ -54,8 +54,9 @@ const flash_area_t FIRMWARE_AREA = {
.num_subareas = 2,
.subarea[0] =
{
.first_sector = FIRMWARE_SECTOR_START,
.num_sectors = FIRMWARE_SECTOR_END - FIRMWARE_SECTOR_START + 1,
.first_sector = FIRMWARE_P1_SECTOR_START,
.num_sectors =
FIRMWARE_P1_SECTOR_END - FIRMWARE_P1_SECTOR_START + 1,
},
.subarea[1] =
{
@ -65,25 +66,37 @@ const flash_area_t FIRMWARE_AREA = {
},
};
#ifdef SECRET_SECTOR_START
const flash_area_t SECRET_AREA = {
.num_subareas = 1,
.subarea[0] =
{
.first_sector = SECRET_SECTOR_START,
.num_sectors = SECRET_SECTOR_END - SECRET_SECTOR_START + 1,
},
};
#else
const flash_area_t SECRET_AREA = {
.num_subareas = 1,
.subarea[0] =
{
.first_sector = 0,
.num_sectors = 0,
},
};
#endif
const flash_area_t UNUSED_AREA = {
.num_subareas = 2,
.subarea[0] =
{
.first_sector = 3,
.num_sectors = 1,
.first_sector = UNUSED_1_SECTOR_START,
.num_sectors = UNUSED_1_SECTOR_END - UNUSED_1_SECTOR_START + 1,
},
.subarea[1] =
{
.first_sector = 15,
.num_sectors = 1,
.first_sector = UNUSED_2_SECTOR_START,
.num_sectors = UNUSED_2_SECTOR_END - UNUSED_2_SECTOR_START + 1,
},
};

43
core/embed/models/T3B1/memory.ld
View File

@ -1,32 +1,47 @@
/* Auto-generated file, do not edit.*/
FLASH_START = 0xc000000;
BOARDLOADER_START = 0xc004000;
BOOTLOADER_START = 0xc010000;
KERNEL_START = 0xc050000;
FIRMWARE_START = 0xc050000;
STORAGE_1_OFFSET = 0x30000;
STORAGE_2_OFFSET = 0x40000;
FLASH_START = 0xc004000;
NORCOW_SECTOR_SIZE = 0x10000;
BOARDLOADER_IMAGE_MAXSIZE = 0xc000;
BOOTLOADER_IMAGE_MAXSIZE = 0x20000;
FIRMWARE_IMAGE_MAXSIZE = 0x1a0000;
KERNEL_IMAGE_MAXSIZE = 0x80000;
SECRET_START = 0xc000000;
SECRET_MAXSIZE = 0x4000;
SECRET_SECTOR_START = 0x0;
SECRET_SECTOR_END = 0x1;
BHK_START = 0xc002000;
BHK_MAXSIZE = 0x4000;
BHK_SECTOR_START = 0x1;
BHK_SECTOR_END = 0x1;
BOARDLOADER_START = 0xc004000;
BOARDLOADER_MAXSIZE = 0xc000;
BOARDLOADER_SECTOR_START = 0x2;
BOARDLOADER_SECTOR_END = 0x7;
BOARDCAPS_START = 0xc00ff00;
BOARDCAPS_MAXSIZE = 0x100;
BOOTLOADER_START = 0xc010000;
BOOTLOADER_MAXSIZE = 0x20000;
BOOTLOADER_SECTOR_START = 0x8;
BOOTLOADER_SECTOR_END = 0x17;
FIRMWARE_SECTOR_START = 0x28;
FIRMWARE_SECTOR_END = 0xf7;
STORAGE_1_START = 0xc030000;
STORAGE_1_MAXSIZE = 0x10000;
STORAGE_1_SECTOR_START = 0x18;
STORAGE_1_SECTOR_END = 0x1f;
STORAGE_2_START = 0xc040000;
STORAGE_2_MAXSIZE = 0x10000;
STORAGE_2_SECTOR_START = 0x20;
STORAGE_2_SECTOR_END = 0x27;
FIRMWARE_START = 0xc050000;
FIRMWARE_MAXSIZE = 0x1a0000;
FIRMWARE_SECTOR_START = 0x28;
FIRMWARE_SECTOR_END = 0xf7;
KERNEL_START = 0xc050000;
KERNEL_MAXSIZE = 0x80000;
KERNEL_U_FLASH_SIZE = 0x200;
ASSETS_START = 0xc1f0000;
ASSETS_MAXSIZE = 0x10000;
ASSETS_SECTOR_START = 0xf8;
ASSETS_SECTOR_END = 0xff;
KERNEL_U_RAM_SIZE = 0x200;
KERNEL_SRAM1_SIZE = 0x4000;
KERNEL_SRAM2_SIZE = 0x2000;
KERNEL_SRAM3_SIZE = 0x38400;
BOOTARGS_SIZE = 0x100;
BOARD_CAPABILITIES_ADDR = 0xc00ff00;
CODE_ALIGNMENT = 0x200;

56
core/embed/models/T3B1/model_T3B1.h
View File

@ -28,37 +28,65 @@
#define DISPLAY_JUMP_BEHAVIOR DISPLAY_RETAIN_CONTENT
// SHARED WITH MAKEFILE, LINKER SCRIPT etc.
#define FLASH_START 0x0C000000
// misc
#define FLASH_START 0x0C004000
#define NORCOW_SECTOR_SIZE (8 * 8 * 1024) // 64 kB
// FLASH layout
#define SECRET_START 0x0C000000
#define SECRET_MAXSIZE (2 * 8 * 1024) // 8 kB
#define SECRET_SECTOR_START 0x0
#define SECRET_SECTOR_END 0x1
// overlaps with secret
#define BHK_START 0x0C002000
#define BHK_MAXSIZE (2 * 8 * 1024) // 8 kB
#define BHK_SECTOR_START 0x1
#define BHK_SECTOR_END 0x1
#define BOARDLOADER_START 0x0C004000
#define BOOTLOADER_START 0x0C010000
#define KERNEL_START 0x0C050000
#define FIRMWARE_START 0x0C050000
#define STORAGE_1_OFFSET 0x30000
#define STORAGE_2_OFFSET 0x40000
#define NORCOW_SECTOR_SIZE (8 * 8 * 1024) // 64 kB
#define BOARDLOADER_IMAGE_MAXSIZE (6 * 8 * 1024) // 48 kB
#define BOOTLOADER_IMAGE_MAXSIZE (16 * 8 * 1024) // 128 kB
#define FIRMWARE_IMAGE_MAXSIZE (208 * 8 * 1024) // 1664 kB
#define KERNEL_IMAGE_MAXSIZE (512 * 1024) // 512 kB
#define BOARDLOADER_MAXSIZE (6 * 8 * 1024) // 48 kB
#define BOARDLOADER_SECTOR_START 0x2
#define BOARDLOADER_SECTOR_END 0x7
#define BOARDCAPS_START 0x0C00FF00
#define BOARDCAPS_MAXSIZE 0x100
#define BOOTLOADER_START 0x0C010000
#define BOOTLOADER_MAXSIZE (16 * 8 * 1024) // 128 kB
#define BOOTLOADER_SECTOR_START 0x8
#define BOOTLOADER_SECTOR_END 0x17
#define FIRMWARE_SECTOR_START 0x28
#define FIRMWARE_SECTOR_END 0xF7
#define STORAGE_1_START 0x0C030000
#define STORAGE_1_MAXSIZE (8 * 8 * 1024) // 64 kB
#define STORAGE_1_SECTOR_START 0x18
#define STORAGE_1_SECTOR_END 0x1F
#define STORAGE_2_START 0x0C040000
#define STORAGE_2_MAXSIZE (8 * 8 * 1024) // 64 kB
#define STORAGE_2_SECTOR_START 0x20
#define STORAGE_2_SECTOR_END 0x27
#define FIRMWARE_START 0x0C050000
#define FIRMWARE_MAXSIZE (208 * 8 * 1024) // 1664 kB
#define FIRMWARE_SECTOR_START 0x28
#define FIRMWARE_SECTOR_END 0xF7
#define KERNEL_START 0x0C050000
#define KERNEL_MAXSIZE (512 * 1024) // 512 kB
#define KERNEL_U_FLASH_SIZE 512
#define ASSETS_START 0x0C1F0000
#define ASSETS_MAXSIZE (8 * 8 * 1024) // 64 kB
#define ASSETS_SECTOR_START 0xF8
#define ASSETS_SECTOR_END 0xFF
// RAM layout
#define KERNEL_U_RAM_SIZE 512
#define KERNEL_SRAM1_SIZE 16 * 1024
#define KERNEL_SRAM2_SIZE 8 * 1024
#define KERNEL_SRAM3_SIZE 0x38400
#define BOOTARGS_SIZE 0x100
#define BOARD_CAPABILITIES_ADDR 0x0C00FF00
#define CODE_ALIGNMENT 0x200
#endif

12
core/embed/models/T3B1/model_T3B1_layout.c
View File

@ -54,8 +54,8 @@ const flash_area_t SECRET_AREA = {
.num_subareas = 1,
.subarea[0] =
{
.first_sector = 0,
.num_sectors = 2,
.first_sector = SECRET_SECTOR_START,
.num_sectors = SECRET_SECTOR_END - SECRET_SECTOR_START + 1,
},
};
@ -63,8 +63,8 @@ const flash_area_t BHK_AREA = {
.num_subareas = 1,
.subarea[0] =
{
.first_sector = 1,
.num_sectors = 1,
.first_sector = BHK_SECTOR_START,
.num_sectors = BHK_SECTOR_END - BHK_SECTOR_START + 1,
},
};
@ -72,8 +72,8 @@ const flash_area_t TRANSLATIONS_AREA = {
.num_subareas = 1,
.subarea[0] =
{
.first_sector = 248,
.num_sectors = 8,
.first_sector = ASSETS_SECTOR_START,
.num_sectors = ASSETS_SECTOR_END - ASSETS_SECTOR_START + 1,
},
};

43
core/embed/models/T3T1/memory.ld
View File

@ -1,32 +1,47 @@
/* Auto-generated file, do not edit.*/
FLASH_START = 0xc000000;
BOARDLOADER_START = 0xc004000;
BOOTLOADER_START = 0xc010000;
KERNEL_START = 0xc050000;
FIRMWARE_START = 0xc050000;
STORAGE_1_OFFSET = 0x30000;
STORAGE_2_OFFSET = 0x40000;
FLASH_START = 0xc004000;
NORCOW_SECTOR_SIZE = 0x10000;
BOARDLOADER_IMAGE_MAXSIZE = 0xc000;
BOOTLOADER_IMAGE_MAXSIZE = 0x20000;
FIRMWARE_IMAGE_MAXSIZE = 0x1a0000;
KERNEL_IMAGE_MAXSIZE = 0x80000;
SECRET_START = 0xc000000;
SECRET_MAXSIZE = 0x4000;
SECRET_SECTOR_START = 0x0;
SECRET_SECTOR_END = 0x1;
BHK_START = 0xc002000;
BHK_MAXSIZE = 0x4000;
BHK_SECTOR_START = 0x1;
BHK_SECTOR_END = 0x1;
BOARDLOADER_START = 0xc004000;
BOARDLOADER_MAXSIZE = 0xc000;
BOARDLOADER_SECTOR_START = 0x2;
BOARDLOADER_SECTOR_END = 0x7;
BOARDCAPS_START = 0xc00ff00;
BOARDCAPS_MAXSIZE = 0x100;
BOOTLOADER_START = 0xc010000;
BOOTLOADER_MAXSIZE = 0x20000;
BOOTLOADER_SECTOR_START = 0x8;
BOOTLOADER_SECTOR_END = 0x17;
FIRMWARE_SECTOR_START = 0x28;
FIRMWARE_SECTOR_END = 0xf7;
STORAGE_1_START = 0xc030000;
STORAGE_1_MAXSIZE = 0x10000;
STORAGE_1_SECTOR_START = 0x18;
STORAGE_1_SECTOR_END = 0x1f;
STORAGE_2_START = 0xc040000;
STORAGE_2_MAXSIZE = 0x10000;
STORAGE_2_SECTOR_START = 0x20;
STORAGE_2_SECTOR_END = 0x27;
FIRMWARE_START = 0xc050000;
FIRMWARE_MAXSIZE = 0x1a0000;
FIRMWARE_SECTOR_START = 0x28;
FIRMWARE_SECTOR_END = 0xf7;
KERNEL_START = 0xc050000;
KERNEL_MAXSIZE = 0x80000;
KERNEL_U_FLASH_SIZE = 0x200;
ASSETS_START = 0xc1f0000;
ASSETS_MAXSIZE = 0x10000;
ASSETS_SECTOR_START = 0xf8;
ASSETS_SECTOR_END = 0xff;
KERNEL_U_RAM_SIZE = 0x200;
KERNEL_SRAM1_SIZE = 0x4000;
KERNEL_SRAM2_SIZE = 0x2000;
KERNEL_SRAM3_SIZE = 0x38400;
BOOTARGS_SIZE = 0x100;
BOARD_CAPABILITIES_ADDR = 0xc00ff00;
CODE_ALIGNMENT = 0x200;

56
core/embed/models/T3T1/model_T3T1.h
View File

@ -28,37 +28,65 @@
#define DISPLAY_JUMP_BEHAVIOR DISPLAY_RETAIN_CONTENT
// SHARED WITH MAKEFILE, LINKER SCRIPT etc.
#define FLASH_START 0x0C000000
// misc
#define FLASH_START 0x0C004000
#define NORCOW_SECTOR_SIZE (8 * 8 * 1024) // 64 kB
// FLASH layout
#define SECRET_START 0x0C000000
#define SECRET_MAXSIZE (2 * 8 * 1024) // 8 kB
#define SECRET_SECTOR_START 0x0
#define SECRET_SECTOR_END 0x1
// overlaps with secret
#define BHK_START 0x0C002000
#define BHK_MAXSIZE (2 * 8 * 1024) // 8 kB
#define BHK_SECTOR_START 0x1
#define BHK_SECTOR_END 0x1
#define BOARDLOADER_START 0x0C004000
#define BOOTLOADER_START 0x0C010000
#define KERNEL_START 0x0C050000
#define FIRMWARE_START 0x0C050000
#define STORAGE_1_OFFSET 0x30000
#define STORAGE_2_OFFSET 0x40000
#define NORCOW_SECTOR_SIZE (8 * 8 * 1024) // 64 kB
#define BOARDLOADER_IMAGE_MAXSIZE (6 * 8 * 1024) // 48 kB
#define BOOTLOADER_IMAGE_MAXSIZE (16 * 8 * 1024) // 128 kB
#define FIRMWARE_IMAGE_MAXSIZE (208 * 8 * 1024) // 1664 kB
#define KERNEL_IMAGE_MAXSIZE (512 * 1024) // 512 kB
#define BOARDLOADER_MAXSIZE (6 * 8 * 1024) // 48 kB
#define BOARDLOADER_SECTOR_START 0x2
#define BOARDLOADER_SECTOR_END 0x7
#define BOARDCAPS_START 0x0C00FF00
#define BOARDCAPS_MAXSIZE 0x100
#define BOOTLOADER_START 0x0C010000
#define BOOTLOADER_MAXSIZE (16 * 8 * 1024) // 128 kB
#define BOOTLOADER_SECTOR_START 0x8
#define BOOTLOADER_SECTOR_END 0x17
#define FIRMWARE_SECTOR_START 0x28
#define FIRMWARE_SECTOR_END 0xF7
#define STORAGE_1_START 0x0C030000
#define STORAGE_1_MAXSIZE (8 * 8 * 1024) // 64 kB
#define STORAGE_1_SECTOR_START 0x18
#define STORAGE_1_SECTOR_END 0x1F
#define STORAGE_2_START 0x0C040000
#define STORAGE_2_MAXSIZE (8 * 8 * 1024) // 64 kB
#define STORAGE_2_SECTOR_START 0x20
#define STORAGE_2_SECTOR_END 0x27
#define FIRMWARE_START 0x0C050000
#define FIRMWARE_MAXSIZE (208 * 8 * 1024) // 1664 kB
#define FIRMWARE_SECTOR_START 0x28
#define FIRMWARE_SECTOR_END 0xF7
#define KERNEL_START 0x0C050000
#define KERNEL_MAXSIZE (512 * 1024) // 512 kB
#define KERNEL_U_FLASH_SIZE 512
#define ASSETS_START 0x0C1F0000
#define ASSETS_MAXSIZE (8 * 8 * 1024) // 64 kB
#define ASSETS_SECTOR_START 0xF8
#define ASSETS_SECTOR_END 0xFF
// RAM layout
#define KERNEL_U_RAM_SIZE 512
#define KERNEL_SRAM1_SIZE 16 * 1024
#define KERNEL_SRAM2_SIZE 8 * 1024
#define KERNEL_SRAM3_SIZE 0x38400
#define BOOTARGS_SIZE 0x100
#define BOARD_CAPABILITIES_ADDR 0x0C00FF00
#define CODE_ALIGNMENT 0x200
#endif

12
core/embed/models/T3T1/model_T3T1_layout.c
View File

@ -54,8 +54,8 @@ const flash_area_t SECRET_AREA = {
.num_subareas = 1,
.subarea[0] =
{
.first_sector = 0,
.num_sectors = 2,
.first_sector = SECRET_SECTOR_START,
.num_sectors = SECRET_SECTOR_END - SECRET_SECTOR_START + 1,
},
};
@ -63,8 +63,8 @@ const flash_area_t BHK_AREA = {
.num_subareas = 1,
.subarea[0] =
{
.first_sector = 1,
.num_sectors = 1,
.first_sector = BHK_SECTOR_START,
.num_sectors = BHK_SECTOR_END - BHK_SECTOR_START + 1,
},
};
@ -72,8 +72,8 @@ const flash_area_t TRANSLATIONS_AREA = {
.num_subareas = 1,
.subarea[0] =
{
.first_sector = 248,
.num_sectors = 8,
.first_sector = ASSETS_SECTOR_START,
.num_sectors = ASSETS_SECTOR_END - ASSETS_SECTOR_START + 1,
},
};

2
core/embed/prodtest/main.c
View File

@ -601,7 +601,7 @@ static uint32_t read_bootloader_version(void) {
mpu_mode_t mpu_mode = mpu_reconfig(MPU_MODE_BOOTUPDATE);
const image_header *header = read_image_header(
(const uint8_t *)BOOTLOADER_START, BOOTLOADER_IMAGE_MAGIC, 0xffffffff);
(const uint8_t *)BOOTLOADER_START, BOOTLOADER_MAXSIZE, 0xffffffff);
if (header != NULL) {
version = header->version;

1
core/embed/trezorhal/board_capabilities.h
View File

@ -37,7 +37,6 @@ Last tag must be terminator or all space used.
#ifdef KERNEL_MODE
#define BOARD_CAPABILITIES_SIZE 256
#define CAPABILITIES_HEADER "TRZC"
enum CapabilityTag {

5
core/embed/trezorhal/stm32f4/board_capabilities.c
View File

@ -39,9 +39,8 @@ const boardloader_version_t *get_boardloader_version() {
void parse_boardloader_capabilities() {
mpu_mode_t mpu_mode = mpu_reconfig(MPU_MODE_BOARDCAPS);
const uint8_t *pos = (const uint8_t *)BOARD_CAPABILITIES_ADDR;
const uint8_t *end =
(const uint8_t *)(BOARD_CAPABILITIES_ADDR + BOARD_CAPABILITIES_SIZE);
const uint8_t *pos = (const uint8_t *)BOARDCAPS_START;
const uint8_t *end = (const uint8_t *)(BOARDCAPS_START + BOARDCAPS_MAXSIZE);
if (memcmp(pos, CAPABILITIES_HEADER, 4) != 0) {
mpu_restore(mpu_mode);

9
core/embed/trezorhal/stm32f4/linker/boardloader.ld
View File

@ -3,7 +3,8 @@ INCLUDE "./embed/trezorhal/stm32f4/linker/memory.ld";
ENTRY(reset_handler)
MEMORY {
FLASH (rx) : ORIGIN = BOARDLOADER_START, LENGTH = BOARDLOADER_IMAGE_MAXSIZE
FLASH (rx) : ORIGIN = BOARDLOADER_START, LENGTH = BOARDLOADER_MAXSIZE - BOARDCAPS_MAXSIZE
BOARDCAPS (rx) : ORIGIN = BOARDCAPS_START, LENGTH = BOARDCAPS_MAXSIZE
CCMRAM (wal) : ORIGIN = MCU_CCMRAM, LENGTH = MCU_CCMRAM_SIZE
SRAM (wal) : ORIGIN = MCU_SRAM, LENGTH = MCU_SRAM_SIZE
}
@ -67,8 +68,10 @@ SECTIONS {
. = ALIGN(4);
} >SRAM
/* Hard-coded address for capabilities structure */
.capabilities BOARD_CAPABILITIES_ADDR : {KEEP(*(.capabilities_section))}
.capabilities : ALIGN(4) {
KEEP(*(.capabilities_section*));
. = ALIGN(4);
} >BOARDCAPS
.stack : ALIGN(8) {
. = 4K; /* this acts as a build time assertion that at least this much memory is available for stack use */

2
core/embed/trezorhal/stm32f4/linker/bootloader.ld
View File

@ -3,7 +3,7 @@ INCLUDE "./embed/trezorhal/stm32f4/linker/memory.ld";
ENTRY(reset_handler)
MEMORY {
FLASH (rx) : ORIGIN = BOOTLOADER_START, LENGTH = BOOTLOADER_IMAGE_MAXSIZE
FLASH (rx) : ORIGIN = BOOTLOADER_START, LENGTH = BOOTLOADER_MAXSIZE
CCMRAM (wal) : ORIGIN = MCU_CCMRAM, LENGTH = MCU_CCMRAM_SIZE - BOOTARGS_SIZE
BOOT_ARGS (wal) : ORIGIN = MCU_CCMRAM + MCU_CCMRAM_SIZE - BOOTARGS_SIZE, LENGTH = BOOTARGS_SIZE
SRAM (wal) : ORIGIN = MCU_SRAM, LENGTH = MCU_SRAM_SIZE

4
core/embed/trezorhal/stm32f4/linker/firmware.ld
View File

@ -3,8 +3,8 @@ INCLUDE "./embed/trezorhal/stm32f4/linker/memory.ld";
ENTRY(reset_handler)
MEMORY {
FLASH (rx) : ORIGIN = FIRMWARE_START, LENGTH = FIRMWARE_P1_IMAGE_MAXSIZE
FLASH2 (r) : ORIGIN = FIRMWARE_P2_START, LENGTH = FIRMWARE_P2_IMAGE_MAXSIZE
FLASH (rx) : ORIGIN = FIRMWARE_P1_START, LENGTH = FIRMWARE_P1_MAXSIZE
FLASH2 (r) : ORIGIN = FIRMWARE_P2_START, LENGTH = FIRMWARE_P2_MAXSIZE
CCMRAM (wal) : ORIGIN = MCU_CCMRAM + KERNEL_STACK_SIZE, LENGTH = MCU_CCMRAM_SIZE - KERNEL_CCMRAM_SIZE - KERNEL_FRAMEBUFFER_SIZE - KERNEL_STACK_SIZE
SRAM (wal) : ORIGIN = MCU_SRAM, LENGTH = MCU_SRAM_SIZE - KERNEL_SRAM_SIZE
}

2
core/embed/trezorhal/stm32f4/linker/kernel.ld
View File

@ -3,7 +3,7 @@ INCLUDE "./embed/trezorhal/stm32f4/linker/memory.ld";
ENTRY(reset_handler)
MEMORY {
FLASH (rx) : ORIGIN = KERNEL_START, LENGTH = KERNEL_IMAGE_MAXSIZE
FLASH (rx) : ORIGIN = KERNEL_START, LENGTH = KERNEL_MAXSIZE
CCMRAM_STACK (wal) : ORIGIN = MCU_CCMRAM, LENGTH = KERNEL_STACK_SIZE
CCMRAM_FB (wal) : ORIGIN = MCU_CCMRAM + MCU_CCMRAM_SIZE - KERNEL_CCMRAM_SIZE - KERNEL_FRAMEBUFFER_SIZE, LENGTH = KERNEL_FRAMEBUFFER_SIZE
CCMRAM (wal) : ORIGIN = MCU_CCMRAM + MCU_CCMRAM_SIZE - KERNEL_CCMRAM_SIZE, LENGTH = KERNEL_CCMRAM_SIZE - BOOTARGS_SIZE

2
core/embed/trezorhal/stm32f4/linker/prodtest.ld
View File

@ -3,7 +3,7 @@ INCLUDE "./embed/trezorhal/stm32f4/linker/memory.ld";
ENTRY(reset_handler)
MEMORY {
FLASH (rx) : ORIGIN = FIRMWARE_START, LENGTH = FIRMWARE_P1_IMAGE_MAXSIZE
FLASH (rx) : ORIGIN = FIRMWARE_P1_START, LENGTH = FIRMWARE_P1_MAXSIZE
CCMRAM (wal) : ORIGIN = MCU_CCMRAM, LENGTH = MCU_CCMRAM_SIZE - BOOTARGS_SIZE
BOOT_ARGS (wal) : ORIGIN = MCU_CCMRAM + MCU_CCMRAM_SIZE - BOOTARGS_SIZE, LENGTH = BOOTARGS_SIZE
SRAM (wal) : ORIGIN = MCU_SRAM, LENGTH = MCU_SRAM_SIZE

10
core/embed/trezorhal/stm32u5/linker/u58/boardloader.ld
View File

@ -3,7 +3,8 @@ INCLUDE "./embed/trezorhal/stm32u5/linker/u58/memory.ld";
ENTRY(reset_handler)
MEMORY {
FLASH (rx) : ORIGIN = BOARDLOADER_START, LENGTH = BOARDLOADER_IMAGE_MAXSIZE
FLASH (rx) : ORIGIN = BOARDLOADER_START, LENGTH = BOARDLOADER_MAXSIZE
BOARDCAPS (rx) : ORIGIN = BOARDCAPS_START, LENGTH = BOARDCAPS_MAXSIZE
SRAM1 (wal) : ORIGIN = MCU_SRAM1, LENGTH = MCU_SRAM1_SIZE - BOOTARGS_SIZE
BOOT_ARGS (wal) : ORIGIN = MCU_SRAM2 - BOOTARGS_SIZE, LENGTH = BOOTARGS_SIZE
SRAM2 (wal) : ORIGIN = MCU_SRAM2, LENGTH = MCU_SRAM2_SIZE
@ -118,7 +119,8 @@ SECTIONS {
. = ALIGN(8);
} >BOOT_ARGS
/* Hard-coded address for capabilities structure */
.capabilities BOARD_CAPABILITIES_ADDR : {KEEP(*(.capabilities_section))}
.capabilities : ALIGN(4) {
KEEP(*(.capabilities_section*));
. = ALIGN(4);
} >BOARDCAPS
}

2
core/embed/trezorhal/stm32u5/linker/u58/bootloader.ld
View File

@ -3,7 +3,7 @@ INCLUDE "./embed/trezorhal/stm32u5/linker/u58/memory.ld";
ENTRY(reset_handler)
MEMORY {
FLASH (rx) : ORIGIN = BOOTLOADER_START, LENGTH = BOOTLOADER_IMAGE_MAXSIZE
FLASH (rx) : ORIGIN = BOOTLOADER_START, LENGTH = BOOTLOADER_MAXSIZE
SRAM1 (wal) : ORIGIN = MCU_SRAM1, LENGTH = MCU_SRAM1_SIZE - BOOTARGS_SIZE
BOOT_ARGS (wal) : ORIGIN = MCU_SRAM2 - BOOTARGS_SIZE, LENGTH = BOOTARGS_SIZE
SRAM2 (wal) : ORIGIN = MCU_SRAM2, LENGTH = MCU_SRAM2_SIZE

2
core/embed/trezorhal/stm32u5/linker/u58/firmware.ld
View File

@ -3,7 +3,7 @@ INCLUDE "./embed/trezorhal/stm32u5/linker/u58/memory.ld";
ENTRY(reset_handler)
MEMORY {
FLASH (rx) : ORIGIN = KERNEL_START, LENGTH = FIRMWARE_IMAGE_MAXSIZE
FLASH (rx) : ORIGIN = KERNEL_START, LENGTH = FIRMWARE_MAXSIZE
SRAM1 (wal) : ORIGIN = MCU_SRAM1, LENGTH = MCU_SRAM1_SIZE - KERNEL_SRAM1_SIZE
SRAM2 (wal) : ORIGIN = MCU_SRAM2 + KERNEL_SRAM2_SIZE, LENGTH = MCU_SRAM2_SIZE - KERNEL_SRAM2_SIZE
SRAM3 (wal) : ORIGIN = MCU_SRAM3 + KERNEL_SRAM3_SIZE, LENGTH = MCU_SRAM3_SIZE - KERNEL_SRAM3_SIZE

2
core/embed/trezorhal/stm32u5/linker/u58/kernel.ld
View File

@ -3,7 +3,7 @@ INCLUDE "./embed/trezorhal/stm32u5/linker/u58/memory.ld";
ENTRY(reset_handler)
MEMORY {
FLASH (rx) : ORIGIN = KERNEL_START, LENGTH = KERNEL_IMAGE_MAXSIZE
FLASH (rx) : ORIGIN = KERNEL_START, LENGTH = KERNEL_MAXSIZE
SRAM1 (wal) : ORIGIN = MCU_SRAM2 - KERNEL_SRAM1_SIZE, LENGTH = KERNEL_SRAM1_SIZE - BOOTARGS_SIZE
BOOT_ARGS (wal) : ORIGIN = MCU_SRAM2 - BOOTARGS_SIZE, LENGTH = BOOTARGS_SIZE
SRAM2 (wal) : ORIGIN = MCU_SRAM2, LENGTH = KERNEL_SRAM2_SIZE - KERNEL_U_RAM_SIZE

2
core/embed/trezorhal/stm32u5/linker/u58/prodtest.ld
View File

@ -3,7 +3,7 @@ INCLUDE "./embed/trezorhal/stm32u5/linker/u58/memory.ld";
ENTRY(reset_handler)
MEMORY {
FLASH (rx) : ORIGIN = FIRMWARE_START, LENGTH = FIRMWARE_IMAGE_MAXSIZE
FLASH (rx) : ORIGIN = FIRMWARE_START, LENGTH = FIRMWARE_MAXSIZE
SRAM1 (wal) : ORIGIN = MCU_SRAM1, LENGTH = MCU_SRAM1_SIZE - BOOTARGS_SIZE
BOOT_ARGS (wal) : ORIGIN = MCU_SRAM2 - BOOTARGS_SIZE, LENGTH = BOOTARGS_SIZE
SRAM2 (wal) : ORIGIN = MCU_SRAM2, LENGTH = MCU_SRAM2_SIZE

10
core/embed/trezorhal/stm32u5/linker/u5a/boardloader.ld
View File

@ -3,7 +3,8 @@ INCLUDE "./embed/trezorhal/stm32u5/linker/u5a/memory.ld";
ENTRY(reset_handler)
MEMORY {
FLASH (rx) : ORIGIN = BOARDLOADER_START, LENGTH = BOARDLOADER_IMAGE_MAXSIZE
FLASH (rx) : ORIGIN = BOARDLOADER_START, LENGTH = BOARDLOADER_MAXSIZE
BOARDCAPS (rx) : ORIGIN = BOARDCAPS_START, LENGTH = BOARDCAPS_MAXSIZE
SRAM1 (wal) : ORIGIN = MCU_SRAM1, LENGTH = MCU_SRAM1_SIZE - BOOTARGS_SIZE
BOOT_ARGS (wal) : ORIGIN = MCU_SRAM2 - BOOTARGS_SIZE, LENGTH = BOOTARGS_SIZE
SRAM2 (wal) : ORIGIN = MCU_SRAM2, LENGTH = MCU_SRAM2_SIZE
@ -121,7 +122,8 @@ SECTIONS {
. = ALIGN(8);
} >BOOT_ARGS
/* Hard-coded address for capabilities structure */
.capabilities BOARD_CAPABILITIES_ADDR : {KEEP(*(.capabilities_section))}
.capabilities : ALIGN(4) {
KEEP(*(.capabilities_section*));
. = ALIGN(4);
} >BOARDCAPS
}

2
core/embed/trezorhal/stm32u5/linker/u5a/bootloader.ld
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@ -3,7 +3,7 @@ INCLUDE "./embed/trezorhal/stm32u5/linker/u5a/memory.ld";
ENTRY(reset_handler)
MEMORY {
FLASH (rx) : ORIGIN = BOOTLOADER_START, LENGTH = BOOTLOADER_IMAGE_MAXSIZE
FLASH (rx) : ORIGIN = BOOTLOADER_START, LENGTH = BOOTLOADER_MAXSIZE
SRAM1 (wal) : ORIGIN = MCU_SRAM1, LENGTH = MCU_SRAM1_SIZE - BOOTARGS_SIZE
BOOT_ARGS (wal) : ORIGIN = MCU_SRAM2 - BOOTARGS_SIZE, LENGTH = BOOTARGS_SIZE
SRAM2 (wal) : ORIGIN = MCU_SRAM2, LENGTH = MCU_SRAM2_SIZE

2
core/embed/trezorhal/stm32u5/linker/u5a/firmware.ld
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@ -3,7 +3,7 @@ INCLUDE "./embed/trezorhal/stm32u5/linker/u5a/memory.ld";
ENTRY(reset_handler)
MEMORY {
FLASH (rx) : ORIGIN = KERNEL_START, LENGTH = FIRMWARE_IMAGE_MAXSIZE
FLASH (rx) : ORIGIN = KERNEL_START, LENGTH = FIRMWARE_MAXSIZE
SRAM1 (wal) : ORIGIN = MCU_SRAM1, LENGTH = 0K /* not allocated to coreapp */
SRAM2 (wal) : ORIGIN = MCU_SRAM2, LENGTH = 0K /* not allocated to coreapp */
SRAM3 (wal) : ORIGIN = MCU_SRAM3, LENGTH = 0K /* not allocated to coreapp */

2
core/embed/trezorhal/stm32u5/linker/u5a/kernel.ld
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@ -3,7 +3,7 @@ INCLUDE "./embed/trezorhal/stm32u5/linker/u5a/memory.ld";
ENTRY(reset_handler)
MEMORY {
FLASH (rx) : ORIGIN = KERNEL_START, LENGTH = KERNEL_IMAGE_MAXSIZE
FLASH (rx) : ORIGIN = KERNEL_START, LENGTH = KERNEL_MAXSIZE
SRAM1 (wal) : ORIGIN = MCU_SRAM1, LENGTH = MCU_SRAM1_SIZE - BOOTARGS_SIZE
BOOT_ARGS (wal) : ORIGIN = MCU_SRAM2 - BOOTARGS_SIZE, LENGTH = BOOTARGS_SIZE
SRAM2 (wal) : ORIGIN = MCU_SRAM2, LENGTH = MCU_SRAM2_SIZE

2
core/embed/trezorhal/stm32u5/linker/u5a/prodtest.ld
View File

@ -3,7 +3,7 @@ INCLUDE "./embed/trezorhal/stm32u5/linker/u5a/memory.ld";
ENTRY(reset_handler)
MEMORY {
FLASH (rx) : ORIGIN = KERNEL_START, LENGTH = KERNEL_IMAGE_MAXSIZE
FLASH (rx) : ORIGIN = KERNEL_START, LENGTH = KERNEL_MAXSIZE
SRAM1 (wal) : ORIGIN = MCU_SRAM1, LENGTH = MCU_SRAM1_SIZE - BOOTARGS_SIZE
BOOT_ARGS (wal) : ORIGIN = MCU_SRAM2 - BOOTARGS_SIZE, LENGTH = BOOTARGS_SIZE
SRAM2 (wal) : ORIGIN = MCU_SRAM2, LENGTH = MCU_SRAM2_SIZE

48
core/embed/trezorhal/stm32u5/mpu.c
View File

@ -113,13 +113,6 @@ static void mpu_set_attributes(void) {
MPU->MAIR0 |= 0x44 << 24;
}
#define SECRET_START FLASH_BASE
#define SECRET_SIZE SIZE_16K
#define BOARDLOADER_SIZE BOARDLOADER_IMAGE_MAXSIZE
#define BOOTLOADER_SIZE BOOTLOADER_IMAGE_MAXSIZE
#define FIRMWARE_SIZE FIRMWARE_IMAGE_MAXSIZE
#define STORAGE_START \
(FLASH_BASE + SECRET_SIZE + BOARDLOADER_SIZE + BOOTLOADER_SIZE)
#define STORAGE_SIZE NORCOW_SECTOR_SIZE* STORAGE_AREAS_COUNT
#if defined STM32U5A9xx
@ -132,11 +125,6 @@ static void mpu_set_attributes(void) {
#error "Unknown MCU"
#endif
#define ASSETS_START (FIRMWARE_START + FIRMWARE_SIZE)
#define ASSETS_SIZE \
(FLASH_SIZE - (FIRMWARE_SIZE + BOOTLOADER_SIZE + BOARDLOADER_SIZE + \
SECRET_SIZE + STORAGE_SIZE))
#ifdef STM32U585xx
#define GRAPHICS_START FMC_BANK1
#define GRAPHICS_SIZE SIZE_16M
@ -180,7 +168,7 @@ extern uint32_t _codelen;
#define KERNEL_FLASH_SIZE (KERNEL_SIZE - KERNEL_U_FLASH_SIZE)
#define COREAPP_FLASH_START (KERNEL_FLASH_START + KERNEL_SIZE)
#define COREAPP_FLASH_SIZE (FIRMWARE_IMAGE_MAXSIZE - KERNEL_SIZE)
#define COREAPP_FLASH_SIZE (FIRMWARE_MAXSIZE - KERNEL_SIZE)
#ifdef STM32U585xx
#define COREAPP_RAM1_START SRAM1_BASE
@ -211,18 +199,18 @@ static void mpu_init_fixed_regions(void) {
// clang-format off
#if defined(BOARDLOADER)
// REGION ADDRESS SIZE TYPE WRITE UNPRIV
SET_REGION( 0, BOARDLOADER_START, BOARDLOADER_SIZE, FLASH_CODE, NO, NO );
SET_REGION( 1, SRAM1_BASE, SRAM_SIZE, SRAM, YES, NO );
SET_REGION( 2, BOOTLOADER_START, BOOTLOADER_SIZE, FLASH_DATA, YES, NO );
SET_REGION( 3, FIRMWARE_START, FIRMWARE_SIZE, FLASH_DATA, YES, NO );
// REGION ADDRESS SIZE TYPE WRITE UNPRIV
SET_REGION( 0, BOARDLOADER_START, BOARDLOADER_MAXSIZE, FLASH_CODE, NO, NO );
SET_REGION( 1, SRAM1_BASE, SRAM_SIZE, SRAM, YES, NO );
SET_REGION( 2, BOOTLOADER_START, BOOTLOADER_MAXSIZE, FLASH_DATA, YES, NO );
SET_REGION( 3, FIRMWARE_START, FIRMWARE_MAXSIZE, FLASH_DATA, YES, NO );
DIS_REGION( 4 );
#endif
#if defined(BOOTLOADER)
// REGION ADDRESS SIZE TYPE WRITE UNPRIV
SET_REGION( 0, BOOTLOADER_START, BOOTLOADER_SIZE, FLASH_CODE, NO, NO );
SET_REGION( 0, BOOTLOADER_START, BOOTLOADER_MAXSIZE, FLASH_CODE, NO, NO );
SET_REGION( 1, SRAM1_BASE, SRAM_SIZE, SRAM, YES, NO );
SET_REGION( 2, FIRMWARE_START, FIRMWARE_SIZE, FLASH_DATA, YES, NO );
SET_REGION( 2, FIRMWARE_START, FIRMWARE_MAXSIZE, FLASH_DATA, YES, NO );
DIS_REGION( 3 );
DIS_REGION( 4 );
#endif
@ -240,15 +228,15 @@ static void mpu_init_fixed_regions(void) {
#endif
#if defined(FIRMWARE)
// REGION ADDRESS SIZE TYPE WRITE UNPRIV
SET_REGION( 0, FIRMWARE_START, FIRMWARE_SIZE, FLASH_CODE, NO, NO );
SET_REGION( 0, FIRMWARE_START, FIRMWARE_MAXSIZE, FLASH_CODE, NO, NO );
SET_REGION( 1, SRAM1_BASE, SRAM_SIZE, SRAM, YES, NO );
DIS_REGION( 2 );
DIS_REGION( 3 );
DIS_REGION( 4 );
#endif
#if defined(TREZOR_PRODTEST)
SET_REGION( 0, FIRMWARE_START, 1024, FLASH_DATA, YES, NO );
SET_REGION( 1, FIRMWARE_START + 1024, FIRMWARE_SIZE - 1024, FLASH_CODE, NO, NO );
SET_REGION( 0, FIRMWARE_START, 1024, FLASH_DATA, YES, NO );
SET_REGION( 1, FIRMWARE_START + 1024, FIRMWARE_MAXSIZE - 1024, FLASH_CODE, NO, NO );
SET_REGION( 2, SRAM1_BASE, SRAM_SIZE, SRAM, YES, NO );
DIS_REGION( 3 );
DIS_REGION( 4 );
@ -328,31 +316,31 @@ mpu_mode_t mpu_reconfig(mpu_mode_t mode) {
#if !defined(BOARDLOADER)
case MPU_MODE_BOARDCAPS:
// REGION ADDRESS SIZE TYPE WRITE UNPRIV
SET_REGION( 6, BOARDLOADER_START, BOARDLOADER_SIZE, FLASH_DATA, NO, NO );
SET_REGION( 6, BOARDLOADER_START, BOARDLOADER_MAXSIZE,FLASH_DATA, NO, NO );
break;
#endif
#if !defined(BOOTLOADER) && !defined(BOARDLOADER)
case MPU_MODE_BOOTUPDATE:
SET_REGION( 6, BOOTLOADER_START, BOOTLOADER_SIZE, FLASH_DATA, YES, NO );
SET_REGION( 6, BOOTLOADER_START, BOOTLOADER_MAXSIZE, FLASH_DATA, YES, NO );
break;
#endif
case MPU_MODE_OTP:
SET_REGION( 6, FLASH_OTP_BASE, OTP_AND_ID_SIZE, FLASH_DATA, NO, NO );
break;
case MPU_MODE_SECRET:
SET_REGION( 6, SECRET_START, SECRET_SIZE, FLASH_DATA, YES, NO );
SET_REGION( 6, SECRET_START, SECRET_MAXSIZE, FLASH_DATA, YES, NO );
break;
case MPU_MODE_STORAGE:
SET_REGION( 6, STORAGE_START, STORAGE_SIZE, FLASH_DATA, YES, NO );
SET_REGION( 6, STORAGE_1_START, STORAGE_SIZE, FLASH_DATA, YES, NO );
break;
case MPU_MODE_ASSETS:
SET_REGION( 6, ASSETS_START, ASSETS_SIZE, FLASH_DATA, YES, NO );
SET_REGION( 6, ASSETS_START, ASSETS_MAXSIZE, FLASH_DATA, YES, NO );
break;
case MPU_MODE_SAES:
SET_REGION( 6, KERNEL_FLASH_U_START, KERNEL_FLASH_U_SIZE,FLASH_CODE, NO, YES ); // Unprivileged kernal flash
SET_REGION( 6, KERNEL_FLASH_U_START, KERNEL_FLASH_U_SIZE,FLASH_CODE, NO, YES ); // Unprivileged kernel flash
break;
case MPU_MODE_APP:
SET_REGION( 6, ASSETS_START, ASSETS_SIZE, FLASH_DATA, NO, YES );
SET_REGION( 6, ASSETS_START, ASSETS_MAXSIZE, FLASH_DATA, NO, YES );
break;
default:
DIS_REGION( 6 );