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@ -1,53 +1,107 @@
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#include STM32_HAL_H
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#include "flash.h"
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#include "lowlevel.h"
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#define WANTED_WRP (OB_WRP_SECTOR_0 | OB_WRP_SECTOR_1 | OB_WRP_SECTOR_2)
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#define WANTED_RDP (OB_RDP_LEVEL_2)
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#pragma GCC optimize("no-stack-protector") // applies to all functions in this file
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void flash_set_option_bytes(void)
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{
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FLASH_OBProgramInitTypeDef opts;
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#if PRODUCTION
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#define WANT_RDP_LEVEL (OB_RDP_LEVEL_2)
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#define WANT_WRP_SECTORS (OB_WRP_SECTOR_0 | OB_WRP_SECTOR_1 | OB_WRP_SECTOR_2)
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#else
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#define WANT_RDP_LEVEL (OB_RDP_LEVEL_0)
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#define WANT_WRP_SECTORS (0)
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#endif
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HAL_FLASHEx_OBGetConfig(&opts);
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#define WANT_BOR_LEVEL (OB_BOR_LEVEL3)
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opts.OptionType = 0;
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// reference RM0090 section 3.9.10; SPRMOD is 0 meaning PCROP disabled.; DB1M is 0 because we use 2MB dual-bank; BFB2 is 0 allowing boot from flash;
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#define FLASH_OPTCR_VALUE ( (((~WANT_WRP_SECTORS) << FLASH_OPTCR_nWRP_Pos) & FLASH_OPTCR_nWRP_Msk) | \
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(WANT_RDP_LEVEL << FLASH_OPTCR_RDP_Pos) | FLASH_OPTCR_nRST_STDBY | FLASH_OPTCR_nRST_STOP | FLASH_OPTCR_WDG_SW | WANT_BOR_LEVEL )
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if (opts.WRPSector != WANTED_WRP) {
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opts.OptionType |= OPTIONBYTE_WRP;
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opts.WRPState = OB_WRPSTATE_ENABLE;
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opts.WRPSector = WANTED_WRP;
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opts.Banks = FLASH_BANK_1;
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}
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// reference RM0090 section 3.7.1 table 16
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#define OPTION_BYTES_RDP_USER_VALUE ((uint16_t) ((WANT_RDP_LEVEL << FLASH_OPTCR_RDP_Pos) | FLASH_OPTCR_nRST_STDBY | FLASH_OPTCR_nRST_STOP | FLASH_OPTCR_WDG_SW | WANT_BOR_LEVEL))
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#define OPTION_BYTES_BANK1_WRP_VALUE ((uint16_t) ((~WANT_WRP_SECTORS) & 0xFFFU))
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#define OPTION_BYTES_BANK2_WRP_VALUE ((uint16_t) 0xFFFU)
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if (opts.RDPLevel != WANTED_RDP) {
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opts.OptionType |= OPTIONBYTE_RDP;
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opts.RDPLevel = WANTED_RDP;
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}
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// reference RM0090 section 3.7.1 table 16. use 16 bit pointers because the top 48 bits are all reserved.
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#define OPTION_BYTES_RDP_USER (*(volatile uint16_t * const) 0x1FFFC000U)
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#define OPTION_BYTES_BANK1_WRP (*(volatile uint16_t * const) 0x1FFFC008U)
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#define OPTION_BYTES_BANK2_WRP (*(volatile uint16_t * const) 0x1FFEC008U)
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uint32_t flash_wait_and_clear_status_flags(void)
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{
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while(FLASH->SR & FLASH_SR_BSY); // wait for all previous flash operations to complete
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const uint32_t result = FLASH->SR & FLASH_STATUS_ALL_FLAGS; // get the current status flags
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FLASH->SR |= FLASH_STATUS_ALL_FLAGS; // clear all status flags
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return result;
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}
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if (opts.OptionType == 0) {
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return; // protections are configured
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secbool flash_check_option_bytes(void)
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{
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flash_wait_and_clear_status_flags();
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// check values stored in flash interface registers
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if ((FLASH->OPTCR & ~3) != FLASH_OPTCR_VALUE) { // ignore bits 0 and 1 because they are control bits
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return secfalse;
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}
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if (FLASH->OPTCR1 != FLASH_OPTCR1_nWRP) {
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return secfalse;
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}
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// check values stored in flash memory
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if ((OPTION_BYTES_RDP_USER & ~3) != OPTION_BYTES_RDP_USER_VALUE) { // bits 0 and 1 are unused
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return secfalse;
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}
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if ((OPTION_BYTES_BANK1_WRP & 0xCFFFU) != OPTION_BYTES_BANK1_WRP_VALUE) { // bits 12 and 13 are unused
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return secfalse;
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}
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if ((OPTION_BYTES_BANK2_WRP & 0xFFFU) != OPTION_BYTES_BANK2_WRP_VALUE) { // bits 12, 13, 14, and 15 are unused
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return secfalse;
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}
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return sectrue;
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}
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// attempt to lock down the boardloader sectors
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HAL_FLASH_Unlock();
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HAL_FLASH_OB_Unlock();
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HAL_FLASHEx_OBProgram(&opts);
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HAL_FLASH_OB_Launch();
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HAL_FLASH_OB_Lock();
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HAL_FLASH_Lock();
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void flash_lock_option_bytes(void)
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{
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FLASH->OPTCR |= FLASH_OPTCR_OPTLOCK; // lock the option bytes
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}
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#define FLASH_OPTION_BYTES_1 (*(const uint64_t *)0x1FFFC000)
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#define FLASH_OPTION_BYTES_2 (*(const uint64_t *)0x1FFFC008)
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void flash_unlock_option_bytes(void)
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{
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if ((FLASH->OPTCR & FLASH_OPTCR_OPTLOCK) == 0) {
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return; // already unlocked
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}
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// reference RM0090 section 3.7.2
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// write the special sequence to unlock
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FLASH->OPTKEYR = FLASH_OPT_KEY1;
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FLASH->OPTKEYR = FLASH_OPT_KEY2;
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while (FLASH->OPTCR & FLASH_OPTCR_OPTLOCK); // wait until the flash option control register is unlocked
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}
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secbool flash_check_option_bytes(void)
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uint32_t flash_set_option_bytes(void)
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{
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// RDP level 2 WRP for sectors 0, 1 and 2 flash option control register matches
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if (((FLASH_OPTION_BYTES_1 & 0xFFEC) == 0xCCEC) && ((FLASH_OPTION_BYTES_2 & 0x0FFF) == 0x0FF8) && (FLASH->OPTCR == 0x0FF8CCED)) {
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return sectrue;
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// reference RM0090 section 3.7.2
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flash_wait_and_clear_status_flags();
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flash_unlock_option_bytes();
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flash_wait_and_clear_status_flags();
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FLASH->OPTCR1 = FLASH_OPTCR1_nWRP; // no write protection on any sectors in bank 2
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FLASH->OPTCR = FLASH_OPTCR_VALUE; // WARNING: dev board safe unless you compile for PRODUCTION or change this value!!!
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FLASH->OPTCR |= FLASH_OPTCR_OPTSTRT; // begin committing changes to flash
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const uint32_t result = flash_wait_and_clear_status_flags(); // wait until changes are committed
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flash_lock_option_bytes();
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return result;
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}
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secbool flash_configure_option_bytes(void)
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{
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if (sectrue == flash_check_option_bytes()) {
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return sectrue; // we DID NOT have to change the option bytes
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}
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return secfalse;
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do {
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flash_set_option_bytes();
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} while(sectrue != flash_check_option_bytes());
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return secfalse; // notify that we DID have to change the option bytes
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}
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void periph_init(void)
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@ -80,7 +134,6 @@ void periph_init(void)
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secbool reset_flags_init(void)
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{
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/*
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#if PRODUCTION
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// this is effective enough that it makes development painful, so only use it for production.
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// check the reset flags to assure that we arrive here due to a regular full power-on event,
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@ -89,7 +142,6 @@ secbool reset_flags_init(void)
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return secfalse;
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}
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#endif
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*/
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RCC->CSR |= RCC_CSR_RMVF; // clear the reset flags
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