2017-03-07 13:50:09 +00:00
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#include STM32_HAL_H
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2017-10-06 09:11:43 +00:00
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int rng_init(void)
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{
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RCC->AHB2ENR |= RCC_AHB2ENR_RNGEN; // enable TRNG peripheral clock
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RNG->CR = RNG_CR_RNGEN; // enable TRNG
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2017-03-07 14:52:19 +00:00
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return 0;
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2017-03-07 13:50:09 +00:00
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}
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2017-10-06 09:11:43 +00:00
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uint32_t rng_read(const uint32_t previous, const uint32_t compare_previous)
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{
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uint32_t temp = previous;
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do {
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while ((RNG->SR & (RNG_SR_SECS | RNG_SR_CECS | RNG_SR_DRDY)) != RNG_SR_DRDY) {
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; // wait until TRNG is ready
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}
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temp = RNG->DR; // read the data from the TRNG
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} while (compare_previous && (temp == previous)); // RM0090 section 24.3.1 FIPS continuous random number generator test
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return temp;
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}
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uint32_t rng_get(void)
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{
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// reason for keeping history: RM0090 section 24.3.1 FIPS continuous random number generator test
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static uint32_t previous = 0, current = 0;
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if (previous == current) {
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previous = rng_read(previous, 0);
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} else {
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previous = current;
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}
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current = rng_read(previous, 1);
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return current;
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2017-03-07 13:50:09 +00:00
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}
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