jsteube
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9125062ffc
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Move volatiles for AMD closer to the problem
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2017-09-08 13:32:19 +02:00 |
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jsteube
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1963b12fdc
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According to AMD docs, GCN 3 and 4 are the same
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2017-09-08 12:46:00 +02:00 |
|
jsteube
|
2b4be5d093
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Move AMD ROCm driver check out of a --force condition
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2017-09-08 12:44:06 +02:00 |
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jsteube
|
ac9f1da747
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Add fine-tuned AMD GCN control macros
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2017-09-07 20:33:43 +02:00 |
|
jsteube
|
3b89153c2d
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Fix use of --hex-salt with SALT_TYPE_GENERIC
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2017-09-06 22:14:06 +02:00 |
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jsteube
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d05f40ab98
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Remove OpenCL build option -O2 fixed for ROCm and AMDGPU-PRO using AMD_OCL_BUILD_OPTIONS_APPEND, no longer needed with latest ROCm
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2017-09-06 16:38:55 +02:00 |
|
Jens Steube
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a910aea9e0
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Do not use __local memory for -m 13100 if running on a device without physical shared memory
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2017-09-05 17:41:55 +02:00 |
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Jens Steube
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b58aa445b4
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Do not use __local memory for -m 7500 if running on a device without physical shared memory
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2017-09-05 17:37:20 +02:00 |
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Jens Steube
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3e597f4c7b
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Revert use of zero-copy for main password buffer using CL_MEM_ALLOC_HOST_PTR and hc_clEnqueueMapBuffer()
Caused problems with WPA cracking performance on NVidia when not using rules
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2017-09-05 17:19:49 +02:00 |
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Jens Steube
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63f6ca5114
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Do not use __local memory for whirlpool if running on a device without physical shared memory
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2017-09-05 16:45:20 +02:00 |
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jsteube
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0a0522cf76
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Reset salt length limit in test.pl for mode 4520 to not run into errors in case the user specifies the -O mode
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2017-09-04 15:57:57 +02:00 |
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jsteube
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0dfe015301
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Fixed a parser error in multiple modes not checking for return code, resulting in negative memory index writes
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2017-09-04 15:53:13 +02:00 |
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jsteube
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8b0e7087c7
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Fixed an invalid optimization code in kernel 7700 depending on the input hash, causing the kernel to loop forever
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2017-09-03 13:36:14 +02:00 |
|
jsteube
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151dbc5349
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Fix replace value in inc_hash_ripemd160.cl
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2017-09-01 16:35:08 +02:00 |
|
jsteube
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f859f466ef
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Fix -m 8300 in -a 0 mode
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2017-09-01 16:10:29 +02:00 |
|
jsteube
|
f5e04254dc
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Fix -m 10800 in -a 0 mode
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2017-09-01 16:06:42 +02:00 |
|
jsteube
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8ee75141ea
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OpenCL Runtime: Set OpenCL build option -O2 fixed for ROCm and AMDGPU-PRO using AMD_OCL_BUILD_OPTIONS_APPEND
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2017-08-31 15:25:19 +02:00 |
|
jsteube
|
d3b9febb30
|
Fix some double variable declarations
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2017-08-30 16:29:25 +02:00 |
|
jsteube
|
40b57677cd
|
OpenCL Kernels: Reactivate Dalibors XOR optimization on MD5_H on all MD5 based algorithms
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2017-08-30 15:32:09 +02:00 |
|
jsteube
|
6d112aeb39
|
OpenCL Kernels: Rewritten Keccak kernel to run fully on registers and partially reversed last round
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2017-08-30 13:27:04 +02:00 |
|
Jens Steube
|
8fb583f0a7
|
Simplify kernel thread calculation for SCRYPT based algorithms
|
2017-08-29 22:43:26 +02:00 |
|
Jens Steube
|
12295dcd90
|
Restore v3.6.0 kernel thread handling of scrypt
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2017-08-29 18:30:50 +02:00 |
|
Jens Steube
|
fcd20fbacb
|
OpenCL Runtime: Fall back to 64 threads default (from 256) on AMD GPU to prevent creating too many workitems
|
2017-08-29 17:36:50 +02:00 |
|
jsteube
|
a378abee66
|
Add missing NEW_SIMD_CODE in -m 6600
|
2017-08-29 12:01:43 +02:00 |
|
jsteube
|
35f9fa8e30
|
Merge branch 'master' of https://github.com/hashcat/hashcat
|
2017-08-29 10:29:01 +02:00 |
|
jsteube
|
86f67517a0
|
Allow higher number of kernel_loops for -a 0 mode in case they are slow hashes
|
2017-08-29 10:28:42 +02:00 |
|
jsteube
|
1c169af0ad
|
Make -m 14100 a pure kernel only
|
2017-08-28 22:26:30 +02:00 |
|
jsteube
|
2b9888486e
|
Make -m 14000 a pure kernel only and add volatile for asm statement
|
2017-08-28 22:20:40 +02:00 |
|
jsteube
|
99f416435e
|
Fix invalid use of __constant in LM kernel
|
2017-08-28 19:40:51 +02:00 |
|
jsteube
|
6db2f4cc18
|
Fix typo
|
2017-08-28 15:54:47 +02:00 |
|
jsteube
|
918578bee1
|
Improve some NVidia specific inline assembly
|
2017-08-28 14:15:47 +02:00 |
|
jsteube
|
9de1e557bb
|
More VEGA specific inline assembly to improve SHA1 based kernels
|
2017-08-28 09:24:06 +02:00 |
|
jsteube
|
a0be36d7b8
|
Fix compile error caused by __add3()
|
2017-08-27 19:46:17 +02:00 |
|
jsteube
|
00e38cc2c6
|
Add VEGA specific inline assembly to improve all MD4, MD5, SHA1 and SHA256 based kernels
|
2017-08-27 19:36:07 +02:00 |
|
jsteube
|
7cebc936fd
|
Add a note on improved rule engine performance to changes.txt
|
2017-08-27 17:16:35 +02:00 |
|
jsteube
|
7bfd343ec9
|
Optimized rule_op_mangle_dupechar_last(), rule_op_mangle_rotate_right(), rule_op_mangle_rotate_left() and append_block1() in rule engine
|
2017-08-27 16:47:21 +02:00 |
|
jsteube
|
52a97fee75
|
Improve rule engine performance by improving append_0x80_xxx() performance by using precomputed values from constant memory
|
2017-08-27 14:22:20 +02:00 |
|
jsteube
|
3260000357
|
Fix whirlpool pure kernel in -a 0 mode
|
2017-08-26 19:51:37 +02:00 |
|
jsteube
|
e3810d054b
|
Fix some use of pw_t tmp variable
|
2017-08-26 19:48:38 +02:00 |
|
jsteube
|
5e01ff4c53
|
Refactor some u32x to u32 where u32x is not needed
|
2017-08-26 18:31:50 +02:00 |
|
jsteube
|
35a24df55e
|
Fixed an integer overflow in hash buffer size calculation
|
2017-08-26 16:29:59 +02:00 |
|
jsteube
|
f6fe5657a3
|
Fixed an integer overflow in masks not skipped when loaded from file
|
2017-08-26 14:40:53 +02:00 |
|
jsteube
|
2bc2137203
|
Remove some debugging statement
|
2017-08-25 20:54:21 +02:00 |
|
jsteube
|
688a580d6c
|
Fixed an integer overflow in innerloop_step and innerloop_cnt variables
|
2017-08-25 20:52:13 +02:00 |
|
jsteube
|
1aa76eac15
|
Refactor use of __constant to match up with the user selected attack mode
|
2017-08-25 17:52:55 +02:00 |
|
jsteube
|
938c281ee0
|
Resurrect some volatile variables in order to correctly compile pure kernels on AMD drivers
|
2017-08-25 17:06:07 +02:00 |
|
jsteube
|
48fbe81a09
|
Add more inline assembly for AMD ROCm
|
2017-08-25 16:33:00 +02:00 |
|
jsteube
|
6c619155c3
|
Workaround ROCm compiler error in aes256_ExpandKey()
|
2017-08-25 12:10:36 +02:00 |
|
jsteube
|
8c9c36ee2a
|
Fix out-of-bound access in aesXXX_InvertKey()
|
2017-08-25 11:52:07 +02:00 |
|
Jens Steube
|
b58da88174
|
Merge pull request #1343 from philsmd/master
fixes show output of -m 9710, -m 9810 and -m 10410
|
2017-08-25 10:02:17 +02:00 |
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