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Commit Graph

45 Commits

Author SHA1 Message Date
Jens Steube
0b3743ce94 - Added inline declaration to functions from simd.c, common.c, rp.c and types_ocl.c to increase performance
- Dropped static declaration from functions in all kernel to achieve OpenCL 1.1 compatibility
- Added -cl-std=CL1.1 to all kernel build options
- Created environment variable to inform NVidia OpenCL runtime to not create its own kernel cache
- Created environment variable to inform pocl OpenCL runtime to not create its own kernel cache
2016-05-01 23:15:26 +02:00
jsteube
9b3d18f87d SIMD for slow hashes prototype 2016-05-01 18:34:59 +02:00
Jens Steube
aef8dc2b01 First working version of -m 13500 2016-04-26 22:45:23 +02:00
Jens Steube
7cbce12ea7 Add platform vendor_id detection 2016-04-26 13:59:14 +02:00
Jens Steube
15d7e41d68 Fix broken #ifdef in types_ocl.c 2016-04-25 07:10:02 +02:00
Jens Steube
81b19ddc7d Remove no longer needed allx() macro 2016-04-25 07:05:47 +02:00
Mangix
530651e96a Disable AMD optimizations for LLVM 2016-04-22 20:22:28 -07:00
Fist0urs
9e8b7a1d9a -m 13400 Increased max kdb size to 300KB 2016-04-18 18:27:51 +02:00
Jens Steube
1bc9e3ec85 Do not modify the original positions of mac1, mac2, nonce1 and nonce2 in hccap files
Should fix https://github.com/hashcat/oclHashcat/issues/288
2016-04-17 10:44:14 +02:00
Fist0urs
34b8d89422 Added support of keyfiles within Keepass 1.x and Keepass 2.x 2016-04-06 16:05:09 +02:00
Fist0urs
52b17a602f New format -m 13400, Keepass 1 (AES/Twofish) and Keepass 2 (AES) 2016-04-02 14:45:05 +02:00
Fist0urs
ad17fba9b6 New format -m 13200 AxCrypt 2016-03-01 19:11:13 +01:00
Jens Steube
6bc98368ba Get rid of old pw_cache mechanism to control host-based vector data-types 2016-02-22 11:57:37 +01:00
magnum
a5be8a75ed Allow and support vector-width 16, which is current maximum for
OpenCL. Closes #226.
2016-02-18 08:51:45 +01:00
Fist0urs
c3dabdd69e Initial commit 2016-02-16 16:34:46 +01:00
Jens Steube
6846348602 Use a different workaround for a catalyst bug which takes effect in sha512crypt 2016-01-31 17:24:12 +01:00
jsteube
87c9afd910 Fix speed for 64-bit datatype based algorithms for NV 2016-01-24 00:25:14 +01:00
Jens Steube
1d3795a3ab Converted _a3 kernels, use SIMD for CPU and GPU 2016-01-23 15:32:31 +01:00
jsteube
b9ad26fa67 Fix algorithms based on 64 bit datatypes for older NV cards 2016-01-19 21:27:39 +01:00
Jens Steube
3fdb930cf3 Add missing amd_bytealign_S() 2016-01-17 22:21:13 +01:00
jsteube
e3c0c80b6f Prepare new SIMD code for kernel, -m 0, 10, 20, 1000 should work in -a 3 mode and other hopefully stay unaffected 2016-01-17 22:17:50 +01:00
jsteube
f0a84a2410 Added new hash mode -m 13000 = RAR5 2016-01-09 20:34:12 +01:00
jsteube
332b3c35e5 Added new hash mode -m 12900 = Android FDE (Samsung DEK) 2016-01-09 00:49:54 +01:00
jsteube
e8229af09b Fix for -m 1500, -m 3000: Missing "defined" keyword
Fix for -m 1000: MD4_H1 copy/paste error
Fix for -m 8900, -m 9300: Invalid value for device_processor_cores for CPU devices
Fix for -m 9100: Variable salt2 initializer needed some clauses for clearness
Temporary limit gpu_accel for CPU devices to 1 for development phase
Mark pocl as too bleeding edge for production use, recommend native drivers
Remove workarounds for pocl
Rename VENDOR_ID_UNKNOWN to VENDOR_ID_GENERIC in host code
Rename IS_UNKNOWN to IS_GENERIC in kernel code
2016-01-07 20:14:34 +01:00
jsteube
8e3a72f911 More fixes for IS_UNKNOWN in kernels 2016-01-05 22:47:56 +01:00
jsteube
331188167c Replace the substring GPU to a more appropriate "device" or "kernel" substring depending on the context 2016-01-05 08:26:44 +01:00
jsteube
c4b1c8e7ca small fix for unknown opencl platforms 2016-01-04 16:13:10 +01:00
jsteube
3b589e3aac Prepare for allow other OpenCL platforms thans AMD and NVidia 2016-01-04 13:17:20 +01:00
jsteube
0428514f61 Extended support from 14 to 255 functions calls per rule on GPU 2016-01-03 19:49:47 +01:00
jsteube
bd16fd4cfc Declare word_buf_r as __constant for _a3 kernel
AMD's runtime compiler does that automatically, NV's does not or with different (but worse) thresholds
2015-12-30 16:54:08 +01:00
jsteube
68662f0062 replace swap32 and swap64 with faster versions for NV 2015-12-30 00:13:59 +01:00
jsteube
94d6fd3693 revert switch to rotate () 2015-12-27 21:22:54 +01:00
jsteube
212395168f Testchange for speed 2015-12-27 19:23:55 +01:00
jsteube
84568e5b3d Increase bcrypt speed for NV 2015-12-22 23:43:39 +01:00
jsteube
21891bf8db Fix 64 bit based rotates for use with ForceWare >= 358.x 2015-12-21 23:49:22 +01:00
jsteube
964ece53a3 add __bfe stub for AMD 2015-12-21 21:14:16 +01:00
jsteube
6c22de104e Slightly increase blowfish based algorithms for NV 2015-12-21 21:00:52 +01:00
Jens Steube
0e5b37a537 Fix AMD speeds @ sha512crypt 2015-12-21 14:50:13 +01:00
jsteube
7be2c2fd8d Fixed some speeds:
1800
3200
7100
7200
7400
8200
9300
9000
9600
11300
11600
2015-12-21 14:29:04 +01:00
jsteube
9d9097a12c Fix -m 7800 by adding amd_bytealign emulation 2015-12-16 16:15:21 +01:00
jsteube
9c392b472e Removed useless comments 2015-12-16 11:18:57 +01:00
jsteube
c29c7c093f Fix use of LOP3 2015-12-16 11:11:31 +01:00
jsteube
6a65c7b1ce Prepare for LOP3 integration 2015-12-16 10:19:17 +01:00
jsteube
2283d5c843 Fix more append_* functions in kernels 2015-12-15 16:50:21 +01:00
jsteube
0bf4e3c34a - Dropped all vector code since new GPU's are all scalar, makes the code much easier
- Some performance on low-end GPU may drop because of that, but only for a few hash-modes
- Dropped scalar code (aka warp) since we do not have any vector datatypes anymore
- Renamed C++ overloading functions memcat32_9 -> memcat_c32_w4x4_a3x4
- Still need to fix kernels to new function names, needs to be done manually
- Temperature Management needs to be rewritten partially because of conflicting datatypes names
- Added code to create different codepaths for NV on AMD in runtime in host (see data.vendor_id)
- Added code to create different codepaths for NV on AMD in runtime in kernels (see IS_NV and IS_AMD)
- First tests working for -m 0, for example
- Great performance increases in general for NV so far
- Tested amp_* and markov_* kernel
- Migrated special NV optimizations for rule processor
2015-12-15 12:04:22 +01:00