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mirror of https://github.com/bitdefender/bddisasm.git synced 2024-11-22 07:28:07 +00:00
bddisasm/inc
Andrei Vlad LUTAS f7bf814bbc Flag the rIP operand of conditional branches as being conditionally read/write instead of plain read/write.
Bypass self-writes option in bdshemu - if set, bdshemu will not proceed to commit modifications made by the shellcode to itself.
2021-05-17 09:04:34 +03:00
..
bddisasm.h Added support for UINTR, HRESET and AVX-VNNI instructions, as per Intel® Architecture Instruction Set Extensions Programming Reference 41 (October 2020). 2020-10-05 13:19:03 +03:00
bdshemu.h Flag the rIP operand of conditional branches as being conditionally read/write instead of plain read/write. 2021-05-17 09:04:34 +03:00
constants.h Added support for Intel FRED and LKGS instructions. 2021-03-15 14:05:44 +02:00
cpuidflags.h Added support for Intel FRED and LKGS instructions. 2021-03-15 14:05:44 +02:00
disasmstatus.h As per Intel SDM version 73 released in November 2020, make sure we don't decode 32-bit EVEX instructions that have EVEX.V' cleared, and 64-bit EVEX instructions that don't use EVEX.V' field, but have it cleared. 2020-11-17 10:36:26 +02:00
disasmtypes.h Added support for Intel FRED and LKGS instructions. 2021-03-15 14:05:44 +02:00
registers.h Renamed REG_* fields to NDR_*, so that we don't conflict with _GNU_SOURCES. 2020-07-29 11:05:27 +03:00
version.h Flag the rIP operand of conditional branches as being conditionally read/write instead of plain read/write. 2021-05-17 09:04:34 +03:00