Andrei Vlad LUTAS f53cbc51e2 Added support for new Intel ISA, per Intel® Architecture Instruction Set Extensions and Future Features document #319433-049 (June 2023): AVX-NNI-INT16, SHA512, SM3, SM4, TSE.		2023-07-21 09:38:49 +03:00
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bddisasm.h	Added support for new Intel instructions, per Intel ISA extensions document #319433-046 (September 2022): PREFETCHITI, RAO-INT, CMPCCXADD, WRMSRNS, MSRLIST, AMX-FP16, AVX-IFMA, AVX-NE-CONVERT, AVX-VNNI-INT8.	2022-10-04 12:22:59 +03:00
bdshemu.h	Make sure all flags are set for CMPXCHG (this was left intentionally incomplete).	2022-07-19 11:03:17 +03:00
constants.h	Added support for new Intel ISA, per Intel® Architecture Instruction Set Extensions and Future Features document #319433-049 (June 2023): AVX-NNI-INT16, SHA512, SM3, SM4, TSE.	2023-07-21 09:38:49 +03:00
cpuidflags.h	Added support for new Intel ISA, per Intel® Architecture Instruction Set Extensions and Future Features document #319433-049 (June 2023): AVX-NNI-INT16, SHA512, SM3, SM4, TSE.	2023-07-21 09:38:49 +03:00
disasmstatus.h	Switched to internally defined types.	2022-01-05 14:03:13 +02:00
disasmtypes.h	Switched to internally defined types.	2022-01-05 14:03:13 +02:00
registers.h	Renamed REG_* fields to NDR_*, so that we don't conflict with _GNU_SOURCES.	2020-07-29 11:05:27 +03:00
version.h	Added support for new Intel ISA, per Intel® Architecture Instruction Set Extensions and Future Features document #319433-049 (June 2023): AVX-NNI-INT16, SHA512, SM3, SM4, TSE.	2023-07-21 09:38:49 +03:00