Andrei Vlad LUTAS e26971b4f0 Added missing Default 64 flag for the ENTER instruction. ... On AMD, operand size is never forced to 64 bit - instead, it only defaults to 64 bit, which means that 0x66 can be used to encode 16 bit version of the instructions.		2020-11-06 14:19:22 +02:00
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bdshemu	Added missing Default 64 flag for the ENTER instruction.	2020-11-06 14:19:22 +02:00
bddisasm.h	Added support for UINTR, HRESET and AVX-VNNI instructions, as per Intel® Architecture Instruction Set Extensions Programming Reference 41 (October 2020).	2020-10-05 13:19:03 +03:00
constants.h	Added support for UINTR, HRESET and AVX-VNNI instructions, as per Intel® Architecture Instruction Set Extensions Programming Reference 41 (October 2020).	2020-10-05 13:19:03 +03:00
cpuidflags.h	Added support for UINTR, HRESET and AVX-VNNI instructions, as per Intel® Architecture Instruction Set Extensions Programming Reference 41 (October 2020).	2020-10-05 13:19:03 +03:00
disasmstatus.h	Don't use reserved identifiers for include guards	2020-07-27 16:51:16 +03:00
disasmtypes.h	Added missing Default 64 flag for the ENTER instruction.	2020-11-06 14:19:22 +02:00
registers.h	Renamed REG_* fields to NDR_*, so that we don't conflict with _GNU_SOURCES.	2020-07-29 11:05:27 +03:00
version.h	Added missing Default 64 flag for the ENTER instruction.	2020-11-06 14:19:22 +02:00