1
0
mirror of https://github.com/bitdefender/bddisasm.git synced 2024-12-01 11:58:19 +00:00
bddisasm/bddisasm_test/special
Andrei Vlad LUTAS e26971b4f0 Added missing Default 64 flag for the ENTER instruction.
On AMD, operand size is never forced to 64 bit - instead, it only defaults to 64 bit, which means that 0x66 can be used to encode 16 bit version of the instructions.
2020-11-06 14:19:22 +02:00
..
amx_64 Initial commit. 2020-07-21 11:19:18 +03:00
amx_64.asm Initial commit. 2020-07-21 11:19:18 +03:00
amx_64.result Added missing Default 64 flag for the ENTER instruction. 2020-11-06 14:19:22 +02:00
avx2gather_1_64 Initial commit. 2020-07-21 11:19:18 +03:00
avx2gather_1_64.asm Initial commit. 2020-07-21 11:19:18 +03:00
avx2gather_1_64.result Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf. 2020-09-10 11:06:20 +03:00
avx2gather_2_64 Initial commit. 2020-07-21 11:19:18 +03:00
avx2gather_2_64.asm Initial commit. 2020-07-21 11:19:18 +03:00
avx2gather_2_64.result Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf. 2020-09-10 11:06:20 +03:00
avx2gather_3_64 Initial commit. 2020-07-21 11:19:18 +03:00
avx2gather_3_64.asm Initial commit. 2020-07-21 11:19:18 +03:00
avx2gather_3_64.result Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf. 2020-09-10 11:06:20 +03:00
cr8_32 Initial commit. 2020-07-21 11:19:18 +03:00
cr8_32.asm Initial commit. 2020-07-21 11:19:18 +03:00
cr8_32.result Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf. 2020-09-10 11:06:20 +03:00
invalid_32 Initial commit. 2020-07-21 11:19:18 +03:00
invalid_32.asm Initial commit. 2020-07-21 11:19:18 +03:00
invalid_32.result Fixed some static code check warnings. 2020-09-21 12:16:45 +03:00
invalid_64 Initial commit. 2020-07-21 11:19:18 +03:00
invalid_64.asm Initial commit. 2020-07-21 11:19:18 +03:00
invalid_64.result Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf. 2020-09-10 11:06:20 +03:00
long_64 Initial commit. 2020-07-21 11:19:18 +03:00
long_64.asm Initial commit. 2020-07-21 11:19:18 +03:00
long_64.result Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf. 2020-09-10 11:06:20 +03:00
movcrdr_64 Initial commit. 2020-07-21 11:19:18 +03:00
movcrdr_64.asm Initial commit. 2020-07-21 11:19:18 +03:00
movcrdr_64.result Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf. 2020-09-10 11:06:20 +03:00
only_32 Initial commit. 2020-07-21 11:19:18 +03:00
only_32.asm Initial commit. 2020-07-21 11:19:18 +03:00
only_32.result Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf. 2020-09-10 11:06:20 +03:00
only_64 Initial commit. 2020-07-21 11:19:18 +03:00
only_64.asm Initial commit. 2020-07-21 11:19:18 +03:00
only_64.result Fixed some static code check warnings. 2020-09-21 12:16:45 +03:00
regressions_32 Fixed RET with immediate - the immediate is not sign-extended. 2020-07-23 14:08:01 +03:00
regressions_32.asm Fixed RET with immediate - the immediate is not sign-extended. 2020-07-23 14:08:01 +03:00
regressions_32.result Fixed some static code check warnings. 2020-09-21 12:16:45 +03:00
regressions_64 Fixed RET with immediate - the immediate is not sign-extended. 2020-07-23 14:08:01 +03:00
regressions_64.asm Fixed RET with immediate - the immediate is not sign-extended. 2020-07-23 14:08:01 +03:00
regressions_64.result Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf. 2020-09-10 11:06:20 +03:00