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mirror of https://github.com/bitdefender/bddisasm.git synced 2024-11-22 07:28:07 +00:00
bddisasm/inc
2021-01-11 11:10:04 +02:00
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bddisasm.h Added support for UINTR, HRESET and AVX-VNNI instructions, as per Intel® Architecture Instruction Set Extensions Programming Reference 41 (October 2020). 2020-10-05 13:19:03 +03:00
bdshemu.h Added support for AESDEC, AESDECLAST and AESIMC emulation, using compiler intrinsics - they will be used only if the SHEMU_OPT_SUPPORT_AES is set (so the integrator can properly check for AES-NI support in hardware). 2020-12-04 10:52:56 +02:00
constants.h Removed support for PCOMMIT and CL1INVMB (not implemented by any x86/x64 CPUs), and marked MOV to/from test registers as being invalid in long mode. 2020-11-09 09:18:46 +02:00
cpuidflags.h Removed support for PCOMMIT and CL1INVMB (not implemented by any x86/x64 CPUs), and marked MOV to/from test registers as being invalid in long mode. 2020-11-09 09:18:46 +02:00
disasmstatus.h As per Intel SDM version 73 released in November 2020, make sure we don't decode 32-bit EVEX instructions that have EVEX.V' cleared, and 64-bit EVEX instructions that don't use EVEX.V' field, but have it cleared. 2020-11-17 10:36:26 +02:00
disasmtypes.h Added missing Default 64 flag for the ENTER instruction. 2020-11-06 14:19:22 +02:00
registers.h Renamed REG_* fields to NDR_*, so that we don't conflict with _GNU_SOURCES. 2020-07-29 11:05:27 +03:00
version.h Fixed https://github.com/bitdefender/bddisasm/issues/34, https://github.com/bitdefender/bddisasm/issues/35, https://github.com/bitdefender/bddisasm/issues/36 and https://github.com/bitdefender/bddisasm/issues/37. 2021-01-11 11:10:04 +02:00