mirror of
https://github.com/bitdefender/bddisasm.git
synced 2024-12-23 14:38:22 +00:00
752bc626c4
Fixed VEX decoding in 32 bit mode - vex.vvvv bit 3 is simply ignored. Fixed several FMA instructions decoding (L/W flag should be ignored). Print the 64 bit immediate value in disassembly, instead of the raw immediate (note that the operand always contains the sign-extended, full immediate). XBEGIN always uses 32/64 bit RIP size (0x66 does not affect its size). Decode WBINVD even if it's preceded by 0x66/0xF2 prefixes. Several mnemonic fixes (FXSAVE64, FXRSTOR64, PUSHA/PUSHAD...). Properly decode VPERMIL2* instructions. Fixed SSE register decoding when it is encoded in immediate. Decode SCATTER instructions even though they use the VSIB index as source. Some disp8 fixes (t1s -> t1s8/t1s16). SYSCALL/SYSRET are decoded and executed in 32 bit compat modem, even though SDM states they are invalid. RDPID uses 32/64 bit reg size, never 16. Various other minor tweaks & fixes. Re-generated the test files, and added some more, new tests.
13 lines
930 B
NASM
13 lines
930 B
NASM
bits 64
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db 0x66, 0x26, 0xc7, 0xf8, 0xff, 0x7f ; xbegin 0x800000000002d877
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db 0x26, 0xc7, 0xf8, 0x00, 0x00, 0x00, 0x00 ; xbegin 0x8000000000025b1a
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db 0x66, 0x0f, 0x01, 0xd9 ; vmmcall
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db 0x67, 0x48, 0x0f, 0x1a, 0x44, 0x25, 0x7f ; bndldx bnd0, [rbp+0x7f]
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db 0x26, 0x48, 0x0f, 0xae, 0x04, 0x48 ; fxsave64 [rax+rcx*2]
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db 0x26, 0x48, 0x0f, 0xae, 0x0c, 0x48 ; fxrstor64 [rax+rcx*2]
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db 0x26, 0xc4, 0xe3, 0x71, 0x48, 0xc2, 0x30 ; vpermil2ps xmm0, xmm1, xmm2, xmm3, 0x0
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db 0x26, 0xc4, 0xe3, 0x71, 0x49, 0xc2, 0x30 ; vpermil2pd xmm0, xmm1, xmm2, xmm3, 0x0
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db 0xc4, 0xe3, 0x69, 0x4a, 0xcb, 0x08 ; vblendvps xmm1, xmm2, xmm3, xmm0
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db 0xc4, 0xe3, 0x69, 0x68, 0xcb, 0x08 ; vfmaddps xmm1, xmm2, xmm3, xmm0
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db 0x62, 0xf2, 0x7d, 0x09, 0xa0, 0x04, 0x40 ; vpscatterdd dword ptr [rax+xmm0*2], k1, xmm0 |