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e26971b4f0
On AMD, operand size is never forced to 64 bit - instead, it only defaults to 64 bit, which means that 0x66 can be used to encode 16 bit version of the instructions. |
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.. | ||
amx_64 | ||
amx_64.asm | ||
amx_64.result | ||
avx2gather_1_64 | ||
avx2gather_1_64.asm | ||
avx2gather_1_64.result | ||
avx2gather_2_64 | ||
avx2gather_2_64.asm | ||
avx2gather_2_64.result | ||
avx2gather_3_64 | ||
avx2gather_3_64.asm | ||
avx2gather_3_64.result | ||
cr8_32 | ||
cr8_32.asm | ||
cr8_32.result | ||
invalid_32 | ||
invalid_32.asm | ||
invalid_32.result | ||
invalid_64 | ||
invalid_64.asm | ||
invalid_64.result | ||
long_64 | ||
long_64.asm | ||
long_64.result | ||
movcrdr_64 | ||
movcrdr_64.asm | ||
movcrdr_64.result | ||
only_32 | ||
only_32.asm | ||
only_32.result | ||
only_64 | ||
only_64.asm | ||
only_64.result | ||
regressions_32 | ||
regressions_32.asm | ||
regressions_32.result | ||
regressions_64 | ||
regressions_64.asm | ||
regressions_64.result |