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90 Commits 3 Branches 16 Tags 8.6 MiB
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3 Commits

Author SHA1 Message Date
Andrei Vlad LUTAS
e26971b4f0 Added missing Default 64 flag for the ENTER instruction. 
On AMD, operand size is never forced to 64 bit - instead, it only defaults to 64 bit, which means that 0x66 can be used to encode 16 bit version of the instructions.
 2020-11-06 14:19:22 +02:00
Andrei Vlad LUTAS
33078e4670 Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf. 2020-09-10 11:06:20 +03:00
Andrei Vlad LUTAS
698ba367a1 Initial commit. 2020-07-21 11:19:18 +03:00