Commit Graph

5 Commits (433e723e074dbf15e4e7429f08dab5653fcd9442)

Author SHA1 Message Date
Andrei Vlad LUTAS f7bf814bbc Flag the rIP operand of conditional branches as being conditionally read/write instead of plain read/write.
3 years ago
Andrei Vlad LUTAS 33078e4670 Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf.
4 years ago
Andrei Vlad LUTAS 4b2f2aee66 Added dedicated Prefetch operand access type.
4 years ago
Andrei Vlad LUTAS 9ff2543660 Added the Shadow Stack Pointer operand to the SYSCALL and SYSEXIT instructions.
4 years ago
Andrei Vlad LUTAS 698ba367a1 Initial commit.
4 years ago