BITDEFENDER\vlutas
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24665b0531
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Switched from nil to n/a naming for absent operands, as it is more obvious.
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2023-02-08 17:44:45 +02:00 |
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BITDEFENDER\vlutas
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9ba1e6a2f9
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Added support for new Intel instructions, per Intel ISA extensions document #319433-046 (September 2022): PREFETCHITI, RAO-INT, CMPCCXADD, WRMSRNS, MSRLIST, AMX-FP16, AVX-IFMA, AVX-NE-CONVERT, AVX-VNNI-INT8.
Multiple minor fixes to existing instructions.
Moved x86 decoding tests in a separate directory & improved the test script.
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2022-10-04 12:22:59 +03:00 |
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Andrei Vlad LUTAS
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9652450125
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Added support for UINTR, HRESET and AVX-VNNI instructions, as per Intel® Architecture Instruction Set Extensions Programming Reference 41 (October 2020).
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2020-10-05 13:19:03 +03:00 |
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Andrei Vlad LUTAS
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efe359b506
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Typo fixes in the instruction tables.
Added a reference to the git repo in the documentation.
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2020-07-21 16:38:09 +03:00 |
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Andrei Vlad LUTAS
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698ba367a1
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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