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bddisasm
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14 Tags
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4 Commits (08096172cc8f314b5aa154b6ac240113468af9fd)

Author SHA1 Message Date
Andrei Vlad LUTAS f7bf814bbc Flag the rIP operand of conditional branches as being conditionally read/write instead of plain read/write.
3 years ago
Andrei Vlad LUTAS 1eb1c9d0d2 Fixed https://github.com/bitdefender/bddisasm/issues/38.
3 years ago
Andrei Vlad LUTAS 33078e4670 Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf.
4 years ago
Andrei Vlad LUTAS 698ba367a1 Initial commit.
4 years ago