Typo fixes in the instruction tables.

Added a reference to the git repo in the documentation.

docs/source/index.rst

@@ -13,7 +13,7 @@ Welcome to bddisasm's documentation!
 About
 =====
 
-The Bitdefender x86 disassembler is a complete x86/x64 instruction decoder, 
+The Bitdefender x86 disassembler (https://github.com/bitdefender/bddisasm) is a complete x86/x64 instruction decoder, 
 capable of providing full information about each decoded instruction. The
 library is written entirely in C, with some Python 3 code for the instruction
 tables generation. It has no external dependencies, and it is thread safe

isagenerator/instructions/table_0F.dat

@@ -1,4 +1,4 @@
-# Mnemonic     Explicit      Implicit                  Encoding                                Fags, Prefixes, Set, Category, Class, RW map, Additional ops
+# Mnemonic     Explicit      Implicit                  Encoding                                Flags, Prefixes, Set, Category, Class, RW map, Additional ops
 #------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
 # 0x00 - 0x0F
 SLDT           Mw            LDTR                      [            0x0F 0x00 /0:mem]          s:I286PROT, t:SYSTEM, w:W|R, m:NOREAL|NOSGX

isagenerator/instructions/table_0F_38.dat

@@ -1,4 +1,4 @@
-# Mnemonic          Explicit Operands     Implicit          Encoding                                Fags, Prefixes, Set, Category, Class, RW map, Additional ops
+# Mnemonic          Explicit Operands     Implicit          Encoding                                Flags, Prefixes, Set, Category, Class, RW map, Additional ops
 #------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
 # 0x00 - 0x0F
 PSHUFB              Pq,Qq                 nil               [         NP 0x0F 0x38 0x00 /r]         s:SSSE3, t:MMX, w:RW|R

isagenerator/instructions/table_0F_3A.dat

@@ -1,4 +1,4 @@
-# Mnemonic          Explicit Operands     Implicit          Encoding                                Fags, Prefixes, Set, Category, Class, RW map, Additional ops
+# Mnemonic          Explicit Operands     Implicit          Encoding                                Flags, Prefixes, Set, Category, Class, RW map, Additional ops
 #------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
 # 0x00 - 0x0F
 ROUNDPS             Vx,Wx,Ib              nil               [       0x66 0x0F 0x3A 0x08 /r ib]      s:SSE4, t:SSE, w:W|R|R, e:2

isagenerator/instructions/table_evex1.dat

@@ -1,4 +1,4 @@
-# Mnemonic          Explicit Operands             Implicit  Encoding                                        Flags, Prefixes, Set, Category, Class, RW map, Additional ops
+# Mnemonic          Explicit Operands             Implicit  Encoding                                   Flags, Prefixes, Set, Category, Class, RW map, Additional ops
 #------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
 # 0x10 - 0x1F
 VMOVUPS              Vn{K}{z},Wn                  nil       [evex m:1 p:0 l:x w:0 0x10 /r]             s:AVX512F, t:DATAXFER, l:fvm, e:E4nb, w:W|R|R

isagenerator/instructions/table_evex2.dat

@@ -1,4 +1,4 @@
-# Mnemonic          Explicit Operands             Implicit  Encoding                                        Fags, Prefixes, Set, Category, Class, RW map, Additional ops
+# Mnemonic          Explicit Operands             Implicit  Encoding                                   Flags, Prefixes, Set, Category, Class, RW map, Additional ops
 #------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
 # 0x00 - 0x0F
 VPSHUFB              Vn{K}{z},Hn,Wn               nil       [evex m:2 p:1 l:x w:i 0x00 /r]             s:AVX512BW, t:AVX512, l:fvm, e:E4NFnb, w:W|R|R|R

isagenerator/instructions/table_evex3.dat

@@ -1,4 +1,4 @@
-# Mnemonic           Explicit Operands            Implicit  Encoding                                        Fags, Prefixes, Set, Category, Class, RW map, Additional ops
+# Mnemonic           Explicit Operands            Implicit  Encoding                                   Flags, Prefixes, Set, Category, Class, RW map, Additional ops
 #------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
 # 0x00 - 0x0F
 VPERMQ               Vu{K}{z},Wu|B64,Ib           nil       [evex m:3 p:1 l:x w:1 0x00 /r ib]          s:AVX512F, t:AVX512, a:NOL0, l:fv, e:E4NF, w:W|R|R|R

isagenerator/instructions/table_vex1.dat

@@ -1,4 +1,4 @@
-# Mnemonic          Explicit Operands     Implicit Operands Encoding                                Fags, Prefixes, Set, Category, Class, RW map, Additional ops
+# Mnemonic          Explicit Operands     Implicit Operands Encoding                                Flags, Prefixes, Set, Category, Class, RW map, Additional ops
 #------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
 # 0x00 - 0x0F
 

isagenerator/instructions/table_vex2.dat

@@ -1,4 +1,4 @@
-# Mnemonic          Explicit Operands     Implicit Operands Encoding                                Fags, Prefixes, Set, Category, Class, RW map, Additional ops
+# Mnemonic          Explicit Operands     Implicit Operands Encoding                                Flags, Prefixes, Set, Category, Class, RW map, Additional ops
 #------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
 # 0x00 - 0x0F
 VPSHUFB             Vx,Hx,Wx              nil               [vex m:2 p:1 l:x w:i 0x00 /r]           s:AVX, t:AVX, w:W|R|R, e:4

isagenerator/instructions/table_vex3.dat

@@ -1,4 +1,4 @@
-# Mnemonic          Explicit Operands     Implicit Operands Encoding                                Fags, Prefixes, Set, Category, Class, RW map, Additional ops
+# Mnemonic          Explicit Operands     Implicit Operands Encoding                                Flags, Prefixes, Set, Category, Class, RW map, Additional ops
 #------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
 # 0x00 - 0x0F
 VPERMQ              Vqq,Wqq,Ib            nil               [vex m:3 p:1 l:1 w:1 0x00 /r ib]        s:AVX2, t:AVX2, w:W|R|R, e:4

isagenerator/instructions/table_xop.dat

@@ -1,4 +1,4 @@
-# Mnemonic          Explicit Operands     Implicit Operands         Encoding        Fags, Prefixes, Set, Category, Class, RW map, Additional ops
+# Mnemonic          Explicit Operands     Implicit Operands         Encoding        Flags, Prefixes, Set, Category, Class, RW map, Additional ops
 #------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
 # XOP.mmmmm = 8