diff --git a/docs/source/index.rst b/docs/source/index.rst index 1cbcef2..a6bc6ea 100644 --- a/docs/source/index.rst +++ b/docs/source/index.rst @@ -13,7 +13,7 @@ Welcome to bddisasm's documentation! About ===== -The Bitdefender x86 disassembler is a complete x86/x64 instruction decoder, +The Bitdefender x86 disassembler (https://github.com/bitdefender/bddisasm) is a complete x86/x64 instruction decoder, capable of providing full information about each decoded instruction. The library is written entirely in C, with some Python 3 code for the instruction tables generation. It has no external dependencies, and it is thread safe diff --git a/isagenerator/instructions/table_0F.dat b/isagenerator/instructions/table_0F.dat index 93e54e9..291a02f 100644 --- a/isagenerator/instructions/table_0F.dat +++ b/isagenerator/instructions/table_0F.dat @@ -1,4 +1,4 @@ -# Mnemonic Explicit Implicit Encoding Fags, Prefixes, Set, Category, Class, RW map, Additional ops +# Mnemonic Explicit Implicit Encoding Flags, Prefixes, Set, Category, Class, RW map, Additional ops #------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------ # 0x00 - 0x0F SLDT Mw LDTR [ 0x0F 0x00 /0:mem] s:I286PROT, t:SYSTEM, w:W|R, m:NOREAL|NOSGX diff --git a/isagenerator/instructions/table_0F_38.dat b/isagenerator/instructions/table_0F_38.dat index f03a93a..e186256 100644 --- a/isagenerator/instructions/table_0F_38.dat +++ b/isagenerator/instructions/table_0F_38.dat @@ -1,4 +1,4 @@ -# Mnemonic Explicit Operands Implicit Encoding Fags, Prefixes, Set, Category, Class, RW map, Additional ops +# Mnemonic Explicit Operands Implicit Encoding Flags, Prefixes, Set, Category, Class, RW map, Additional ops #------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------ # 0x00 - 0x0F PSHUFB Pq,Qq nil [ NP 0x0F 0x38 0x00 /r] s:SSSE3, t:MMX, w:RW|R diff --git a/isagenerator/instructions/table_0F_3A.dat b/isagenerator/instructions/table_0F_3A.dat index 266c2a5..8c76440 100644 --- a/isagenerator/instructions/table_0F_3A.dat +++ b/isagenerator/instructions/table_0F_3A.dat @@ -1,4 +1,4 @@ -# Mnemonic Explicit Operands Implicit Encoding Fags, Prefixes, Set, Category, Class, RW map, Additional ops +# Mnemonic Explicit Operands Implicit Encoding Flags, Prefixes, Set, Category, Class, RW map, Additional ops #------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------ # 0x00 - 0x0F ROUNDPS Vx,Wx,Ib nil [ 0x66 0x0F 0x3A 0x08 /r ib] s:SSE4, t:SSE, w:W|R|R, e:2 diff --git a/isagenerator/instructions/table_evex1.dat b/isagenerator/instructions/table_evex1.dat index 30ad5eb..f6a81b3 100644 --- a/isagenerator/instructions/table_evex1.dat +++ b/isagenerator/instructions/table_evex1.dat @@ -1,4 +1,4 @@ -# Mnemonic Explicit Operands Implicit Encoding Flags, Prefixes, Set, Category, Class, RW map, Additional ops +# Mnemonic Explicit Operands Implicit Encoding Flags, Prefixes, Set, Category, Class, RW map, Additional ops #------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------ # 0x10 - 0x1F VMOVUPS Vn{K}{z},Wn nil [evex m:1 p:0 l:x w:0 0x10 /r] s:AVX512F, t:DATAXFER, l:fvm, e:E4nb, w:W|R|R diff --git a/isagenerator/instructions/table_evex2.dat b/isagenerator/instructions/table_evex2.dat index 270736d..01c875a 100644 --- a/isagenerator/instructions/table_evex2.dat +++ b/isagenerator/instructions/table_evex2.dat @@ -1,4 +1,4 @@ -# Mnemonic Explicit Operands Implicit Encoding Fags, Prefixes, Set, Category, Class, RW map, Additional ops +# Mnemonic Explicit Operands Implicit Encoding Flags, Prefixes, Set, Category, Class, RW map, Additional ops #------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------ # 0x00 - 0x0F VPSHUFB Vn{K}{z},Hn,Wn nil [evex m:2 p:1 l:x w:i 0x00 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4NFnb, w:W|R|R|R diff --git a/isagenerator/instructions/table_evex3.dat b/isagenerator/instructions/table_evex3.dat index 6212e46..117b655 100644 --- a/isagenerator/instructions/table_evex3.dat +++ b/isagenerator/instructions/table_evex3.dat @@ -1,4 +1,4 @@ -# Mnemonic Explicit Operands Implicit Encoding Fags, Prefixes, Set, Category, Class, RW map, Additional ops +# Mnemonic Explicit Operands Implicit Encoding Flags, Prefixes, Set, Category, Class, RW map, Additional ops #------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------ # 0x00 - 0x0F VPERMQ Vu{K}{z},Wu|B64,Ib nil [evex m:3 p:1 l:x w:1 0x00 /r ib] s:AVX512F, t:AVX512, a:NOL0, l:fv, e:E4NF, w:W|R|R|R diff --git a/isagenerator/instructions/table_vex1.dat b/isagenerator/instructions/table_vex1.dat index 098f9c8..3909a2c 100644 --- a/isagenerator/instructions/table_vex1.dat +++ b/isagenerator/instructions/table_vex1.dat @@ -1,4 +1,4 @@ -# Mnemonic Explicit Operands Implicit Operands Encoding Fags, Prefixes, Set, Category, Class, RW map, Additional ops +# Mnemonic Explicit Operands Implicit Operands Encoding Flags, Prefixes, Set, Category, Class, RW map, Additional ops #------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------ # 0x00 - 0x0F diff --git a/isagenerator/instructions/table_vex2.dat b/isagenerator/instructions/table_vex2.dat index e0c09ed..ef5f783 100644 --- a/isagenerator/instructions/table_vex2.dat +++ b/isagenerator/instructions/table_vex2.dat @@ -1,4 +1,4 @@ -# Mnemonic Explicit Operands Implicit Operands Encoding Fags, Prefixes, Set, Category, Class, RW map, Additional ops +# Mnemonic Explicit Operands Implicit Operands Encoding Flags, Prefixes, Set, Category, Class, RW map, Additional ops #------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------ # 0x00 - 0x0F VPSHUFB Vx,Hx,Wx nil [vex m:2 p:1 l:x w:i 0x00 /r] s:AVX, t:AVX, w:W|R|R, e:4 diff --git a/isagenerator/instructions/table_vex3.dat b/isagenerator/instructions/table_vex3.dat index 6daf0cd..c6cb049 100644 --- a/isagenerator/instructions/table_vex3.dat +++ b/isagenerator/instructions/table_vex3.dat @@ -1,4 +1,4 @@ -# Mnemonic Explicit Operands Implicit Operands Encoding Fags, Prefixes, Set, Category, Class, RW map, Additional ops +# Mnemonic Explicit Operands Implicit Operands Encoding Flags, Prefixes, Set, Category, Class, RW map, Additional ops #------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------ # 0x00 - 0x0F VPERMQ Vqq,Wqq,Ib nil [vex m:3 p:1 l:1 w:1 0x00 /r ib] s:AVX2, t:AVX2, w:W|R|R, e:4 diff --git a/isagenerator/instructions/table_xop.dat b/isagenerator/instructions/table_xop.dat index 88e83b9..04292f5 100644 --- a/isagenerator/instructions/table_xop.dat +++ b/isagenerator/instructions/table_xop.dat @@ -1,4 +1,4 @@ -# Mnemonic Explicit Operands Implicit Operands Encoding Fags, Prefixes, Set, Category, Class, RW map, Additional ops +# Mnemonic Explicit Operands Implicit Operands Encoding Flags, Prefixes, Set, Category, Class, RW map, Additional ops #------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------ # XOP.mmmmm = 8