mirror of
https://github.com/bitdefender/bddisasm.git
synced 2025-05-29 04:38:55 +00:00
Added support for new Intel instructions, per Intel ISA extensions document #319433-046 (September 2022): PREFETCHITI, RAO-INT, CMPCCXADD, WRMSRNS, MSRLIST, AMX-FP16, AVX-IFMA, AVX-NE-CONVERT, AVX-VNNI-INT8.
Multiple minor fixes to existing instructions. Moved x86 decoding tests in a separate directory & improved the test script.
This commit is contained in:
BITDEFENDER\vlutas
parent
4596dbda51
commit
9ba1e6a2f9
@ -99,6 +99,8 @@ static const ND_UINT16 gOperandMap[] =
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ND_OPE_S, // ND_OPT_MEM_SHS
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ND_OPE_S, // ND_OPT_MEM_SHSP
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ND_OPE_S, // ND_OPT_MEM_SHS0
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ND_OPE_S, // ND_OPT_MEM_SMSRT
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ND_OPE_S, // ND_OPT_MEM_DMSRT
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ND_OPE_L, // ND_OPT_Im2z
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@ -182,12 +184,12 @@ NdGetVersion(
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if (ND_NULL != BuildDate)
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{
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*BuildDate = ND_NULL;
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*BuildDate = (char *)ND_NULL;
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}
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if (ND_NULL != BuildTime)
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{
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*BuildTime = ND_NULL;
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*BuildTime = (char *)ND_NULL;
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}
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#else
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@ -1585,6 +1587,11 @@ NdParseOperand(
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size = ND_SIZE_512BIT;
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break;
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case ND_OPS_4096:
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// 64 entries x 64 bit per entry = 4096 bit MSR address/value list.
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size = ND_SIZE_4096BIT;
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break;
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case ND_OPS_unknown:
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size = ND_SIZE_UNKNOWN;
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break;
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@ -2792,6 +2799,26 @@ memory:
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operand->Info.Memory.ShStkType = ND_SHSTK_PL0_SSP;
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break;
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case ND_OPT_MEM_SMSRT:
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// Table of MSR addresses, encoded in [RSI].
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Instrux->MemoryAccess |= operand->Access.Access;
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operand->Type = ND_OP_MEM;
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operand->Info.Memory.HasBase = ND_TRUE;
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operand->Info.Memory.BaseSize = 2 << Instrux->AddrMode;
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operand->Info.Memory.Base = NDR_RSI; // Always rSI.
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operand->Info.Memory.HasSeg = ND_FALSE; // Linear Address directly, only useable in 64 bit mode.
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break;
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case ND_OPT_MEM_DMSRT:
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// Table of MSR addresses, encoded in [RDI].
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Instrux->MemoryAccess |= operand->Access.Access;
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operand->Type = ND_OP_MEM;
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operand->Info.Memory.HasBase = ND_TRUE;
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operand->Info.Memory.BaseSize = 2 << Instrux->AddrMode;
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operand->Info.Memory.Base = NDR_RDI; // Always rDI.
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operand->Info.Memory.HasSeg = ND_FALSE; // Linear Address directly, only useable in 64 bit mode.
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break;
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case ND_OPT_MEM_SHSP:
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// Shadow stack push/pop access.
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Instrux->MemoryAccess |= operand->Access.Access;
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@ -3325,6 +3352,12 @@ NdFindInstruction(
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{
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nextIndex = ND_ILUT_INDEX_AUX_REP;
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}
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else if (Instrux->DefCode == ND_CODE_64 && Instrux->HasModRm &&
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Instrux->ModRm.mod == 0 && Instrux->ModRm.rm == NDR_RBP &&
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ND_NULL != pTable->Table[ND_ILUT_INDEX_AUX_RIPREL])
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{
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nextIndex = ND_ILUT_INDEX_AUX_RIPREL;
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}
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else
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{
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nextIndex = ND_ILUT_INDEX_AUX_NONE;
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@ -3358,6 +3391,10 @@ NdFindInstruction(
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{
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pTable = (const ND_TABLE *)pTable->Table[ND_ILUT_FEATURE_CLDEMOTE];
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}
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else if ((ND_NULL != pTable->Table[ND_ILUT_FEATURE_PITI]) && !!(Instrux->FeatMode & ND_FEAT_PITI))
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{
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pTable = (const ND_TABLE *)pTable->Table[ND_ILUT_FEATURE_PITI];
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}
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else
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{
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pTable = (const ND_TABLE *)pTable->Table[ND_ILUT_FEATURE_NONE];
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File diff suppressed because it is too large
Load Diff
@ -2,36 +2,44 @@
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* Copyright (c) 2020 Bitdefender
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* SPDX-License-Identifier: Apache-2.0
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*/
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//
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// This file was auto-generated by generate_tables.py. DO NOT MODIFY!
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//
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#ifndef MNEMONICS_H
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#define MNEMONICS_H
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const char *gMnemonics[1695] =
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const char *gMnemonics[1733] =
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{
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"AAA", "AAD", "AAM", "AAS", "ADC", "ADCX", "ADD", "ADDPD", "ADDPS",
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"ADDSD", "ADDSS", "ADDSUBPD", "ADDSUBPS", "ADOX", "AESDEC", "AESDEC128KL",
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"AESDEC256KL", "AESDECLAST", "AESDECWIDE128KL", "AESDECWIDE256KL",
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"AESENC", "AESENC128KL", "AESENC256KL", "AESENCLAST", "AESENCWIDE128KL",
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"AESENCWIDE256KL", "AESIMC", "AESKEYGENASSIST", "ALTINST", "AND",
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"ANDN", "ANDNPD", "ANDNPS", "ANDPD", "ANDPS", "ARPL", "BEXTR",
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"BLCFILL", "BLCI", "BLCIC", "BLCMSK", "BLCS", "BLENDPD", "BLENDPS",
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"BLENDVPD", "BLENDVPS", "BLSFILL", "BLSI", "BLSIC", "BLSMSK",
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"BLSR", "BNDCL", "BNDCN", "BNDCU", "BNDLDX", "BNDMK", "BNDMOV",
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"BNDSTX", "BOUND", "BSF", "BSR", "BSWAP", "BT", "BTC", "BTR",
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"BTS", "BZHI", "CALL", "CALLF", "CBW", "CDQ", "CDQE", "CLAC",
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"CLC", "CLD", "CLDEMOTE", "CLEVICT0", "CLEVICT1", "CLFLUSH",
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"CLFLUSHOPT", "CLGI", "CLI", "CLRSSBSY", "CLTS", "CLUI", "CLWB",
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"CLZERO", "CMC", "CMOVBE", "CMOVC", "CMOVL", "CMOVLE", "CMOVNBE",
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"CMOVNC", "CMOVNL", "CMOVNLE", "CMOVNO", "CMOVNP", "CMOVNS",
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"CMOVNZ", "CMOVO", "CMOVP", "CMOVS", "CMOVZ", "CMP", "CMPPD",
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"CMPPS", "CMPSB", "CMPSD", "CMPSQ", "CMPSS", "CMPSW", "CMPXCHG",
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"CMPXCHG16B", "CMPXCHG8B", "COMISD", "COMISS", "CPUID", "CPU_READ",
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"CPU_WRITE", "CQO", "CRC32", "CVTDQ2PD", "CVTDQ2PS", "CVTPD2DQ",
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"CVTPD2PI", "CVTPD2PS", "CVTPI2PD", "CVTPI2PS", "CVTPS2DQ", "CVTPS2PD",
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"CVTPS2PI", "CVTSD2SI", "CVTSD2SS", "CVTSI2SD", "CVTSI2SS", "CVTSS2SD",
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"CVTSS2SI", "CVTTPD2DQ", "CVTTPD2PI", "CVTTPS2DQ", "CVTTPS2PI",
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"CVTTSD2SI", "CVTTSS2SI", "CWD", "CWDE", "DAA", "DAS", "DEC",
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"DELAY", "DIV", "DIVPD", "DIVPS", "DIVSD", "DIVSS", "DMINT",
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"DPPD", "DPPS", "EMMS", "ENCLS", "ENCLU", "ENCLV", "ENCODEKEY128",
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"AAA", "AAD", "AADD", "AAM", "AAND", "AAS", "ADC", "ADCX", "ADD",
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"ADDPD", "ADDPS", "ADDSD", "ADDSS", "ADDSUBPD", "ADDSUBPS", "ADOX",
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"AESDEC", "AESDEC128KL", "AESDEC256KL", "AESDECLAST", "AESDECWIDE128KL",
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"AESDECWIDE256KL", "AESENC", "AESENC128KL", "AESENC256KL", "AESENCLAST",
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"AESENCWIDE128KL", "AESENCWIDE256KL", "AESIMC", "AESKEYGENASSIST",
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"ALTINST", "AND", "ANDN", "ANDNPD", "ANDNPS", "ANDPD", "ANDPS",
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"AOR", "ARPL", "AXOR", "BEXTR", "BLCFILL", "BLCI", "BLCIC", "BLCMSK",
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"BLCS", "BLENDPD", "BLENDPS", "BLENDVPD", "BLENDVPS", "BLSFILL",
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"BLSI", "BLSIC", "BLSMSK", "BLSR", "BNDCL", "BNDCN", "BNDCU",
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"BNDLDX", "BNDMK", "BNDMOV", "BNDSTX", "BOUND", "BSF", "BSR",
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"BSWAP", "BT", "BTC", "BTR", "BTS", "BZHI", "CALL", "CALLF",
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"CBW", "CDQ", "CDQE", "CLAC", "CLC", "CLD", "CLDEMOTE", "CLEVICT0",
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"CLEVICT1", "CLFLUSH", "CLFLUSHOPT", "CLGI", "CLI", "CLRSSBSY",
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"CLTS", "CLUI", "CLWB", "CLZERO", "CMC", "CMOVBE", "CMOVC", "CMOVL",
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"CMOVLE", "CMOVNBE", "CMOVNC", "CMOVNL", "CMOVNLE", "CMOVNO",
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"CMOVNP", "CMOVNS", "CMOVNZ", "CMOVO", "CMOVP", "CMOVS", "CMOVZ",
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"CMP", "CMPBEXADD", "CMPCXADD", "CMPLEXADD", "CMPLXADD", "CMPNBEXADD",
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"CMPNCXADD", "CMPNLEXADD", "CMPNLXADD", "CMPNOXADD", "CMPNPXADD",
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"CMPNSXADD", "CMPNZXADD", "CMPOXADD", "CMPPD", "CMPPS", "CMPPXADD",
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"CMPSB", "CMPSD", "CMPSQ", "CMPSS", "CMPSW", "CMPSXADD", "CMPXCHG",
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"CMPXCHG16B", "CMPXCHG8B", "CMPZXADD", "COMISD", "COMISS", "CPUID",
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"CPU_READ", "CPU_WRITE", "CQO", "CRC32", "CVTDQ2PD", "CVTDQ2PS",
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"CVTPD2DQ", "CVTPD2PI", "CVTPD2PS", "CVTPI2PD", "CVTPI2PS", "CVTPS2DQ",
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"CVTPS2PD", "CVTPS2PI", "CVTSD2SI", "CVTSD2SS", "CVTSI2SD", "CVTSI2SS",
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"CVTSS2SD", "CVTSS2SI", "CVTTPD2DQ", "CVTTPD2PI", "CVTTPS2DQ",
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"CVTTPS2PI", "CVTTSD2SI", "CVTTSS2SI", "CWD", "CWDE", "DAA",
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"DAS", "DEC", "DELAY", "DIV", "DIVPD", "DIVPS", "DIVSD", "DIVSS",
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"DMINT", "DPPD", "DPPS", "EMMS", "ENCLS", "ENCLU", "ENCLV", "ENCODEKEY128",
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"ENCODEKEY256", "ENDBR32", "ENDBR64", "ENQCMD", "ENQCMDS", "ENTER",
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"ERETS", "ERETU", "EXTRACTPS", "EXTRQ", "F2XM1", "FABS", "FADD",
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"FADDP", "FBLD", "FBSTP", "FCHS", "FCMOVB", "FCMOVBE", "FCMOVE",
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@ -98,50 +106,52 @@ const char *gMnemonics[1695] =
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"PMOVZXWD", "PMOVZXWQ", "PMULDQ", "PMULHRSW", "PMULHRW", "PMULHUW",
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"PMULHW", "PMULLD", "PMULLW", "PMULUDQ", "POP", "POPA", "POPAD",
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"POPCNT", "POPFD", "POPFQ", "POPFW", "POR", "PREFETCH", "PREFETCHE",
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"PREFETCHM", "PREFETCHNTA", "PREFETCHT0", "PREFETCHT1", "PREFETCHT2",
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"PREFETCHW", "PREFETCHWT1", "PSADBW", "PSHUFB", "PSHUFD", "PSHUFHW",
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"PSHUFLW", "PSHUFW", "PSIGNB", "PSIGND", "PSIGNW", "PSLLD", "PSLLDQ",
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"PSLLQ", "PSLLW", "PSMASH", "PSRAD", "PSRAW", "PSRLD", "PSRLDQ",
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"PSRLQ", "PSRLW", "PSUBB", "PSUBD", "PSUBQ", "PSUBSB", "PSUBSW",
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"PSUBUSB", "PSUBUSW", "PSUBW", "PSWAPD", "PTEST", "PTWRITE",
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"PUNPCKHBW", "PUNPCKHDQ", "PUNPCKHQDQ", "PUNPCKHWD", "PUNPCKLBW",
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"PUNPCKLDQ", "PUNPCKLQDQ", "PUNPCKLWD", "PUSH", "PUSHA", "PUSHAD",
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"PUSHFD", "PUSHFQ", "PUSHFW", "PVALIDATE", "PXOR", "RCL", "RCPPS",
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"RCPSS", "RCR", "RDFSBASE", "RDGSBASE", "RDMSR", "RDPID", "RDPKRU",
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"RDPMC", "RDPRU", "RDRAND", "RDSEED", "RDSHR", "RDSSPD", "RDSSPQ",
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"RDTSC", "RDTSCP", "RETF", "RETN", "RMPADJUST", "RMPUPDATE",
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"ROL", "ROR", "RORX", "ROUNDPD", "ROUNDPS", "ROUNDSD", "ROUNDSS",
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"RSDC", "RSLDT", "RSM", "RSQRTPS", "RSQRTSS", "RSTORSSP", "RSTS",
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"SAHF", "SAL", "SALC", "SAR", "SARX", "SAVEPREVSSP", "SBB", "SCASB",
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"SCASD", "SCASQ", "SCASW", "SEAMCALL", "SEAMOPS", "SEAMRET",
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"SENDUIPI", "SERIALIZE", "SETBE", "SETC", "SETL", "SETLE", "SETNBE",
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"SETNC", "SETNL", "SETNLE", "SETNO", "SETNP", "SETNS", "SETNZ",
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"SETO", "SETP", "SETS", "SETSSBSY", "SETZ", "SFENCE", "SGDT",
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"SHA1MSG1", "SHA1MSG2", "SHA1NEXTE", "SHA1RNDS4", "SHA256MSG1",
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"SHA256MSG2", "SHA256RNDS2", "SHL", "SHLD", "SHLX", "SHR", "SHRD",
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"SHRX", "SHUFPD", "SHUFPS", "SIDT", "SKINIT", "SLDT", "SLWPCB",
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"SMINT", "SMSW", "SPFLT", "SQRTPD", "SQRTPS", "SQRTSD", "SQRTSS",
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"STAC", "STC", "STD", "STGI", "STI", "STMXCSR", "STOSB", "STOSD",
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"STOSQ", "STOSW", "STR", "STTILECFG", "STUI", "SUB", "SUBPD",
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"SUBPS", "SUBSD", "SUBSS", "SVDC", "SVLDT", "SVTS", "SWAPGS",
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"SYSCALL", "SYSENTER", "SYSEXIT", "SYSRET", "T1MSKC", "TDCALL",
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"TDPBF16PS", "TDPBSSD", "TDPBSUD", "TDPBUSD", "TDPBUUD", "TEST",
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"TESTUI", "TILELOADD", "TILELOADDT1", "TILERELEASE", "TILESTORED",
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"TILEZERO", "TLBSYNC", "TPAUSE", "TZCNT", "TZMSK", "UCOMISD",
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"UCOMISS", "UD0", "UD1", "UD2", "UIRET", "UMONITOR", "UMWAIT",
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"UNPCKHPD", "UNPCKHPS", "UNPCKLPD", "UNPCKLPS", "V4FMADDPS",
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"V4FMADDSS", "V4FNMADDPS", "V4FNMADDSS", "VADDPD", "VADDPH",
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"VADDPS", "VADDSD", "VADDSH", "VADDSS", "VADDSUBPD", "VADDSUBPS",
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"VAESDEC", "VAESDECLAST", "VAESENC", "VAESENCLAST", "VAESIMC",
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"VAESKEYGENASSIST", "VALIGND", "VALIGNQ", "VANDNPD", "VANDNPS",
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"VANDPD", "VANDPS", "VBLENDMPD", "VBLENDMPS", "VBLENDPD", "VBLENDPS",
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"VBLENDVPD", "VBLENDVPS", "VBROADCASTF128", "VBROADCASTF32X2",
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"VBROADCASTF32X4", "VBROADCASTF32X8", "VBROADCASTF64X2", "VBROADCASTF64X4",
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"VBROADCASTI128", "VBROADCASTI32X2", "VBROADCASTI32X4", "VBROADCASTI32X8",
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"VBROADCASTI64X2", "VBROADCASTI64X4", "VBROADCASTSD", "VBROADCASTSS",
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"VCMPPD", "VCMPPH", "VCMPPS", "VCMPSD", "VCMPSH", "VCMPSS", "VCOMISD",
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"PREFETCHIT0", "PREFETCHIT1", "PREFETCHM", "PREFETCHNTA", "PREFETCHT0",
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"PREFETCHT1", "PREFETCHT2", "PREFETCHW", "PREFETCHWT1", "PSADBW",
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"PSHUFB", "PSHUFD", "PSHUFHW", "PSHUFLW", "PSHUFW", "PSIGNB",
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"PSIGND", "PSIGNW", "PSLLD", "PSLLDQ", "PSLLQ", "PSLLW", "PSMASH",
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"PSRAD", "PSRAW", "PSRLD", "PSRLDQ", "PSRLQ", "PSRLW", "PSUBB",
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"PSUBD", "PSUBQ", "PSUBSB", "PSUBSW", "PSUBUSB", "PSUBUSW", "PSUBW",
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"PSWAPD", "PTEST", "PTWRITE", "PUNPCKHBW", "PUNPCKHDQ", "PUNPCKHQDQ",
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"PUNPCKHWD", "PUNPCKLBW", "PUNPCKLDQ", "PUNPCKLQDQ", "PUNPCKLWD",
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"PUSH", "PUSHA", "PUSHAD", "PUSHFD", "PUSHFQ", "PUSHFW", "PVALIDATE",
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"PXOR", "RCL", "RCPPS", "RCPSS", "RCR", "RDFSBASE", "RDGSBASE",
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"RDMSR", "RDMSRLIST", "RDPID", "RDPKRU", "RDPMC", "RDPRU", "RDRAND",
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"RDSEED", "RDSHR", "RDSSPD", "RDSSPQ", "RDTSC", "RDTSCP", "RETF",
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"RETN", "RMPADJUST", "RMPUPDATE", "ROL", "ROR", "RORX", "ROUNDPD",
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"ROUNDPS", "ROUNDSD", "ROUNDSS", "RSDC", "RSLDT", "RSM", "RSQRTPS",
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"RSQRTSS", "RSTORSSP", "RSTS", "SAHF", "SAL", "SALC", "SAR",
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"SARX", "SAVEPREVSSP", "SBB", "SCASB", "SCASD", "SCASQ", "SCASW",
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"SEAMCALL", "SEAMOPS", "SEAMRET", "SENDUIPI", "SERIALIZE", "SETBE",
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"SETC", "SETL", "SETLE", "SETNBE", "SETNC", "SETNL", "SETNLE",
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"SETNO", "SETNP", "SETNS", "SETNZ", "SETO", "SETP", "SETS", "SETSSBSY",
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"SETZ", "SFENCE", "SGDT", "SHA1MSG1", "SHA1MSG2", "SHA1NEXTE",
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"SHA1RNDS4", "SHA256MSG1", "SHA256MSG2", "SHA256RNDS2", "SHL",
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"SHLD", "SHLX", "SHR", "SHRD", "SHRX", "SHUFPD", "SHUFPS", "SIDT",
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"SKINIT", "SLDT", "SLWPCB", "SMINT", "SMSW", "SPFLT", "SQRTPD",
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"SQRTPS", "SQRTSD", "SQRTSS", "STAC", "STC", "STD", "STGI", "STI",
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"STMXCSR", "STOSB", "STOSD", "STOSQ", "STOSW", "STR", "STTILECFG",
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"STUI", "SUB", "SUBPD", "SUBPS", "SUBSD", "SUBSS", "SVDC", "SVLDT",
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"SVTS", "SWAPGS", "SYSCALL", "SYSENTER", "SYSEXIT", "SYSRET",
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"T1MSKC", "TDCALL", "TDPBF16PS", "TDPBSSD", "TDPBSUD", "TDPBUSD",
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"TDPBUUD", "TDPFP16PS", "TEST", "TESTUI", "TILELOADD", "TILELOADDT1",
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"TILERELEASE", "TILESTORED", "TILEZERO", "TLBSYNC", "TPAUSE",
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"TZCNT", "TZMSK", "UCOMISD", "UCOMISS", "UD0", "UD1", "UD2",
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"UIRET", "UMONITOR", "UMWAIT", "UNPCKHPD", "UNPCKHPS", "UNPCKLPD",
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"UNPCKLPS", "V4FMADDPS", "V4FMADDSS", "V4FNMADDPS", "V4FNMADDSS",
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"VADDPD", "VADDPH", "VADDPS", "VADDSD", "VADDSH", "VADDSS", "VADDSUBPD",
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"VADDSUBPS", "VAESDEC", "VAESDECLAST", "VAESENC", "VAESENCLAST",
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"VAESIMC", "VAESKEYGENASSIST", "VALIGND", "VALIGNQ", "VANDNPD",
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"VANDNPS", "VANDPD", "VANDPS", "VBCSTNEBF162PS", "VBCSTNESH2PS",
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"VBLENDMPD", "VBLENDMPS", "VBLENDPD", "VBLENDPS", "VBLENDVPD",
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"VBLENDVPS", "VBROADCASTF128", "VBROADCASTF32X2", "VBROADCASTF32X4",
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"VBROADCASTF32X8", "VBROADCASTF64X2", "VBROADCASTF64X4", "VBROADCASTI128",
|
||||
"VBROADCASTI32X2", "VBROADCASTI32X4", "VBROADCASTI32X8", "VBROADCASTI64X2",
|
||||
"VBROADCASTI64X4", "VBROADCASTSD", "VBROADCASTSS", "VCMPPD",
|
||||
"VCMPPH", "VCMPPS", "VCMPSD", "VCMPSH", "VCMPSS", "VCOMISD",
|
||||
"VCOMISH", "VCOMISS", "VCOMPRESSPD", "VCOMPRESSPS", "VCVTDQ2PD",
|
||||
"VCVTDQ2PH", "VCVTDQ2PS", "VCVTNE2PS2BF16", "VCVTNEPS2BF16",
|
||||
"VCVTDQ2PH", "VCVTDQ2PS", "VCVTNE2PS2BF16", "VCVTNEEBF162PS",
|
||||
"VCVTNEEPH2PS", "VCVTNEOBF162PS", "VCVTNEOPH2PS", "VCVTNEPS2BF16",
|
||||
"VCVTPD2DQ", "VCVTPD2PH", "VCVTPD2PS", "VCVTPD2QQ", "VCVTPD2UDQ",
|
||||
"VCVTPD2UQQ", "VCVTPH2DQ", "VCVTPH2PD", "VCVTPH2PS", "VCVTPH2PSX",
|
||||
"VCVTPH2QQ", "VCVTPH2UDQ", "VCVTPH2UQQ", "VCVTPH2UW", "VCVTPH2W",
|
||||
@ -226,9 +236,10 @@ const char *gMnemonics[1695] =
|
||||
"VPCMPUB", "VPCMPUD", "VPCMPUQ", "VPCMPUW", "VPCMPW", "VPCOMB",
|
||||
"VPCOMD", "VPCOMPRESSB", "VPCOMPRESSD", "VPCOMPRESSQ", "VPCOMPRESSW",
|
||||
"VPCOMQ", "VPCOMUB", "VPCOMUD", "VPCOMUQ", "VPCOMUW", "VPCOMW",
|
||||
"VPCONFLICTD", "VPCONFLICTQ", "VPDPBUSD", "VPDPBUSDS", "VPDPWSSD",
|
||||
"VPDPWSSDS", "VPERM2F128", "VPERM2I128", "VPERMB", "VPERMD",
|
||||
"VPERMI2B", "VPERMI2D", "VPERMI2PD", "VPERMI2PS", "VPERMI2Q",
|
||||
"VPCONFLICTD", "VPCONFLICTQ", "VPDPBSSD", "VPDPBSSDS", "VPDPBSUD",
|
||||
"VPDPBSUDS", "VPDPBUSD", "VPDPBUSDS", "VPDPBUUD", "VPDPBUUDS",
|
||||
"VPDPWSSD", "VPDPWSSDS", "VPERM2F128", "VPERM2I128", "VPERMB",
|
||||
"VPERMD", "VPERMI2B", "VPERMI2D", "VPERMI2PD", "VPERMI2PS", "VPERMI2Q",
|
||||
"VPERMI2W", "VPERMIL2PD", "VPERMIL2PS", "VPERMILPD", "VPERMILPS",
|
||||
"VPERMPD", "VPERMPS", "VPERMQ", "VPERMT2B", "VPERMT2D", "VPERMT2PD",
|
||||
"VPERMT2PS", "VPERMT2Q", "VPERMT2W", "VPERMW", "VPEXPANDB", "VPEXPANDD",
|
||||
@ -290,14 +301,14 @@ const char *gMnemonics[1695] =
|
||||
"VSUBSH", "VSUBSS", "VTESTPD", "VTESTPS", "VUCOMISD", "VUCOMISH",
|
||||
"VUCOMISS", "VUNPCKHPD", "VUNPCKHPS", "VUNPCKLPD", "VUNPCKLPS",
|
||||
"VXORPD", "VXORPS", "VZEROALL", "VZEROUPPER", "WAIT", "WBINVD",
|
||||
"WBNOINVD", "WRFSBASE", "WRGSBASE", "WRMSR", "WRPKRU", "WRSHR",
|
||||
"WRSSD", "WRSSQ", "WRUSSD", "WRUSSQ", "XABORT", "XADD", "XBEGIN",
|
||||
"XCHG", "XCRYPTCBC", "XCRYPTCFB", "XCRYPTCTR", "XCRYPTECB", "XCRYPTOFB",
|
||||
"XEND", "XGETBV", "XLATB", "XOR", "XORPD", "XORPS", "XRESLDTRK",
|
||||
"XRSTOR", "XRSTOR64", "XRSTORS", "XRSTORS64", "XSAVE", "XSAVE64",
|
||||
"XSAVEC", "XSAVEC64", "XSAVEOPT", "XSAVEOPT64", "XSAVES", "XSAVES64",
|
||||
"XSETBV", "XSHA1", "XSHA256", "XSTORE", "XSUSLDTRK", "XTEST",
|
||||
|
||||
"WBNOINVD", "WRFSBASE", "WRGSBASE", "WRMSR", "WRMSRLIST", "WRMSRNS",
|
||||
"WRPKRU", "WRSHR", "WRSSD", "WRSSQ", "WRUSSD", "WRUSSQ", "XABORT",
|
||||
"XADD", "XBEGIN", "XCHG", "XCRYPTCBC", "XCRYPTCFB", "XCRYPTCTR",
|
||||
"XCRYPTECB", "XCRYPTOFB", "XEND", "XGETBV", "XLATB", "XOR", "XORPD",
|
||||
"XORPS", "XRESLDTRK", "XRSTOR", "XRSTOR64", "XRSTORS", "XRSTORS64",
|
||||
"XSAVE", "XSAVE64", "XSAVEC", "XSAVEC64", "XSAVEOPT", "XSAVEOPT64",
|
||||
"XSAVES", "XSAVES64", "XSETBV", "XSHA1", "XSHA256", "XSTORE",
|
||||
"XSUSLDTRK", "XTEST",
|
||||
};
|
||||
|
||||
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@ -2,25 +2,30 @@
|
||||
* Copyright (c) 2020 Bitdefender
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
//
|
||||
// This file was auto-generated by generate_tables.py. DO NOT MODIFY!
|
||||
//
|
||||
|
||||
#ifndef TABLE_XOP_H
|
||||
#define TABLE_XOP_H
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_0a_10_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[64]
|
||||
(const void *)&gInstructions[68]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_0a_12_00_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[600]
|
||||
(const void *)&gInstructions[620]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_0a_12_01_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[601]
|
||||
(const void *)&gInstructions[621]
|
||||
};
|
||||
|
||||
const ND_TABLE_MODRM_REG gXopTable_root_0a_12_modrmreg =
|
||||
@ -304,43 +309,43 @@ const ND_TABLE_OPCODE gXopTable_root_0a_opcode =
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_01_01_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[65]
|
||||
(const void *)&gInstructions[69]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_01_05_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[67]
|
||||
(const void *)&gInstructions[71]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_01_03_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[69]
|
||||
(const void *)&gInstructions[73]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_01_02_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[74]
|
||||
(const void *)&gInstructions[78]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_01_06_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[76]
|
||||
(const void *)&gInstructions[80]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_01_07_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[1319]
|
||||
(const void *)&gInstructions[1358]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_01_04_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[1343]
|
||||
(const void *)&gInstructions[1383]
|
||||
};
|
||||
|
||||
const ND_TABLE_MODRM_REG gXopTable_root_09_01_modrmreg =
|
||||
@ -361,13 +366,13 @@ const ND_TABLE_MODRM_REG gXopTable_root_09_01_modrmreg =
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_02_06_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[66]
|
||||
(const void *)&gInstructions[70]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_02_01_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[68]
|
||||
(const void *)&gInstructions[72]
|
||||
};
|
||||
|
||||
const ND_TABLE_MODRM_REG gXopTable_root_09_02_modrmreg =
|
||||
@ -388,13 +393,13 @@ const ND_TABLE_MODRM_REG gXopTable_root_09_02_modrmreg =
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_12_reg_00_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[582]
|
||||
(const void *)&gInstructions[602]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_12_reg_01_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[1270]
|
||||
(const void *)&gInstructions[1309]
|
||||
};
|
||||
|
||||
const ND_TABLE_MODRM_REG gXopTable_root_09_12_reg_modrmreg =
|
||||
@ -424,127 +429,127 @@ const ND_TABLE_MODRM_MOD gXopTable_root_09_12_modrmmod =
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_81_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[1774]
|
||||
(const void *)&gInstructions[1821]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_80_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[1775]
|
||||
(const void *)&gInstructions[1822]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_83_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[1776]
|
||||
(const void *)&gInstructions[1823]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_82_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[1777]
|
||||
(const void *)&gInstructions[1824]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_c2_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2185]
|
||||
(const void *)&gInstructions[2242]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_c3_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2186]
|
||||
(const void *)&gInstructions[2243]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_c1_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2187]
|
||||
(const void *)&gInstructions[2244]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_cb_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2189]
|
||||
(const void *)&gInstructions[2246]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_d2_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2191]
|
||||
(const void *)&gInstructions[2248]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_d3_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2192]
|
||||
(const void *)&gInstructions[2249]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_d1_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2193]
|
||||
(const void *)&gInstructions[2250]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_db_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2194]
|
||||
(const void *)&gInstructions[2251]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_d6_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2195]
|
||||
(const void *)&gInstructions[2252]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_d7_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2196]
|
||||
(const void *)&gInstructions[2253]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_c6_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2198]
|
||||
(const void *)&gInstructions[2255]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_c7_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2199]
|
||||
(const void *)&gInstructions[2256]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_e1_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2201]
|
||||
(const void *)&gInstructions[2258]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_e3_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2203]
|
||||
(const void *)&gInstructions[2260]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_e2_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2206]
|
||||
(const void *)&gInstructions[2263]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_90_00_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2368]
|
||||
(const void *)&gInstructions[2427]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_90_01_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2369]
|
||||
(const void *)&gInstructions[2428]
|
||||
};
|
||||
|
||||
const ND_TABLE_VEX_W gXopTable_root_09_90_w =
|
||||
@ -559,13 +564,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_90_w =
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_92_00_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2371]
|
||||
(const void *)&gInstructions[2430]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_92_01_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2372]
|
||||
(const void *)&gInstructions[2431]
|
||||
};
|
||||
|
||||
const ND_TABLE_VEX_W gXopTable_root_09_92_w =
|
||||
@ -580,13 +585,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_92_w =
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_93_00_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2374]
|
||||
(const void *)&gInstructions[2433]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_93_01_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2375]
|
||||
(const void *)&gInstructions[2434]
|
||||
};
|
||||
|
||||
const ND_TABLE_VEX_W gXopTable_root_09_93_w =
|
||||
@ -601,13 +606,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_93_w =
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_91_00_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2377]
|
||||
(const void *)&gInstructions[2436]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_91_01_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2378]
|
||||
(const void *)&gInstructions[2437]
|
||||
};
|
||||
|
||||
const ND_TABLE_VEX_W gXopTable_root_09_91_w =
|
||||
@ -622,13 +627,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_91_w =
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_98_00_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2385]
|
||||
(const void *)&gInstructions[2444]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_98_01_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2386]
|
||||
(const void *)&gInstructions[2445]
|
||||
};
|
||||
|
||||
const ND_TABLE_VEX_W gXopTable_root_09_98_w =
|
||||
@ -643,13 +648,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_98_w =
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_9a_00_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2387]
|
||||
(const void *)&gInstructions[2446]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_9a_01_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2388]
|
||||
(const void *)&gInstructions[2447]
|
||||
};
|
||||
|
||||
const ND_TABLE_VEX_W gXopTable_root_09_9a_w =
|
||||
@ -664,13 +669,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_9a_w =
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_9b_00_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2389]
|
||||
(const void *)&gInstructions[2448]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_9b_01_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2390]
|
||||
(const void *)&gInstructions[2449]
|
||||
};
|
||||
|
||||
const ND_TABLE_VEX_W gXopTable_root_09_9b_w =
|
||||
@ -685,13 +690,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_9b_w =
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_99_00_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2391]
|
||||
(const void *)&gInstructions[2450]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_99_01_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2392]
|
||||
(const void *)&gInstructions[2451]
|
||||
};
|
||||
|
||||
const ND_TABLE_VEX_W gXopTable_root_09_99_w =
|
||||
@ -706,13 +711,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_99_w =
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_94_00_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2393]
|
||||
(const void *)&gInstructions[2452]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_94_01_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2394]
|
||||
(const void *)&gInstructions[2453]
|
||||
};
|
||||
|
||||
const ND_TABLE_VEX_W gXopTable_root_09_94_w =
|
||||
@ -727,13 +732,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_94_w =
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_95_01_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2395]
|
||||
(const void *)&gInstructions[2454]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_95_00_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2406]
|
||||
(const void *)&gInstructions[2465]
|
||||
};
|
||||
|
||||
const ND_TABLE_VEX_W gXopTable_root_09_95_w =
|
||||
@ -748,13 +753,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_95_w =
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_96_01_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2396]
|
||||
(const void *)&gInstructions[2455]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_96_00_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2397]
|
||||
(const void *)&gInstructions[2456]
|
||||
};
|
||||
|
||||
const ND_TABLE_VEX_W gXopTable_root_09_96_w =
|
||||
@ -769,13 +774,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_96_w =
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_97_00_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2404]
|
||||
(const void *)&gInstructions[2463]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_97_01_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2405]
|
||||
(const void *)&gInstructions[2464]
|
||||
};
|
||||
|
||||
const ND_TABLE_VEX_W gXopTable_root_09_97_w =
|
||||
@ -1053,13 +1058,13 @@ const ND_TABLE_OPCODE gXopTable_root_09_opcode =
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_a2_00_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2067]
|
||||
(const void *)&gInstructions[2114]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_a2_01_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2068]
|
||||
(const void *)&gInstructions[2115]
|
||||
};
|
||||
|
||||
const ND_TABLE_VEX_W gXopTable_root_08_a2_w =
|
||||
@ -1074,133 +1079,133 @@ const ND_TABLE_VEX_W gXopTable_root_08_a2_w =
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_cc_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2097]
|
||||
(const void *)&gInstructions[2144]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_ce_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2098]
|
||||
(const void *)&gInstructions[2145]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_cf_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2103]
|
||||
(const void *)&gInstructions[2150]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_ec_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2104]
|
||||
(const void *)&gInstructions[2151]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_ee_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2105]
|
||||
(const void *)&gInstructions[2152]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_ef_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2106]
|
||||
(const void *)&gInstructions[2153]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_ed_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2107]
|
||||
(const void *)&gInstructions[2154]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_cd_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2108]
|
||||
(const void *)&gInstructions[2155]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_9e_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2221]
|
||||
(const void *)&gInstructions[2278]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_9f_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2222]
|
||||
(const void *)&gInstructions[2279]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_97_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2223]
|
||||
(const void *)&gInstructions[2280]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_8e_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2224]
|
||||
(const void *)&gInstructions[2281]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_8f_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2225]
|
||||
(const void *)&gInstructions[2282]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_87_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2226]
|
||||
(const void *)&gInstructions[2283]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_86_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2227]
|
||||
(const void *)&gInstructions[2284]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_85_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2228]
|
||||
(const void *)&gInstructions[2285]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_96_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2229]
|
||||
(const void *)&gInstructions[2286]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_95_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2230]
|
||||
(const void *)&gInstructions[2287]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_a6_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2231]
|
||||
(const void *)&gInstructions[2288]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_b6_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2232]
|
||||
(const void *)&gInstructions[2289]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_a3_00_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2357]
|
||||
(const void *)&gInstructions[2416]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_a3_01_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2358]
|
||||
(const void *)&gInstructions[2417]
|
||||
};
|
||||
|
||||
const ND_TABLE_VEX_W gXopTable_root_08_a3_w =
|
||||
@ -1215,25 +1220,25 @@ const ND_TABLE_VEX_W gXopTable_root_08_a3_w =
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_c0_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2367]
|
||||
(const void *)&gInstructions[2426]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_c2_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2370]
|
||||
(const void *)&gInstructions[2429]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_c3_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2373]
|
||||
(const void *)&gInstructions[2432]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_c1_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2376]
|
||||
(const void *)&gInstructions[2435]
|
||||
};
|
||||
|
||||
const ND_TABLE_OPCODE gXopTable_root_08_opcode =
|
||||
|
||||
@ -42,16 +42,19 @@ typedef enum _ND_ILUT_TYPE
|
||||
#define ND_ILUT_INDEX_MOD_MEM 0
|
||||
#define ND_ILUT_INDEX_MOD_REG 1
|
||||
|
||||
// Mandatory prefixes.
|
||||
#define ND_ILUT_INDEX_MAN_PREF_NONE 0
|
||||
#define ND_ILUT_INDEX_MAN_PREF_66 1
|
||||
#define ND_ILUT_INDEX_MAN_PREF_F3 2
|
||||
#define ND_ILUT_INDEX_MAN_PREF_F2 3
|
||||
|
||||
// Operating mode.
|
||||
#define ND_ILUT_INDEX_MODE_NONE 0
|
||||
#define ND_ILUT_INDEX_MODE_16 1
|
||||
#define ND_ILUT_INDEX_MODE_32 2
|
||||
#define ND_ILUT_INDEX_MODE_64 3
|
||||
|
||||
// Operand size.
|
||||
#define ND_ILUT_INDEX_DSIZE_NONE 0
|
||||
#define ND_ILUT_INDEX_DSIZE_16 1
|
||||
#define ND_ILUT_INDEX_DSIZE_32 2
|
||||
@ -59,22 +62,27 @@ typedef enum _ND_ILUT_TYPE
|
||||
#define ND_ILUT_INDEX_DSIZE_DEF64 4
|
||||
#define ND_ILUT_INDEX_DSIZE_F64 5
|
||||
|
||||
// Address size.
|
||||
#define ND_ILUT_INDEX_ASIZE_NONE 0
|
||||
#define ND_ILUT_INDEX_ASIZE_16 1
|
||||
#define ND_ILUT_INDEX_ASIZE_32 2
|
||||
#define ND_ILUT_INDEX_ASIZE_64 3
|
||||
|
||||
// Misc conditions.
|
||||
#define ND_ILUT_INDEX_AUX_NONE 0
|
||||
#define ND_ILUT_INDEX_AUX_REXB 1
|
||||
#define ND_ILUT_INDEX_AUX_REXW 2
|
||||
#define ND_ILUT_INDEX_AUX_O64 3
|
||||
#define ND_ILUT_INDEX_AUX_F3 4
|
||||
#define ND_ILUT_INDEX_AUX_REP 5
|
||||
#define ND_ILUT_INDEX_AUX_RIPREL 6
|
||||
|
||||
// Specific features for instructions that map on the wide NOP space.
|
||||
#define ND_ILUT_FEATURE_NONE 0
|
||||
#define ND_ILUT_FEATURE_MPX 1
|
||||
#define ND_ILUT_FEATURE_CET 2
|
||||
#define ND_ILUT_FEATURE_CLDEMOTE 3
|
||||
#define ND_ILUT_FEATURE_PITI 4
|
||||
|
||||
|
||||
|
||||
@ -126,7 +134,7 @@ typedef struct _ND_TABLE_MPREFIX
|
||||
typedef struct _ND_TABLE_AUXILIARY
|
||||
{
|
||||
ND_UINT32 Type;
|
||||
const void *Table[6];
|
||||
const void *Table[8];
|
||||
} ND_TABLE_AUXILIARY, *PND_TABLE_AUXILIARY;
|
||||
|
||||
typedef struct _ND_TABLE_VENDOR
|
||||
@ -138,7 +146,7 @@ typedef struct _ND_TABLE_VENDOR
|
||||
typedef struct _ND_TABLE_FEATURE
|
||||
{
|
||||
ND_UINT32 Type;
|
||||
const void *Table[4];
|
||||
const void *Table[8];
|
||||
} ND_TABLE_FEATURE;
|
||||
|
||||
typedef struct _ND_TABLE_DSIZE
|
||||
@ -319,6 +327,7 @@ typedef enum _ND_OPERAND_SIZE_SPEC
|
||||
ND_OPS_t, // Tile register size, can be up to 1K.
|
||||
ND_OPS_384, // 384 bit Key Locker handle.
|
||||
ND_OPS_512, // 512 bit Key Locker handle.
|
||||
ND_OPS_4096, // 4096 bit MSR address/value table, used by RDMSRLIST/WRMSRLIST.
|
||||
// Stack sizes - indicates number of words. Also, hybrid sizes - sizes where from a large register (say 32 bit GPR)
|
||||
// only a smaller amount of data is used (for example, 8 bit).
|
||||
ND_OPS_v2,
|
||||
@ -443,13 +452,15 @@ typedef enum _ND_OPERAND_TYPE_SPEC
|
||||
ND_OPT_SSE_XMM7,
|
||||
|
||||
// Implicit memory operands.
|
||||
ND_OPT_MEM_rAX,
|
||||
ND_OPT_MEM_rCX,
|
||||
ND_OPT_MEM_rBX_AL,
|
||||
ND_OPT_MEM_rDI,
|
||||
ND_OPT_MEM_SHS,
|
||||
ND_OPT_MEM_SHSP,
|
||||
ND_OPT_MEM_rAX, // [rAX]
|
||||
ND_OPT_MEM_rCX, // [rCX]
|
||||
ND_OPT_MEM_rBX_AL, // [rBX + AL]
|
||||
ND_OPT_MEM_rDI, // [rDI]
|
||||
ND_OPT_MEM_SHS, // Shadow stack.
|
||||
ND_OPT_MEM_SHSP, // Shadow stack pointed by the SSP.
|
||||
ND_OPT_MEM_SHS0,
|
||||
ND_OPT_MEM_SMSRT, // Source MSR table, encoded in [RSI].
|
||||
ND_OPT_MEM_DMSRT, // Destination MSR table, encoded in [RDI].
|
||||
|
||||
// Special immediates.
|
||||
ND_OPT_Im2z,
|
||||
|
||||
@ -65,66 +65,77 @@ def test_dir(dir):
|
||||
global total_tests
|
||||
global failed_tests
|
||||
|
||||
for f in glob.glob('%s\\*' % dir):
|
||||
if -1 == f.find('.'):
|
||||
if 0 < f.find('_16'):
|
||||
mod = '-b16'
|
||||
elif 0 < f.find('_32'):
|
||||
mod = '-b32'
|
||||
else:
|
||||
mod = '-b64'
|
||||
if 0 < f.find('_r0'):
|
||||
mod += ' -k'
|
||||
if 0 < f.find('_skip'):
|
||||
mod += ' -skip16'
|
||||
|
||||
print(' * Running test case %s...' % f)
|
||||
os.system('disasm -exi %s -f %s >%s.temp' % (mod, f, f))
|
||||
try:
|
||||
res = open('%s.result' % f).read()
|
||||
except:
|
||||
print(' ! No result file provided for test %s!' % f)
|
||||
|
||||
try:
|
||||
tmp = open('%s.temp' % f).read()
|
||||
except:
|
||||
print(' ! No result produced by test %s!' % f)
|
||||
for f in glob.glob('%s\\*.test' % dir):
|
||||
base, _ = os.path.splitext(f)
|
||||
|
||||
tst_file = f
|
||||
res_file = base + '.result'
|
||||
tmp_file = base + '.temp'
|
||||
|
||||
if 0 < f.find('_16'):
|
||||
mod = '-b16'
|
||||
elif 0 < f.find('_32'):
|
||||
mod = '-b32'
|
||||
else:
|
||||
mod = '-b64'
|
||||
if 0 < f.find('_r0'):
|
||||
mod += ' -k'
|
||||
|
||||
total_tests += 1
|
||||
if not compare_results(res, tmp):
|
||||
print(' **** FAILED! ****')
|
||||
failed_tests += 1
|
||||
else:
|
||||
print(' * Passed.')
|
||||
|
||||
for f in glob.glob('%s\\*_decoded.bin' % dir):
|
||||
os.remove(f)
|
||||
for f in glob.glob('%s\\*.temp' % dir):
|
||||
os.remove(f)
|
||||
if 0 < f.find('_skip'):
|
||||
mod += ' -skip16'
|
||||
|
||||
print(' * Running test case %s...' % f)
|
||||
os.system('disasm -exi %s -f %s >%s' % (mod, tst_file, tmp_file))
|
||||
try:
|
||||
res = open(res_file).read()
|
||||
except:
|
||||
print(' ! No result file provided for test %s!' % tst_file)
|
||||
|
||||
try:
|
||||
tmp = open(tmp_file).read()
|
||||
except:
|
||||
print(' ! No result produced by test %s!' % tst_file)
|
||||
|
||||
total_tests += 1
|
||||
if not compare_results(res, tmp):
|
||||
print(' **** FAILED! ****')
|
||||
failed_tests += 1
|
||||
else:
|
||||
print(' * Passed.')
|
||||
|
||||
# Cleanup.
|
||||
os.remove(tmp_file)
|
||||
|
||||
def regenerate(dir):
|
||||
for f in glob.glob('%s\\*' % dir):
|
||||
if -1 == f.find('.'):
|
||||
if 0 < f.find('_16'):
|
||||
mod = '-b16'
|
||||
elif 0 < f.find('_32'):
|
||||
mod = '-b32'
|
||||
else:
|
||||
mod = '-b64'
|
||||
if 0 < f.find('_r0'):
|
||||
mod += ' -k'
|
||||
if 0 < f.find('_skip'):
|
||||
mod += ' -skip16'
|
||||
for f in glob.glob('%s\\*.test' % dir):
|
||||
base, _ = os.path.splitext(f)
|
||||
|
||||
tst_file = f
|
||||
res_file = base + '.result'
|
||||
|
||||
if 0 < f.find('_16'):
|
||||
mod = '-b16'
|
||||
elif 0 < f.find('_32'):
|
||||
mod = '-b32'
|
||||
else:
|
||||
mod = '-b64'
|
||||
if 0 < f.find('_r0'):
|
||||
mod += ' -k'
|
||||
if 0 < f.find('_skip'):
|
||||
mod += ' -skip16'
|
||||
|
||||
print(' * Regenerating test case %s...' % f)
|
||||
os.system('disasm -exi %s -f %s >%s.result' % (mod, f, f))
|
||||
|
||||
for f in glob.glob('%s\\*_decoded.bin' % dir):
|
||||
os.remove(f)
|
||||
print(' * Regenerating test case %s...' % tst_file)
|
||||
os.system('disasm -exi %s -f %s >%s' % (mod, tst_file, res_file))
|
||||
|
||||
for dn in glob.glob("*"):
|
||||
if not os.path.isdir(dn):
|
||||
continue
|
||||
print('Testing %s...' % dn)
|
||||
test_dir(dn)
|
||||
print("Ran %d tests, %d failed" % (total_tests, failed_tests))
|
||||
if __name__ == "__main__":
|
||||
for dn in glob.glob("x86\\*"):
|
||||
if not os.path.isdir(dn):
|
||||
continue
|
||||
if "regenerate" in sys.argv:
|
||||
print('Regenerating %s...' % dn)
|
||||
regenerate(dn)
|
||||
else:
|
||||
print('Testing %s...' % dn)
|
||||
test_dir(dn)
|
||||
|
||||
print("Ran %d tests, %d failed" % (total_tests, failed_tests))
|
||||
|
||||
@ -21,3 +21,5 @@
|
||||
db 0xc4, 0xe2, 0x78, 0x49, 0xC0 ; TILERELEASE
|
||||
db 0xc4, 0xe2, 0x7b, 0x49, 0xC0 ; TILEZERO tmm0
|
||||
db 0xc4, 0xe2, 0x7b, 0x49, 0xf8 ; TILEZERO tmm7
|
||||
|
||||
db 0xc4, 0xe2, 0x7b, 0x5C, 0xF4 ; TDPFP16PS tmm6, tmm4, tmm0
|
||||
@ -277,3 +277,21 @@
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 1024, RawSize: 1024, Encoding: R, RegType: Tile, RegSize: 1024, RegId: 7, RegCount: 1
|
||||
|
||||
0000000000000062 c4e27b5cf4 TDPFP16PS tmm6, tmm4, tmm0
|
||||
DSIZE: 32, ASIZE: 64, VLEN: -
|
||||
ISA Set: AMX-FP16, Ins cat: AMX, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: eax, bit: 21
|
||||
Exception class: AMX, exception type: AMX-E4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: no, V8086: no, Prot: no, Compat: no, Long: yes
|
||||
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: no, TSX off: yes
|
||||
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: RW, Type: Register, Size: 1024, RawSize: 1024, Encoding: R, RegType: Tile, RegSize: 1024, RegId: 6, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 1024, RawSize: 1024, Encoding: M, RegType: Tile, RegSize: 1024, RegId: 4, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Register, Size: 1024, RawSize: 1024, Encoding: V, RegType: Tile, RegSize: 1024, RegId: 0, RegCount: 1
|
||||
|
||||
Binary file not shown.
@ -11192,8 +11192,8 @@
|
||||
Segment: 3, Base: 3, Index: 6 * 8, Displacement: 0xffffffffffffff00,
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 2, RegCount: 1
|
||||
|
||||
0000000000001037 c5f950c8 VMOVMSKPD ecx, xmm0
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
0000000000001037 c5f950c8 VMOVMSKPD rcx, xmm0
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX, Ins cat: DATAXFER, CET tracked: no
|
||||
CPUID leaf: 0x00000001, reg: ecx, bit: 28
|
||||
Exception class: SSE/VEX, exception type: 7
|
||||
@ -11206,11 +11206,11 @@
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: R, RegType: General Purpose, RegSize: 4, RegId: 1, RegCount: 1
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: R, RegType: General Purpose, RegSize: 8, RegId: 1, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: M, RegType: Vector, RegSize: 16, RegId: 0, RegCount: 1
|
||||
|
||||
000000000000103B c4c17d50cf VMOVMSKPD ecx, ymm15
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 256
|
||||
000000000000103B c4c17d50cf VMOVMSKPD rcx, ymm15
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVX, Ins cat: DATAXFER, CET tracked: no
|
||||
CPUID leaf: 0x00000001, reg: ecx, bit: 28
|
||||
Exception class: SSE/VEX, exception type: 7
|
||||
@ -11223,11 +11223,11 @@
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: R, RegType: General Purpose, RegSize: 4, RegId: 1, RegCount: 1
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: R, RegType: General Purpose, RegSize: 8, RegId: 1, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 32, RawSize: 32, Encoding: M, RegType: Vector, RegSize: 32, RegId: 15, RegCount: 1
|
||||
|
||||
0000000000001040 c5f950c8 VMOVMSKPD ecx, xmm0
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
0000000000001040 c5f950c8 VMOVMSKPD rcx, xmm0
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX, Ins cat: DATAXFER, CET tracked: no
|
||||
CPUID leaf: 0x00000001, reg: ecx, bit: 28
|
||||
Exception class: SSE/VEX, exception type: 7
|
||||
@ -11240,11 +11240,11 @@
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: R, RegType: General Purpose, RegSize: 4, RegId: 1, RegCount: 1
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: R, RegType: General Purpose, RegSize: 8, RegId: 1, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: M, RegType: Vector, RegSize: 16, RegId: 0, RegCount: 1
|
||||
|
||||
0000000000001044 c4c17d50cf VMOVMSKPD ecx, ymm15
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 256
|
||||
0000000000001044 c4c17d50cf VMOVMSKPD rcx, ymm15
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVX, Ins cat: DATAXFER, CET tracked: no
|
||||
CPUID leaf: 0x00000001, reg: ecx, bit: 28
|
||||
Exception class: SSE/VEX, exception type: 7
|
||||
@ -11257,11 +11257,11 @@
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: R, RegType: General Purpose, RegSize: 4, RegId: 1, RegCount: 1
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: R, RegType: General Purpose, RegSize: 8, RegId: 1, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 32, RawSize: 32, Encoding: M, RegType: Vector, RegSize: 32, RegId: 15, RegCount: 1
|
||||
|
||||
0000000000001049 c5f850c8 VMOVMSKPS ecx, xmm0
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
0000000000001049 c5f850c8 VMOVMSKPS rcx, xmm0
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX, Ins cat: DATAXFER, CET tracked: no
|
||||
CPUID leaf: 0x00000001, reg: ecx, bit: 28
|
||||
Exception class: SSE/VEX, exception type: 7
|
||||
@ -11274,11 +11274,11 @@
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: R, RegType: General Purpose, RegSize: 4, RegId: 1, RegCount: 1
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: R, RegType: General Purpose, RegSize: 8, RegId: 1, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: M, RegType: Vector, RegSize: 16, RegId: 0, RegCount: 1
|
||||
|
||||
000000000000104D c4c17c50cf VMOVMSKPS ecx, ymm15
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 256
|
||||
000000000000104D c4c17c50cf VMOVMSKPS rcx, ymm15
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVX, Ins cat: DATAXFER, CET tracked: no
|
||||
CPUID leaf: 0x00000001, reg: ecx, bit: 28
|
||||
Exception class: SSE/VEX, exception type: 7
|
||||
@ -11291,11 +11291,11 @@
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: R, RegType: General Purpose, RegSize: 4, RegId: 1, RegCount: 1
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: R, RegType: General Purpose, RegSize: 8, RegId: 1, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 32, RawSize: 32, Encoding: M, RegType: Vector, RegSize: 32, RegId: 15, RegCount: 1
|
||||
|
||||
0000000000001052 c5f850c8 VMOVMSKPS ecx, xmm0
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
0000000000001052 c5f850c8 VMOVMSKPS rcx, xmm0
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX, Ins cat: DATAXFER, CET tracked: no
|
||||
CPUID leaf: 0x00000001, reg: ecx, bit: 28
|
||||
Exception class: SSE/VEX, exception type: 7
|
||||
@ -11308,11 +11308,11 @@
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: R, RegType: General Purpose, RegSize: 4, RegId: 1, RegCount: 1
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: R, RegType: General Purpose, RegSize: 8, RegId: 1, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: M, RegType: Vector, RegSize: 16, RegId: 0, RegCount: 1
|
||||
|
||||
0000000000001056 c4c17c50cf VMOVMSKPS ecx, ymm15
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 256
|
||||
0000000000001056 c4c17c50cf VMOVMSKPS rcx, ymm15
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVX, Ins cat: DATAXFER, CET tracked: no
|
||||
CPUID leaf: 0x00000001, reg: ecx, bit: 28
|
||||
Exception class: SSE/VEX, exception type: 7
|
||||
@ -11325,7 +11325,7 @@
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: R, RegType: General Purpose, RegSize: 4, RegId: 1, RegCount: 1
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: R, RegType: General Purpose, RegSize: 8, RegId: 1, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 32, RawSize: 32, Encoding: M, RegType: Vector, RegSize: 32, RegId: 15, RegCount: 1
|
||||
|
||||
000000000000105B c5f9e713 VMOVNTDQ xmmword ptr [rbx], xmm2
|
||||
@ -21726,8 +21726,8 @@
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 2, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Immediate, Size: 1, RawSize: 1, Encoding: I
|
||||
|
||||
0000000000001F3E 62f37d0814d190 VPEXTRB ecx, xmm2, 0x90
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
0000000000001F3E 62f37d0814d190 VPEXTRB rcx, xmm2, 0x90
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512BW, Ins cat: AVX512, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 30
|
||||
EVEX Tuple Type: Tuple 1 scalar, 8 bit
|
||||
@ -21741,12 +21741,12 @@
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: M, RegType: General Purpose, RegSize: 4, RegId: 1, RegCount: 1
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: M, RegType: General Purpose, RegSize: 8, RegId: 1, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 2, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Immediate, Size: 1, RawSize: 1, Encoding: I
|
||||
|
||||
0000000000001F45 62f37d0814d190 VPEXTRB ecx, xmm2, 0x90
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
0000000000001F45 62f37d0814d190 VPEXTRB rcx, xmm2, 0x90
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512BW, Ins cat: AVX512, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 30
|
||||
EVEX Tuple Type: Tuple 1 scalar, 8 bit
|
||||
@ -21760,12 +21760,12 @@
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: M, RegType: General Purpose, RegSize: 4, RegId: 1, RegCount: 1
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: M, RegType: General Purpose, RegSize: 8, RegId: 1, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 2, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Immediate, Size: 1, RawSize: 1, Encoding: I
|
||||
|
||||
0000000000001F4C c4e37914d190 VPEXTRB ecx, xmm2, 0x90
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
0000000000001F4C c4e37914d190 VPEXTRB rcx, xmm2, 0x90
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX, Ins cat: AVX, CET tracked: no
|
||||
CPUID leaf: 0x00000001, reg: ecx, bit: 28
|
||||
Exception class: SSE/VEX, exception type: 5
|
||||
@ -21778,12 +21778,12 @@
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: M, RegType: General Purpose, RegSize: 4, RegId: 1, RegCount: 1
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: M, RegType: General Purpose, RegSize: 8, RegId: 1, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 2, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Immediate, Size: 1, RawSize: 1, Encoding: I
|
||||
|
||||
0000000000001F52 c4e37914d190 VPEXTRB ecx, xmm2, 0x90
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
0000000000001F52 c4e37914d190 VPEXTRB rcx, xmm2, 0x90
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX, Ins cat: AVX, CET tracked: no
|
||||
CPUID leaf: 0x00000001, reg: ecx, bit: 28
|
||||
Exception class: SSE/VEX, exception type: 5
|
||||
@ -21796,12 +21796,12 @@
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: M, RegType: General Purpose, RegSize: 4, RegId: 1, RegCount: 1
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: M, RegType: General Purpose, RegSize: 8, RegId: 1, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 2, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Immediate, Size: 1, RawSize: 1, Encoding: I
|
||||
|
||||
0000000000001F58 c4e37916d190 VPEXTRD ecx, xmm2, 0x90
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
0000000000001F58 c4e37916d190 VPEXTRD rcx, xmm2, 0x90
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX, Ins cat: AVX, CET tracked: no
|
||||
CPUID leaf: 0x00000001, reg: ecx, bit: 28
|
||||
Exception class: SSE/VEX, exception type: 5
|
||||
@ -21814,12 +21814,12 @@
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: M, RegType: General Purpose, RegSize: 4, RegId: 1, RegCount: 1
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: M, RegType: General Purpose, RegSize: 8, RegId: 1, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 2, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Immediate, Size: 1, RawSize: 1, Encoding: I
|
||||
|
||||
0000000000001F5E c4e37916d190 VPEXTRD ecx, xmm2, 0x90
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
0000000000001F5E c4e37916d190 VPEXTRD rcx, xmm2, 0x90
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX, Ins cat: AVX, CET tracked: no
|
||||
CPUID leaf: 0x00000001, reg: ecx, bit: 28
|
||||
Exception class: SSE/VEX, exception type: 5
|
||||
@ -21832,7 +21832,7 @@
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: M, RegType: General Purpose, RegSize: 4, RegId: 1, RegCount: 1
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: M, RegType: General Purpose, RegSize: 8, RegId: 1, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 2, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Immediate, Size: 1, RawSize: 1, Encoding: I
|
||||
|
||||
@ -21930,8 +21930,8 @@
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 2, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Immediate, Size: 1, RawSize: 1, Encoding: I
|
||||
|
||||
0000000000001F8C 62f37d0815c190 VPEXTRW ecx, xmm0, 0x90
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
0000000000001F8C 62f37d0815c190 VPEXTRW rcx, xmm0, 0x90
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512BW, Ins cat: AVX512, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 30
|
||||
EVEX Tuple Type: Tuple 1 scalar, 16 bit
|
||||
@ -21945,12 +21945,12 @@
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: M, RegType: General Purpose, RegSize: 4, RegId: 1, RegCount: 1
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: M, RegType: General Purpose, RegSize: 8, RegId: 1, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 0, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Immediate, Size: 1, RawSize: 1, Encoding: I
|
||||
|
||||
0000000000001F93 c5f9c5c890 VPEXTRW ecx, xmm0, 0x90
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
0000000000001F93 c5f9c5c890 VPEXTRW rcx, xmm0, 0x90
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX, Ins cat: AVX, CET tracked: no
|
||||
CPUID leaf: 0x00000001, reg: ecx, bit: 28
|
||||
Exception class: SSE/VEX, exception type: 5
|
||||
@ -21963,12 +21963,12 @@
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: R, RegType: General Purpose, RegSize: 4, RegId: 1, RegCount: 1
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: R, RegType: General Purpose, RegSize: 8, RegId: 1, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: M, RegType: Vector, RegSize: 16, RegId: 0, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Immediate, Size: 1, RawSize: 1, Encoding: I
|
||||
|
||||
0000000000001F98 c5f9c5c890 VPEXTRW ecx, xmm0, 0x90
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
0000000000001F98 c5f9c5c890 VPEXTRW rcx, xmm0, 0x90
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX, Ins cat: AVX, CET tracked: no
|
||||
CPUID leaf: 0x00000001, reg: ecx, bit: 28
|
||||
Exception class: SSE/VEX, exception type: 5
|
||||
@ -21981,7 +21981,7 @@
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: R, RegType: General Purpose, RegSize: 4, RegId: 1, RegCount: 1
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: R, RegType: General Purpose, RegSize: 8, RegId: 1, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: M, RegType: Vector, RegSize: 16, RegId: 0, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Immediate, Size: 1, RawSize: 1, Encoding: I
|
||||
|
||||
@ -22042,8 +22042,8 @@
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 2, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Immediate, Size: 1, RawSize: 1, Encoding: I
|
||||
|
||||
0000000000001FB9 62f37d0815d190 VPEXTRW ecx, xmm2, 0x90
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
0000000000001FB9 62f37d0815d190 VPEXTRW rcx, xmm2, 0x90
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512BW, Ins cat: AVX512, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 30
|
||||
EVEX Tuple Type: Tuple 1 scalar, 16 bit
|
||||
@ -22057,12 +22057,12 @@
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: M, RegType: General Purpose, RegSize: 4, RegId: 1, RegCount: 1
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: M, RegType: General Purpose, RegSize: 8, RegId: 1, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 2, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Immediate, Size: 1, RawSize: 1, Encoding: I
|
||||
|
||||
0000000000001FC0 c5f9c5ca90 VPEXTRW ecx, xmm2, 0x90
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
0000000000001FC0 c5f9c5ca90 VPEXTRW rcx, xmm2, 0x90
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX, Ins cat: AVX, CET tracked: no
|
||||
CPUID leaf: 0x00000001, reg: ecx, bit: 28
|
||||
Exception class: SSE/VEX, exception type: 5
|
||||
@ -22075,12 +22075,12 @@
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: R, RegType: General Purpose, RegSize: 4, RegId: 1, RegCount: 1
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: R, RegType: General Purpose, RegSize: 8, RegId: 1, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: M, RegType: Vector, RegSize: 16, RegId: 2, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Immediate, Size: 1, RawSize: 1, Encoding: I
|
||||
|
||||
0000000000001FC5 c5f9c5ca90 VPEXTRW ecx, xmm2, 0x90
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
0000000000001FC5 c5f9c5ca90 VPEXTRW rcx, xmm2, 0x90
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX, Ins cat: AVX, CET tracked: no
|
||||
CPUID leaf: 0x00000001, reg: ecx, bit: 28
|
||||
Exception class: SSE/VEX, exception type: 5
|
||||
@ -22093,7 +22093,7 @@
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: R, RegType: General Purpose, RegSize: 4, RegId: 1, RegCount: 1
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: R, RegType: General Purpose, RegSize: 8, RegId: 1, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: M, RegType: Vector, RegSize: 16, RegId: 2, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Immediate, Size: 1, RawSize: 1, Encoding: I
|
||||
|
||||
@ -26306,8 +26306,8 @@
|
||||
Operand: 3, Acc: R-, Type: Memory, Size: 64, RawSize: 64, Encoding: M, Compressed displacement: yes,
|
||||
Segment: 3, Base: 3, Index: 11 * 8, Displacement: 0xfffffffffffffffc,
|
||||
|
||||
00000000000025BF c5f9d7c8 VPMOVMSKB ecx, xmm0
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
00000000000025BF c5f9d7c8 VPMOVMSKB rcx, xmm0
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX, Ins cat: DATAXFER, CET tracked: no
|
||||
CPUID leaf: 0x00000001, reg: ecx, bit: 28
|
||||
Exception class: SSE/VEX, exception type: 7
|
||||
@ -26320,11 +26320,11 @@
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: R, RegType: General Purpose, RegSize: 4, RegId: 1, RegCount: 1
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: R, RegType: General Purpose, RegSize: 8, RegId: 1, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: M, RegType: Vector, RegSize: 16, RegId: 0, RegCount: 1
|
||||
|
||||
00000000000025C3 c4c17dd7cf VPMOVMSKB ecx, ymm15
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 256
|
||||
00000000000025C3 c4c17dd7cf VPMOVMSKB rcx, ymm15
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVX, Ins cat: DATAXFER, CET tracked: no
|
||||
CPUID leaf: 0x00000001, reg: ecx, bit: 28
|
||||
Exception class: SSE/VEX, exception type: 7
|
||||
@ -26337,11 +26337,11 @@
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: R, RegType: General Purpose, RegSize: 4, RegId: 1, RegCount: 1
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: R, RegType: General Purpose, RegSize: 8, RegId: 1, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 32, RawSize: 32, Encoding: M, RegType: Vector, RegSize: 32, RegId: 15, RegCount: 1
|
||||
|
||||
00000000000025C8 c5f9d7c8 VPMOVMSKB ecx, xmm0
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
00000000000025C8 c5f9d7c8 VPMOVMSKB rcx, xmm0
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX, Ins cat: DATAXFER, CET tracked: no
|
||||
CPUID leaf: 0x00000001, reg: ecx, bit: 28
|
||||
Exception class: SSE/VEX, exception type: 7
|
||||
@ -26354,11 +26354,11 @@
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: R, RegType: General Purpose, RegSize: 4, RegId: 1, RegCount: 1
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: R, RegType: General Purpose, RegSize: 8, RegId: 1, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: M, RegType: Vector, RegSize: 16, RegId: 0, RegCount: 1
|
||||
|
||||
00000000000025CC c4c17dd7cf VPMOVMSKB ecx, ymm15
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 256
|
||||
00000000000025CC c4c17dd7cf VPMOVMSKB rcx, ymm15
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVX, Ins cat: DATAXFER, CET tracked: no
|
||||
CPUID leaf: 0x00000001, reg: ecx, bit: 28
|
||||
Exception class: SSE/VEX, exception type: 7
|
||||
@ -26371,7 +26371,7 @@
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: R, RegType: General Purpose, RegSize: 4, RegId: 1, RegCount: 1
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: R, RegType: General Purpose, RegSize: 8, RegId: 1, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 32, RawSize: 32, Encoding: M, RegType: Vector, RegSize: 32, RegId: 15, RegCount: 1
|
||||
|
||||
00000000000025D1 c4e27921d0 VPMOVSXBD xmm2, xmm0
|
||||
11
bddisasm_test/x86/avx/avxifma_64.asm
Normal file
11
bddisasm_test/x86/avx/avxifma_64.asm
Normal file
@ -0,0 +1,11 @@
|
||||
bits 64
|
||||
|
||||
db 0xc4, 0xa2, 0xc1, 0xb4, 0xc0 ; VPMADD52LUQ xmm0, xmm7, xmm0
|
||||
db 0xc4, 0xa2, 0xc1, 0xb4, 0x00 ; VPMADD52LUQ xmm0, xmm7, xmmword ptr [rax]
|
||||
db 0xc4, 0xa2, 0xc5, 0xb4, 0xc0 ; VPMADD52LUQ ymm0, ymm7, ymm0
|
||||
db 0xc4, 0xa2, 0xc5, 0xb4, 0x00 ; VPMADD52LUQ ymm0, ymm7, ymmword ptr [rax]
|
||||
|
||||
db 0xc4, 0xa2, 0xc1, 0xb5, 0xc0 ; VPMADD52HUQ xmm0, xmm7, xmm0
|
||||
db 0xc4, 0xa2, 0xc1, 0xb5, 0x00 ; VPMADD52HUQ xmm0, xmm7, xmmword ptr [rax]
|
||||
db 0xc4, 0xa2, 0xc5, 0xb5, 0xc0 ; VPMADD52HUQ ymm0, ymm7, ymm0
|
||||
db 0xc4, 0xa2, 0xc5, 0xb5, 0x00 ; VPMADD52HUQ ymm0, ymm7, ymmword ptr [rax]
|
||||
148
bddisasm_test/x86/avx/avxifma_64.result
Normal file
148
bddisasm_test/x86/avx/avxifma_64.result
Normal file
@ -0,0 +1,148 @@
|
||||
0000000000000000 c4a2c1b4c0 VPMADD52LUQ xmm0, xmm7, xmm0
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVXIFMA, Ins cat: AVXIFMA, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: eax, bit: 23
|
||||
Exception class: SSE/VEX, exception type: 4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
|
||||
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
|
||||
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: RW, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 0, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: V, RegType: Vector, RegSize: 16, RegId: 7, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: M, RegType: Vector, RegSize: 16, RegId: 0, RegCount: 1
|
||||
|
||||
0000000000000005 c4a2c1b400 VPMADD52LUQ xmm0, xmm7, xmmword ptr [rax]
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVXIFMA, Ins cat: AVXIFMA, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: eax, bit: 23
|
||||
Exception class: SSE/VEX, exception type: 4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
|
||||
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
|
||||
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: RW, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 0, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: V, RegType: Vector, RegSize: 16, RegId: 7, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Memory, Size: 16, RawSize: 16, Encoding: M,
|
||||
Segment: 3, Base: 0,
|
||||
|
||||
000000000000000A c4a2c5b4c0 VPMADD52LUQ ymm0, ymm7, ymm0
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVXIFMA, Ins cat: AVXIFMA, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: eax, bit: 23
|
||||
Exception class: SSE/VEX, exception type: 4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
|
||||
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
|
||||
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: RW, Type: Register, Size: 32, RawSize: 32, Encoding: R, RegType: Vector, RegSize: 32, RegId: 0, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 32, RawSize: 32, Encoding: V, RegType: Vector, RegSize: 32, RegId: 7, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Register, Size: 32, RawSize: 32, Encoding: M, RegType: Vector, RegSize: 32, RegId: 0, RegCount: 1
|
||||
|
||||
000000000000000F c4a2c5b400 VPMADD52LUQ ymm0, ymm7, ymmword ptr [rax]
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVXIFMA, Ins cat: AVXIFMA, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: eax, bit: 23
|
||||
Exception class: SSE/VEX, exception type: 4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
|
||||
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
|
||||
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: RW, Type: Register, Size: 32, RawSize: 32, Encoding: R, RegType: Vector, RegSize: 32, RegId: 0, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 32, RawSize: 32, Encoding: V, RegType: Vector, RegSize: 32, RegId: 7, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Memory, Size: 32, RawSize: 32, Encoding: M,
|
||||
Segment: 3, Base: 0,
|
||||
|
||||
0000000000000014 c4a2c1b5c0 VPMADD52HUQ xmm0, xmm7, xmm0
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVXIFMA, Ins cat: AVXIFMA, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: eax, bit: 23
|
||||
Exception class: SSE/VEX, exception type: 4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
|
||||
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
|
||||
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: RW, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 0, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: V, RegType: Vector, RegSize: 16, RegId: 7, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: M, RegType: Vector, RegSize: 16, RegId: 0, RegCount: 1
|
||||
|
||||
0000000000000019 c4a2c1b500 VPMADD52HUQ xmm0, xmm7, xmmword ptr [rax]
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVXIFMA, Ins cat: AVXIFMA, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: eax, bit: 23
|
||||
Exception class: SSE/VEX, exception type: 4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
|
||||
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
|
||||
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: RW, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 0, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: V, RegType: Vector, RegSize: 16, RegId: 7, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Memory, Size: 16, RawSize: 16, Encoding: M,
|
||||
Segment: 3, Base: 0,
|
||||
|
||||
000000000000001E c4a2c5b5c0 VPMADD52HUQ ymm0, ymm7, ymm0
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVXIFMA, Ins cat: AVXIFMA, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: eax, bit: 23
|
||||
Exception class: SSE/VEX, exception type: 4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
|
||||
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
|
||||
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: RW, Type: Register, Size: 32, RawSize: 32, Encoding: R, RegType: Vector, RegSize: 32, RegId: 0, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 32, RawSize: 32, Encoding: V, RegType: Vector, RegSize: 32, RegId: 7, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Register, Size: 32, RawSize: 32, Encoding: M, RegType: Vector, RegSize: 32, RegId: 0, RegCount: 1
|
||||
|
||||
0000000000000023 c4a2c5b500 VPMADD52HUQ ymm0, ymm7, ymmword ptr [rax]
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVXIFMA, Ins cat: AVXIFMA, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: eax, bit: 23
|
||||
Exception class: SSE/VEX, exception type: 4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
|
||||
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
|
||||
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: RW, Type: Register, Size: 32, RawSize: 32, Encoding: R, RegType: Vector, RegSize: 32, RegId: 0, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 32, RawSize: 32, Encoding: V, RegType: Vector, RegSize: 32, RegId: 7, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Memory, Size: 32, RawSize: 32, Encoding: M,
|
||||
Segment: 3, Base: 0,
|
||||
|
||||
BIN
bddisasm_test/x86/avx/avxifma_64.test
Normal file
BIN
bddisasm_test/x86/avx/avxifma_64.test
Normal file
Binary file not shown.
20
bddisasm_test/x86/avx/avxneconvert_64.asm
Normal file
20
bddisasm_test/x86/avx/avxneconvert_64.asm
Normal file
@ -0,0 +1,20 @@
|
||||
bits 64
|
||||
|
||||
db 0xc4, 0xe2, 0x7a, 0xb1, 0x00 ; VBCSTNEBF162PS xmm0, word [rax]
|
||||
db 0xc4, 0xe2, 0x7e, 0xb1, 0x00 ; VBCSTNEBF162PS ymm0, word [rax]
|
||||
db 0xc4, 0xe2, 0x79, 0xb1, 0x00 ; VBCSTNESH2PS xmm0, word [rax]
|
||||
db 0xc4, 0xe2, 0x7d, 0xb1, 0x00 ; VBCSTNESH2PS ymm0, word [rax]
|
||||
db 0xc4, 0xe2, 0x7a, 0xb0, 0x00 ; VCVTNEEBF162PS xmm0, xmmword [rax]
|
||||
db 0xc4, 0xe2, 0x7e, 0xb0, 0x00 ; VCVTNEEBF162PS ymm0, ymmword [rax]
|
||||
db 0xc4, 0xe2, 0x79, 0xb0, 0x00 ; VCVTNEEPH2PS xmm0, xmmword [rax]
|
||||
db 0xc4, 0xe2, 0x7d, 0xb0, 0x00 ; VCVTNEEPH2PS ymm0, ymmword [rax]
|
||||
db 0xc4, 0xe2, 0x7b, 0xb0, 0x00 ; VCVTNEOBF162PS xmm0, xmmword [rax]
|
||||
db 0xc4, 0xe2, 0x7f, 0xb0, 0x00 ; VCVTNEOBF162PS ymm0, ymmword [rax]
|
||||
db 0xc4, 0xe2, 0x78, 0xb0, 0x00 ; VCVTNEOPH2PS xmm0, xmmword [rax]
|
||||
db 0xc4, 0xe2, 0x7c, 0xb0, 0x00 ; VCVTNEOPH2PS ymm0, ymmword [rax]
|
||||
|
||||
db 0xc4, 0xe2, 0x7a, 0x72, 0xC1 ; VCVTNEPS2BF16 xmm0, xmm1
|
||||
db 0xc4, 0xe2, 0x7e, 0x72, 0xC1 ; VCVTNEPS2BF16 ymm0, ymm1
|
||||
db 0xc4, 0xe2, 0x7a, 0x72, 0x00 ; VCVTNEPS2BF16 xmm0, [rax]
|
||||
db 0xc4, 0xe2, 0x7e, 0x72, 0x00 ; VCVTNEPS2BF16 ymm0, [rax]
|
||||
|
||||
286
bddisasm_test/x86/avx/avxneconvert_64.result
Normal file
286
bddisasm_test/x86/avx/avxneconvert_64.result
Normal file
@ -0,0 +1,286 @@
|
||||
0000000000000000 c4e27ab100 VBCSTNEBF162PS xmm0, word ptr [rax]
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVXNECONVERT, Ins cat: AVXNECONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: edx, bit: 5
|
||||
Exception class: SSE/VEX, exception type: 5
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
|
||||
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
|
||||
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 0, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Memory, Size: 2, RawSize: 2, Encoding: M,
|
||||
Segment: 3, Base: 0,
|
||||
|
||||
0000000000000005 c4e27eb100 VBCSTNEBF162PS ymm0, word ptr [rax]
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVXNECONVERT, Ins cat: AVXNECONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: edx, bit: 5
|
||||
Exception class: SSE/VEX, exception type: 5
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
|
||||
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
|
||||
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 32, RawSize: 32, Encoding: R, RegType: Vector, RegSize: 32, RegId: 0, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Memory, Size: 2, RawSize: 2, Encoding: M,
|
||||
Segment: 3, Base: 0,
|
||||
|
||||
000000000000000A c4e279b100 VBCSTNESH2PS xmm0, word ptr [rax]
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVXNECONVERT, Ins cat: AVXNECONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: edx, bit: 5
|
||||
Exception class: SSE/VEX, exception type: 5
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
|
||||
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
|
||||
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 0, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Memory, Size: 2, RawSize: 2, Encoding: M,
|
||||
Segment: 3, Base: 0,
|
||||
|
||||
000000000000000F c4e27db100 VBCSTNESH2PS ymm0, word ptr [rax]
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVXNECONVERT, Ins cat: AVXNECONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: edx, bit: 5
|
||||
Exception class: SSE/VEX, exception type: 5
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
|
||||
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
|
||||
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 32, RawSize: 32, Encoding: R, RegType: Vector, RegSize: 32, RegId: 0, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Memory, Size: 2, RawSize: 2, Encoding: M,
|
||||
Segment: 3, Base: 0,
|
||||
|
||||
0000000000000014 c4e27ab000 VCVTNEEBF162PS xmm0, xmmword ptr [rax]
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVXNECONVERT, Ins cat: AVXNECONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: edx, bit: 5
|
||||
Exception class: SSE/VEX, exception type: 4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
|
||||
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
|
||||
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 0, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Memory, Size: 16, RawSize: 16, Encoding: M,
|
||||
Segment: 3, Base: 0,
|
||||
|
||||
0000000000000019 c4e27eb000 VCVTNEEBF162PS ymm0, ymmword ptr [rax]
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVXNECONVERT, Ins cat: AVXNECONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: edx, bit: 5
|
||||
Exception class: SSE/VEX, exception type: 4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
|
||||
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
|
||||
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 32, RawSize: 32, Encoding: R, RegType: Vector, RegSize: 32, RegId: 0, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Memory, Size: 32, RawSize: 32, Encoding: M,
|
||||
Segment: 3, Base: 0,
|
||||
|
||||
000000000000001E c4e279b000 VCVTNEEPH2PS xmm0, xmmword ptr [rax]
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVXNECONVERT, Ins cat: AVXNECONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: edx, bit: 5
|
||||
Exception class: SSE/VEX, exception type: 4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
|
||||
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
|
||||
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 0, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Memory, Size: 16, RawSize: 16, Encoding: M,
|
||||
Segment: 3, Base: 0,
|
||||
|
||||
0000000000000023 c4e27db000 VCVTNEEPH2PS ymm0, ymmword ptr [rax]
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVXNECONVERT, Ins cat: AVXNECONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: edx, bit: 5
|
||||
Exception class: SSE/VEX, exception type: 4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
|
||||
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
|
||||
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 32, RawSize: 32, Encoding: R, RegType: Vector, RegSize: 32, RegId: 0, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Memory, Size: 32, RawSize: 32, Encoding: M,
|
||||
Segment: 3, Base: 0,
|
||||
|
||||
0000000000000028 c4e27bb000 VCVTNEOBF162PS xmm0, xmmword ptr [rax]
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVXNECONVERT, Ins cat: AVXNECONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: edx, bit: 5
|
||||
Exception class: SSE/VEX, exception type: 4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
|
||||
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
|
||||
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 0, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Memory, Size: 16, RawSize: 16, Encoding: M,
|
||||
Segment: 3, Base: 0,
|
||||
|
||||
000000000000002D c4e27fb000 VCVTNEOBF162PS ymm0, ymmword ptr [rax]
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVXNECONVERT, Ins cat: AVXNECONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: edx, bit: 5
|
||||
Exception class: SSE/VEX, exception type: 4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
|
||||
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
|
||||
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 32, RawSize: 32, Encoding: R, RegType: Vector, RegSize: 32, RegId: 0, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Memory, Size: 32, RawSize: 32, Encoding: M,
|
||||
Segment: 3, Base: 0,
|
||||
|
||||
0000000000000032 c4e278b000 VCVTNEOPH2PS xmm0, xmmword ptr [rax]
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVXNECONVERT, Ins cat: AVXNECONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: edx, bit: 5
|
||||
Exception class: SSE/VEX, exception type: 4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
|
||||
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
|
||||
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 0, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Memory, Size: 16, RawSize: 16, Encoding: M,
|
||||
Segment: 3, Base: 0,
|
||||
|
||||
0000000000000037 c4e27cb000 VCVTNEOPH2PS ymm0, ymmword ptr [rax]
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVXNECONVERT, Ins cat: AVXNECONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: edx, bit: 5
|
||||
Exception class: SSE/VEX, exception type: 4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
|
||||
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
|
||||
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 32, RawSize: 32, Encoding: R, RegType: Vector, RegSize: 32, RegId: 0, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Memory, Size: 32, RawSize: 32, Encoding: M,
|
||||
Segment: 3, Base: 0,
|
||||
|
||||
000000000000003C c4e27a72c1 VCVTNEPS2BF16 xmm0, xmm1
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVXNECONVERT, Ins cat: AVXNECONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: edx, bit: 5
|
||||
Exception class: SSE/VEX, exception type: 4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
|
||||
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
|
||||
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 0, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: M, RegType: Vector, RegSize: 16, RegId: 1, RegCount: 1
|
||||
|
||||
0000000000000041 c4e27e72c1 VCVTNEPS2BF16 ymm0, ymm1
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVXNECONVERT, Ins cat: AVXNECONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: edx, bit: 5
|
||||
Exception class: SSE/VEX, exception type: 4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
|
||||
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
|
||||
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 32, RawSize: 32, Encoding: R, RegType: Vector, RegSize: 32, RegId: 0, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 32, RawSize: 32, Encoding: M, RegType: Vector, RegSize: 32, RegId: 1, RegCount: 1
|
||||
|
||||
0000000000000046 c4e27a7200 VCVTNEPS2BF16 xmm0, xmmword ptr [rax]
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVXNECONVERT, Ins cat: AVXNECONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: edx, bit: 5
|
||||
Exception class: SSE/VEX, exception type: 4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
|
||||
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
|
||||
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 0, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Memory, Size: 16, RawSize: 16, Encoding: M,
|
||||
Segment: 3, Base: 0,
|
||||
|
||||
000000000000004B c4e27e7200 VCVTNEPS2BF16 ymm0, ymmword ptr [rax]
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVXNECONVERT, Ins cat: AVXNECONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: edx, bit: 5
|
||||
Exception class: SSE/VEX, exception type: 4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
|
||||
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
|
||||
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 32, RawSize: 32, Encoding: R, RegType: Vector, RegSize: 32, RegId: 0, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Memory, Size: 32, RawSize: 32, Encoding: M,
|
||||
Segment: 3, Base: 0,
|
||||
|
||||
BIN
bddisasm_test/x86/avx/avxneconvert_64.test
Normal file
BIN
bddisasm_test/x86/avx/avxneconvert_64.test
Normal file
Binary file not shown.
31
bddisasm_test/x86/avx/avxvnniint8_64.asm
Normal file
31
bddisasm_test/x86/avx/avxvnniint8_64.asm
Normal file
@ -0,0 +1,31 @@
|
||||
bits 64
|
||||
|
||||
db 0xc4, 0x22, 0x28, 0x50, 0xC4 ; VPDPBUUD xmm8, xmm10, xmm4
|
||||
db 0xc4, 0x22, 0x28, 0x50, 0x00 ; VPDPBUUD xmm8, xmm10, xmmword ptr [rax]
|
||||
db 0xc4, 0x22, 0x2c, 0x50, 0xC4 ; VPDPBUUD ymm8, ymm10, ymm4
|
||||
db 0xc4, 0x22, 0x2c, 0x50, 0x00 ; VPDPBUUD ymm8, ymm10, ymmword ptr [rax]
|
||||
|
||||
db 0xc4, 0x22, 0x28, 0x51, 0xC4 ; VPDPBUUDS xmm8, xmm10, xmm4
|
||||
db 0xc4, 0x22, 0x28, 0x51, 0x00 ; VPDPBUUDS xmm8, xmm10, xmmword ptr [rax]
|
||||
db 0xc4, 0x22, 0x2c, 0x51, 0xC4 ; VPDPBUUDS ymm8, ymm10, ymm4
|
||||
db 0xc4, 0x22, 0x2c, 0x51, 0x00 ; VPDPBUUDS ymm8, ymm10, ymmword ptr [rax]
|
||||
|
||||
db 0xc4, 0x22, 0x2a, 0x50, 0xC4 ; VPDPBSUD xmm8, xmm10, xmm4
|
||||
db 0xc4, 0x22, 0x2a, 0x50, 0x00 ; VPDPBSUD xmm8, xmm10, xmmword ptr [rax]
|
||||
db 0xc4, 0x22, 0x2e, 0x50, 0xC4 ; VPDPBSUD ymm8, ymm10, ymm4
|
||||
db 0xc4, 0x22, 0x2e, 0x50, 0x00 ; VPDPBSUD ymm8, ymm10, ymmword ptr [rax]
|
||||
|
||||
db 0xc4, 0x22, 0x2a, 0x51, 0xC4 ; VPDPBSUDS xmm8, xmm10, xmm4
|
||||
db 0xc4, 0x22, 0x2a, 0x51, 0x00 ; VPDPBSUDS xmm8, xmm10, xmmword ptr [rax]
|
||||
db 0xc4, 0x22, 0x2e, 0x51, 0xC4 ; VPDPBSUDS ymm8, ymm10, ymm4
|
||||
db 0xc4, 0x22, 0x2e, 0x51, 0x00 ; VPDPBSUDS ymm8, ymm10, ymmword ptr [rax]
|
||||
|
||||
db 0xc4, 0x22, 0x2b, 0x50, 0xC4 ; VPDPBSSD xmm8, xmm10, xmm4
|
||||
db 0xc4, 0x22, 0x2b, 0x50, 0x00 ; VPDPBSSD xmm8, xmm10, xmmword ptr [rax]
|
||||
db 0xc4, 0x22, 0x2f, 0x50, 0xC4 ; VPDPBSSD ymm8, ymm10, ymm4
|
||||
db 0xc4, 0x22, 0x2f, 0x50, 0x00 ; VPDPBSSD ymm8, ymm10, ymmword ptr [rax]
|
||||
|
||||
db 0xc4, 0x22, 0x2b, 0x51, 0xC4 ; VPDPBSSDS xmm8, xmm10, xmm4
|
||||
db 0xc4, 0x22, 0x2b, 0x51, 0x00 ; VPDPBSSDS xmm8, xmm10, xmmword ptr [rax]
|
||||
db 0xc4, 0x22, 0x2f, 0x51, 0xC4 ; VPDPBSSDS ymm8, ymm10, ymm4
|
||||
db 0xc4, 0x22, 0x2f, 0x51, 0x00 ; VPDPBSSDS ymm8, ymm10, ymmword ptr [rax]
|
||||
444
bddisasm_test/x86/avx/avxvnniint8_64.result
Normal file
444
bddisasm_test/x86/avx/avxvnniint8_64.result
Normal file
@ -0,0 +1,444 @@
|
||||
0000000000000000 c4222850c4 VPDPBUUD xmm8, xmm10, xmm4
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVXVNNIINT8, Ins cat: AVXVNNIINT8, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: edx, bit: 4
|
||||
Exception class: SSE/VEX, exception type: 4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
|
||||
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
|
||||
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: RW, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 8, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: V, RegType: Vector, RegSize: 16, RegId: 10, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: M, RegType: Vector, RegSize: 16, RegId: 4, RegCount: 1
|
||||
|
||||
0000000000000005 c422285000 VPDPBUUD xmm8, xmm10, xmmword ptr [rax]
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVXVNNIINT8, Ins cat: AVXVNNIINT8, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: edx, bit: 4
|
||||
Exception class: SSE/VEX, exception type: 4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
|
||||
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
|
||||
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: RW, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 8, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: V, RegType: Vector, RegSize: 16, RegId: 10, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Memory, Size: 16, RawSize: 16, Encoding: M,
|
||||
Segment: 3, Base: 0,
|
||||
|
||||
000000000000000A c4222c50c4 VPDPBUUD ymm8, ymm10, ymm4
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVXVNNIINT8, Ins cat: AVXVNNIINT8, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: edx, bit: 4
|
||||
Exception class: SSE/VEX, exception type: 4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
|
||||
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
|
||||
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: RW, Type: Register, Size: 32, RawSize: 32, Encoding: R, RegType: Vector, RegSize: 32, RegId: 8, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 32, RawSize: 32, Encoding: V, RegType: Vector, RegSize: 32, RegId: 10, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Register, Size: 32, RawSize: 32, Encoding: M, RegType: Vector, RegSize: 32, RegId: 4, RegCount: 1
|
||||
|
||||
000000000000000F c4222c5000 VPDPBUUD ymm8, ymm10, ymmword ptr [rax]
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVXVNNIINT8, Ins cat: AVXVNNIINT8, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: edx, bit: 4
|
||||
Exception class: SSE/VEX, exception type: 4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
|
||||
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
|
||||
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: RW, Type: Register, Size: 32, RawSize: 32, Encoding: R, RegType: Vector, RegSize: 32, RegId: 8, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 32, RawSize: 32, Encoding: V, RegType: Vector, RegSize: 32, RegId: 10, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Memory, Size: 32, RawSize: 32, Encoding: M,
|
||||
Segment: 3, Base: 0,
|
||||
|
||||
0000000000000014 c4222851c4 VPDPBUUDS xmm8, xmm10, xmm4
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVXVNNIINT8, Ins cat: AVXVNNIINT8, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: edx, bit: 4
|
||||
Exception class: SSE/VEX, exception type: 4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
|
||||
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
|
||||
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: RW, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 8, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: V, RegType: Vector, RegSize: 16, RegId: 10, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: M, RegType: Vector, RegSize: 16, RegId: 4, RegCount: 1
|
||||
|
||||
0000000000000019 c422285100 VPDPBUUDS xmm8, xmm10, xmmword ptr [rax]
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVXVNNIINT8, Ins cat: AVXVNNIINT8, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: edx, bit: 4
|
||||
Exception class: SSE/VEX, exception type: 4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
|
||||
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
|
||||
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: RW, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 8, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: V, RegType: Vector, RegSize: 16, RegId: 10, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Memory, Size: 16, RawSize: 16, Encoding: M,
|
||||
Segment: 3, Base: 0,
|
||||
|
||||
000000000000001E c4222c51c4 VPDPBUUDS ymm8, ymm10, ymm4
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVXVNNIINT8, Ins cat: AVXVNNIINT8, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: edx, bit: 4
|
||||
Exception class: SSE/VEX, exception type: 4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
|
||||
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
|
||||
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: RW, Type: Register, Size: 32, RawSize: 32, Encoding: R, RegType: Vector, RegSize: 32, RegId: 8, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 32, RawSize: 32, Encoding: V, RegType: Vector, RegSize: 32, RegId: 10, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Register, Size: 32, RawSize: 32, Encoding: M, RegType: Vector, RegSize: 32, RegId: 4, RegCount: 1
|
||||
|
||||
0000000000000023 c4222c5100 VPDPBUUDS ymm8, ymm10, ymmword ptr [rax]
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVXVNNIINT8, Ins cat: AVXVNNIINT8, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: edx, bit: 4
|
||||
Exception class: SSE/VEX, exception type: 4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
|
||||
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
|
||||
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: RW, Type: Register, Size: 32, RawSize: 32, Encoding: R, RegType: Vector, RegSize: 32, RegId: 8, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 32, RawSize: 32, Encoding: V, RegType: Vector, RegSize: 32, RegId: 10, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Memory, Size: 32, RawSize: 32, Encoding: M,
|
||||
Segment: 3, Base: 0,
|
||||
|
||||
0000000000000028 c4222a50c4 VPDPBSUD xmm8, xmm10, xmm4
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVXVNNIINT8, Ins cat: AVXVNNIINT8, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: edx, bit: 4
|
||||
Exception class: SSE/VEX, exception type: 4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
|
||||
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
|
||||
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: RW, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 8, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: V, RegType: Vector, RegSize: 16, RegId: 10, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: M, RegType: Vector, RegSize: 16, RegId: 4, RegCount: 1
|
||||
|
||||
000000000000002D c4222a5000 VPDPBSUD xmm8, xmm10, xmmword ptr [rax]
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVXVNNIINT8, Ins cat: AVXVNNIINT8, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: edx, bit: 4
|
||||
Exception class: SSE/VEX, exception type: 4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
|
||||
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
|
||||
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: RW, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 8, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: V, RegType: Vector, RegSize: 16, RegId: 10, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Memory, Size: 16, RawSize: 16, Encoding: M,
|
||||
Segment: 3, Base: 0,
|
||||
|
||||
0000000000000032 c4222e50c4 VPDPBSUD ymm8, ymm10, ymm4
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVXVNNIINT8, Ins cat: AVXVNNIINT8, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: edx, bit: 4
|
||||
Exception class: SSE/VEX, exception type: 4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
|
||||
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
|
||||
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: RW, Type: Register, Size: 32, RawSize: 32, Encoding: R, RegType: Vector, RegSize: 32, RegId: 8, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 32, RawSize: 32, Encoding: V, RegType: Vector, RegSize: 32, RegId: 10, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Register, Size: 32, RawSize: 32, Encoding: M, RegType: Vector, RegSize: 32, RegId: 4, RegCount: 1
|
||||
|
||||
0000000000000037 c4222e5000 VPDPBSUD ymm8, ymm10, ymmword ptr [rax]
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVXVNNIINT8, Ins cat: AVXVNNIINT8, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: edx, bit: 4
|
||||
Exception class: SSE/VEX, exception type: 4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
|
||||
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
|
||||
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: RW, Type: Register, Size: 32, RawSize: 32, Encoding: R, RegType: Vector, RegSize: 32, RegId: 8, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 32, RawSize: 32, Encoding: V, RegType: Vector, RegSize: 32, RegId: 10, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Memory, Size: 32, RawSize: 32, Encoding: M,
|
||||
Segment: 3, Base: 0,
|
||||
|
||||
000000000000003C c4222a51c4 VPDPBSUDS xmm8, xmm10, xmm4
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVXVNNIINT8, Ins cat: AVXVNNIINT8, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: edx, bit: 4
|
||||
Exception class: SSE/VEX, exception type: 4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
|
||||
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
|
||||
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: RW, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 8, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: V, RegType: Vector, RegSize: 16, RegId: 10, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: M, RegType: Vector, RegSize: 16, RegId: 4, RegCount: 1
|
||||
|
||||
0000000000000041 c4222a5100 VPDPBSUDS xmm8, xmm10, xmmword ptr [rax]
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVXVNNIINT8, Ins cat: AVXVNNIINT8, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: edx, bit: 4
|
||||
Exception class: SSE/VEX, exception type: 4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
|
||||
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
|
||||
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: RW, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 8, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: V, RegType: Vector, RegSize: 16, RegId: 10, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Memory, Size: 16, RawSize: 16, Encoding: M,
|
||||
Segment: 3, Base: 0,
|
||||
|
||||
0000000000000046 c4222e51c4 VPDPBSUDS ymm8, ymm10, ymm4
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVXVNNIINT8, Ins cat: AVXVNNIINT8, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: edx, bit: 4
|
||||
Exception class: SSE/VEX, exception type: 4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
|
||||
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
|
||||
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: RW, Type: Register, Size: 32, RawSize: 32, Encoding: R, RegType: Vector, RegSize: 32, RegId: 8, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 32, RawSize: 32, Encoding: V, RegType: Vector, RegSize: 32, RegId: 10, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Register, Size: 32, RawSize: 32, Encoding: M, RegType: Vector, RegSize: 32, RegId: 4, RegCount: 1
|
||||
|
||||
000000000000004B c4222e5100 VPDPBSUDS ymm8, ymm10, ymmword ptr [rax]
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVXVNNIINT8, Ins cat: AVXVNNIINT8, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: edx, bit: 4
|
||||
Exception class: SSE/VEX, exception type: 4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
|
||||
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
|
||||
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: RW, Type: Register, Size: 32, RawSize: 32, Encoding: R, RegType: Vector, RegSize: 32, RegId: 8, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 32, RawSize: 32, Encoding: V, RegType: Vector, RegSize: 32, RegId: 10, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Memory, Size: 32, RawSize: 32, Encoding: M,
|
||||
Segment: 3, Base: 0,
|
||||
|
||||
0000000000000050 c4222b50c4 VPDPBSSD xmm8, xmm10, xmm4
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVXVNNIINT8, Ins cat: AVXVNNIINT8, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: edx, bit: 4
|
||||
Exception class: SSE/VEX, exception type: 4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
|
||||
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
|
||||
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: RW, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 8, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: V, RegType: Vector, RegSize: 16, RegId: 10, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: M, RegType: Vector, RegSize: 16, RegId: 4, RegCount: 1
|
||||
|
||||
0000000000000055 c4222b5000 VPDPBSSD xmm8, xmm10, xmmword ptr [rax]
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVXVNNIINT8, Ins cat: AVXVNNIINT8, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: edx, bit: 4
|
||||
Exception class: SSE/VEX, exception type: 4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
|
||||
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
|
||||
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: RW, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 8, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: V, RegType: Vector, RegSize: 16, RegId: 10, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Memory, Size: 16, RawSize: 16, Encoding: M,
|
||||
Segment: 3, Base: 0,
|
||||
|
||||
000000000000005A c4222f50c4 VPDPBSSD ymm8, ymm10, ymm4
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVXVNNIINT8, Ins cat: AVXVNNIINT8, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: edx, bit: 4
|
||||
Exception class: SSE/VEX, exception type: 4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
|
||||
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
|
||||
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: RW, Type: Register, Size: 32, RawSize: 32, Encoding: R, RegType: Vector, RegSize: 32, RegId: 8, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 32, RawSize: 32, Encoding: V, RegType: Vector, RegSize: 32, RegId: 10, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Register, Size: 32, RawSize: 32, Encoding: M, RegType: Vector, RegSize: 32, RegId: 4, RegCount: 1
|
||||
|
||||
000000000000005F c4222f5000 VPDPBSSD ymm8, ymm10, ymmword ptr [rax]
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVXVNNIINT8, Ins cat: AVXVNNIINT8, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: edx, bit: 4
|
||||
Exception class: SSE/VEX, exception type: 4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
|
||||
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
|
||||
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: RW, Type: Register, Size: 32, RawSize: 32, Encoding: R, RegType: Vector, RegSize: 32, RegId: 8, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 32, RawSize: 32, Encoding: V, RegType: Vector, RegSize: 32, RegId: 10, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Memory, Size: 32, RawSize: 32, Encoding: M,
|
||||
Segment: 3, Base: 0,
|
||||
|
||||
0000000000000064 c4222b51c4 VPDPBSSDS xmm8, xmm10, xmm4
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVXVNNIINT8, Ins cat: AVXVNNIINT8, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: edx, bit: 4
|
||||
Exception class: SSE/VEX, exception type: 4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
|
||||
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
|
||||
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: RW, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 8, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: V, RegType: Vector, RegSize: 16, RegId: 10, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: M, RegType: Vector, RegSize: 16, RegId: 4, RegCount: 1
|
||||
|
||||
0000000000000069 c4222b5100 VPDPBSSDS xmm8, xmm10, xmmword ptr [rax]
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVXVNNIINT8, Ins cat: AVXVNNIINT8, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: edx, bit: 4
|
||||
Exception class: SSE/VEX, exception type: 4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
|
||||
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
|
||||
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: RW, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 8, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: V, RegType: Vector, RegSize: 16, RegId: 10, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Memory, Size: 16, RawSize: 16, Encoding: M,
|
||||
Segment: 3, Base: 0,
|
||||
|
||||
000000000000006E c4222f51c4 VPDPBSSDS ymm8, ymm10, ymm4
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVXVNNIINT8, Ins cat: AVXVNNIINT8, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: edx, bit: 4
|
||||
Exception class: SSE/VEX, exception type: 4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
|
||||
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
|
||||
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: RW, Type: Register, Size: 32, RawSize: 32, Encoding: R, RegType: Vector, RegSize: 32, RegId: 8, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 32, RawSize: 32, Encoding: V, RegType: Vector, RegSize: 32, RegId: 10, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Register, Size: 32, RawSize: 32, Encoding: M, RegType: Vector, RegSize: 32, RegId: 4, RegCount: 1
|
||||
|
||||
0000000000000073 c4222f5100 VPDPBSSDS ymm8, ymm10, ymmword ptr [rax]
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVXVNNIINT8, Ins cat: AVXVNNIINT8, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: edx, bit: 4
|
||||
Exception class: SSE/VEX, exception type: 4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
|
||||
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
|
||||
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: RW, Type: Register, Size: 32, RawSize: 32, Encoding: R, RegType: Vector, RegSize: 32, RegId: 8, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 32, RawSize: 32, Encoding: V, RegType: Vector, RegSize: 32, RegId: 10, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Memory, Size: 32, RawSize: 32, Encoding: M,
|
||||
Segment: 3, Base: 0,
|
||||
|
||||
BIN
bddisasm_test/x86/avx/avxvnniint8_64.test
Normal file
BIN
bddisasm_test/x86/avx/avxvnniint8_64.test
Normal file
Binary file not shown.
@ -26460,8 +26460,8 @@
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 2, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Immediate, Size: 1, RawSize: 1, Encoding: I
|
||||
|
||||
0000000000002287 62f37d0814d10a VPEXTRB ecx, xmm2, 0x0a
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
0000000000002287 62f37d0814d10a VPEXTRB rcx, xmm2, 0x0a
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512BW, Ins cat: AVX512, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 30
|
||||
EVEX Tuple Type: Tuple 1 scalar, 8 bit
|
||||
@ -26475,12 +26475,12 @@
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: M, RegType: General Purpose, RegSize: 4, RegId: 1, RegCount: 1
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: M, RegType: General Purpose, RegSize: 8, RegId: 1, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 2, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Immediate, Size: 1, RawSize: 1, Encoding: I
|
||||
|
||||
000000000000228E 62f37d0814d10a VPEXTRB ecx, xmm2, 0x0a
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
000000000000228E 62f37d0814d10a VPEXTRB rcx, xmm2, 0x0a
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512BW, Ins cat: AVX512, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 30
|
||||
EVEX Tuple Type: Tuple 1 scalar, 8 bit
|
||||
@ -26494,12 +26494,12 @@
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: M, RegType: General Purpose, RegSize: 4, RegId: 1, RegCount: 1
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: M, RegType: General Purpose, RegSize: 8, RegId: 1, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 2, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Immediate, Size: 1, RawSize: 1, Encoding: I
|
||||
|
||||
0000000000002295 c4e37914d10a VPEXTRB ecx, xmm2, 0x0a
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
0000000000002295 c4e37914d10a VPEXTRB rcx, xmm2, 0x0a
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX, Ins cat: AVX, CET tracked: no
|
||||
CPUID leaf: 0x00000001, reg: ecx, bit: 28
|
||||
Exception class: SSE/VEX, exception type: 5
|
||||
@ -26512,12 +26512,12 @@
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: M, RegType: General Purpose, RegSize: 4, RegId: 1, RegCount: 1
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: M, RegType: General Purpose, RegSize: 8, RegId: 1, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 2, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Immediate, Size: 1, RawSize: 1, Encoding: I
|
||||
|
||||
000000000000229B c4e37914d10a VPEXTRB ecx, xmm2, 0x0a
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
000000000000229B c4e37914d10a VPEXTRB rcx, xmm2, 0x0a
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX, Ins cat: AVX, CET tracked: no
|
||||
CPUID leaf: 0x00000001, reg: ecx, bit: 28
|
||||
Exception class: SSE/VEX, exception type: 5
|
||||
@ -26530,12 +26530,12 @@
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: M, RegType: General Purpose, RegSize: 4, RegId: 1, RegCount: 1
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: M, RegType: General Purpose, RegSize: 8, RegId: 1, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 2, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Immediate, Size: 1, RawSize: 1, Encoding: I
|
||||
|
||||
00000000000022A1 62f37d0815c10a VPEXTRW ecx, xmm0, 0x0a
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
00000000000022A1 62f37d0815c10a VPEXTRW rcx, xmm0, 0x0a
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512BW, Ins cat: AVX512, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 30
|
||||
EVEX Tuple Type: Tuple 1 scalar, 16 bit
|
||||
@ -26549,12 +26549,12 @@
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: M, RegType: General Purpose, RegSize: 4, RegId: 1, RegCount: 1
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: M, RegType: General Purpose, RegSize: 8, RegId: 1, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 0, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Immediate, Size: 1, RawSize: 1, Encoding: I
|
||||
|
||||
00000000000022A8 c5f9c5c80a VPEXTRW ecx, xmm0, 0x0a
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
00000000000022A8 c5f9c5c80a VPEXTRW rcx, xmm0, 0x0a
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX, Ins cat: AVX, CET tracked: no
|
||||
CPUID leaf: 0x00000001, reg: ecx, bit: 28
|
||||
Exception class: SSE/VEX, exception type: 5
|
||||
@ -26567,12 +26567,12 @@
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: R, RegType: General Purpose, RegSize: 4, RegId: 1, RegCount: 1
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: R, RegType: General Purpose, RegSize: 8, RegId: 1, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: M, RegType: Vector, RegSize: 16, RegId: 0, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Immediate, Size: 1, RawSize: 1, Encoding: I
|
||||
|
||||
00000000000022AD c5f9c5c80a VPEXTRW ecx, xmm0, 0x0a
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
00000000000022AD c5f9c5c80a VPEXTRW rcx, xmm0, 0x0a
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX, Ins cat: AVX, CET tracked: no
|
||||
CPUID leaf: 0x00000001, reg: ecx, bit: 28
|
||||
Exception class: SSE/VEX, exception type: 5
|
||||
@ -26585,7 +26585,7 @@
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: R, RegType: General Purpose, RegSize: 4, RegId: 1, RegCount: 1
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: R, RegType: General Purpose, RegSize: 8, RegId: 1, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: M, RegType: Vector, RegSize: 16, RegId: 0, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Immediate, Size: 1, RawSize: 1, Encoding: I
|
||||
|
||||
@ -26646,8 +26646,8 @@
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 2, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Immediate, Size: 1, RawSize: 1, Encoding: I
|
||||
|
||||
00000000000022CE 62f37d0815d10a VPEXTRW ecx, xmm2, 0x0a
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
00000000000022CE 62f37d0815d10a VPEXTRW rcx, xmm2, 0x0a
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512BW, Ins cat: AVX512, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 30
|
||||
EVEX Tuple Type: Tuple 1 scalar, 16 bit
|
||||
@ -26661,12 +26661,12 @@
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: M, RegType: General Purpose, RegSize: 4, RegId: 1, RegCount: 1
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: M, RegType: General Purpose, RegSize: 8, RegId: 1, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 2, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Immediate, Size: 1, RawSize: 1, Encoding: I
|
||||
|
||||
00000000000022D5 c5f9c5ca0a VPEXTRW ecx, xmm2, 0x0a
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
00000000000022D5 c5f9c5ca0a VPEXTRW rcx, xmm2, 0x0a
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX, Ins cat: AVX, CET tracked: no
|
||||
CPUID leaf: 0x00000001, reg: ecx, bit: 28
|
||||
Exception class: SSE/VEX, exception type: 5
|
||||
@ -26679,12 +26679,12 @@
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: R, RegType: General Purpose, RegSize: 4, RegId: 1, RegCount: 1
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: R, RegType: General Purpose, RegSize: 8, RegId: 1, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: M, RegType: Vector, RegSize: 16, RegId: 2, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Immediate, Size: 1, RawSize: 1, Encoding: I
|
||||
|
||||
00000000000022DA c5f9c5ca0a VPEXTRW ecx, xmm2, 0x0a
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
00000000000022DA c5f9c5ca0a VPEXTRW rcx, xmm2, 0x0a
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX, Ins cat: AVX, CET tracked: no
|
||||
CPUID leaf: 0x00000001, reg: ecx, bit: 28
|
||||
Exception class: SSE/VEX, exception type: 5
|
||||
@ -26697,7 +26697,7 @@
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: R, RegType: General Purpose, RegSize: 4, RegId: 1, RegCount: 1
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: R, RegType: General Purpose, RegSize: 8, RegId: 1, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: M, RegType: Vector, RegSize: 16, RegId: 2, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Immediate, Size: 1, RawSize: 1, Encoding: I
|
||||
|
||||
@ -22975,8 +22975,8 @@
|
||||
Operand: 3, Acc: R-, Type: Memory, Size: 64, RawSize: 64, Encoding: M, Compressed displacement: yes,
|
||||
Segment: 3, Base: 3, Index: 11 * 8, Displacement: 0xfffffffffffffffc,
|
||||
|
||||
0000000000001D20 c4e37916d10a VPEXTRD ecx, xmm2, 0x0a
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
0000000000001D20 c4e37916d10a VPEXTRD rcx, xmm2, 0x0a
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX, Ins cat: AVX, CET tracked: no
|
||||
CPUID leaf: 0x00000001, reg: ecx, bit: 28
|
||||
Exception class: SSE/VEX, exception type: 5
|
||||
@ -22989,12 +22989,12 @@
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: M, RegType: General Purpose, RegSize: 4, RegId: 1, RegCount: 1
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: M, RegType: General Purpose, RegSize: 8, RegId: 1, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 2, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Immediate, Size: 1, RawSize: 1, Encoding: I
|
||||
|
||||
0000000000001D26 c4e37916d10a VPEXTRD ecx, xmm2, 0x0a
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
0000000000001D26 c4e37916d10a VPEXTRD rcx, xmm2, 0x0a
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX, Ins cat: AVX, CET tracked: no
|
||||
CPUID leaf: 0x00000001, reg: ecx, bit: 28
|
||||
Exception class: SSE/VEX, exception type: 5
|
||||
@ -23007,7 +23007,7 @@
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: M, RegType: General Purpose, RegSize: 4, RegId: 1, RegCount: 1
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: M, RegType: General Purpose, RegSize: 8, RegId: 1, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 2, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Immediate, Size: 1, RawSize: 1, Encoding: I
|
||||
|
||||
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Reference in New Issue
Block a user