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Added support for UINTR, HRESET and AVX-VNNI instructions, as per Intel® Architecture Instruction Set Extensions Programming Reference 41 (October 2020).

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This commit is contained in:
Andrei Vlad LUTAS 2020-10-05 13:19:03 +03:00
parent 514b4c571a
commit 9652450125
32 changed files with 8647 additions and 7919 deletions
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13
bddisasm/bddisasm.c
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@ -173,6 +173,7 @@ static const uint16_t gOperandMap[] =
ND_OPE_S, // ND_OPT_MXCSR
ND_OPE_S, // ND_OPT_PKRU
ND_OPE_S, // ND_OPT_SSP
ND_OPE_S, // ND_OPT_UIF
ND_OPE_S, // ND_OPT_GPR_AH
ND_OPE_S, // ND_OPT_GPR_rAX
@ -1993,6 +1994,14 @@ NdParseOperand(
operand->Info.Register.Reg = 0;
break;
case ND_OPT_UIF:
// The operand is the User Interrupt Flag.
operand->Type = ND_OP_REG;
operand->Info.Register.Type = ND_REG_UIF;
operand->Info.Register.Size = ND_SIZE_8BIT; // 1 bit, in fact, but there is no size defined for one bit.
operand->Info.Register.Reg = 0;
break;
case ND_OPT_MSR:
// The operand is implicit and is a MSR (usually selected by the ECX register).
operand->Type = ND_OP_REG;
@ -5083,7 +5092,7 @@ NdGetFullAccessMap(
{
case ND_REG_GPR:
{
uint8_t k;
uint32_t k;
for (k = 0; k < pOp->Info.Register.Count; k++)
{
@ -5102,7 +5111,7 @@ NdGetFullAccessMap(
break;
case ND_REG_SSE:
{
uint8_t k;
uint32_t k;
for (k = 0; k < pOp->Info.Register.Count; k++)
{

10509
bddisasm/include/instructions.h
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File diff suppressed because it is too large Load Diff

290
bddisasm/include/mnemonics.h
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@ -1,7 +1,7 @@
#ifndef MNEMONICS_H
#define MNEMONICS_H
const char *gMnemonics[1582] =
const char *gMnemonics[1588] =
{
"AAA", "AAD", "AAM", "AAS", "ADC", "ADCX", "ADD", "ADDPD", "ADDPS",
"ADDSD", "ADDSS", "ADDSUBPD", "ADDSUBPS", "ADOX", "AESDEC", "AESDEC128KL",
@ -15,151 +15,153 @@ const char *gMnemonics[1582] =
"BNDSTX", "BOUND", "BSF", "BSR", "BSWAP", "BT", "BTC", "BTR",
"BTS", "BZHI", "CALL", "CALLF", "CBW", "CDQ", "CDQE", "CL1INVMB",
"CLAC", "CLC", "CLD", "CLDEMOTE", "CLEVICT0", "CLEVICT1", "CLFLUSH",
"CLFLUSHOPT", "CLGI", "CLI", "CLRSSBSY", "CLTS", "CLWB", "CLZERO",
"CMC", "CMOVBE", "CMOVC", "CMOVL", "CMOVLE", "CMOVNBE", "CMOVNC",
"CMOVNL", "CMOVNLE", "CMOVNO", "CMOVNP", "CMOVNS", "CMOVNZ",
"CMOVO", "CMOVP", "CMOVS", "CMOVZ", "CMP", "CMPPD", "CMPPS",
"CMPSB", "CMPSD", "CMPSQ", "CMPSS", "CMPSW", "CMPXCHG", "CMPXCHG16B",
"CMPXCHG8B", "COMISD", "COMISS", "CPUID", "CPU_READ", "CPU_WRITE",
"CQO", "CRC32", "CVTDQ2PD", "CVTDQ2PS", "CVTPD2DQ", "CVTPD2PI",
"CVTPD2PS", "CVTPI2PD", "CVTPI2PS", "CVTPS2DQ", "CVTPS2PD", "CVTPS2PI",
"CVTSD2SI", "CVTSD2SS", "CVTSI2SD", "CVTSI2SS", "CVTSS2SD", "CVTSS2SI",
"CVTTPD2DQ", "CVTTPD2PI", "CVTTPS2DQ", "CVTTPS2PI", "CVTTSD2SI",
"CVTTSS2SI", "CWD", "CWDE", "DAA", "DAS", "DEC", "DELAY", "DIV",
"DIVPD", "DIVPS", "DIVSD", "DIVSS", "DMINT", "DPPD", "DPPS",
"EMMS", "ENCLS", "ENCLU", "ENCLV", "ENCODEKEY128", "ENCODEKEY256",
"ENDBR32", "ENDBR64", "ENQCMD", "ENQCMDS", "ENTER", "EXTRACTPS",
"EXTRQ", "F2XM1", "FABS", "FADD", "FADDP", "FBLD", "FBSTP", "FCHS",
"FCMOVB", "FCMOVBE", "FCMOVE", "FCMOVNB", "FCMOVNBE", "FCMOVNE",
"FCMOVNU", "FCMOVU", "FCOM", "FCOMI", "FCOMIP", "FCOMP", "FCOMPP",
"FCOS", "FDECSTP", "FDIV", "FDIVP", "FDIVR", "FDIVRP", "FEMMS",
"FFREE", "FFREEP", "FIADD", "FICOM", "FICOMP", "FIDIV", "FIDIVR",
"FILD", "FIMUL", "FINCSTP", "FIST", "FISTP", "FISTTP", "FISUB",
"FISUBR", "FLD", "FLD1", "FLDCW", "FLDENV", "FLDL2E", "FLDL2T",
"FLDLG2", "FLDLN2", "FLDPI", "FLDZ", "FMUL", "FMULP", "FNCLEX",
"FNDISI", "FNINIT", "FNOP", "FNSAVE", "FNSTCW", "FNSTENV", "FNSTSW",
"FPATAN", "FPREM", "FPREM1", "FPTAN", "FRINEAR", "FRNDINT", "FRSTOR",
"FSCALE", "FSIN", "FSINCOS", "FSQRT", "FST", "FSTDW", "FSTP",
"FSTPNCE", "FSTSG", "FSUB", "FSUBP", "FSUBR", "FSUBRP", "FTST",
"FUCOM", "FUCOMI", "FUCOMIP", "FUCOMP", "FUCOMPP", "FXAM", "FXCH",
"FXRSTOR", "FXRSTOR64", "FXSAVE", "FXSAVE64", "FXTRACT", "FYL2X",
"FYL2XP1", "GETSEC", "GF2P8AFFINEINVQB", "GF2P8AFFINEQB", "GF2P8MULB",
"HADDPD", "HADDPS", "HLT", "HSUBPD", "HSUBPS", "IDIV", "IMUL",
"IN", "INC", "INCSSPD", "INCSSPQ", "INSB", "INSD", "INSERTPS",
"INSERTQ", "INSW", "INT", "INT1", "INT3", "INTO", "INVD", "INVEPT",
"INVLPG", "INVLPGA", "INVLPGB", "INVPCID", "INVVPID", "IRETD",
"IRETQ", "IRETW", "JBE", "JC", "JCXZ", "JECXZ", "JL", "JLE",
"JMP", "JMPE", "JMPF", "JNBE", "JNC", "JNL", "JNLE", "JNO", "JNP",
"JNS", "JNZ", "JO", "JP", "JRCXZ", "JS", "JZ", "KADDB", "KADDD",
"KADDQ", "KADDW", "KANDB", "KANDD", "KANDNB", "KANDND", "KANDNQ",
"KANDNW", "KANDQ", "KANDW", "KMERGE2L1H", "KMERGE2L1L", "KMOVB",
"KMOVD", "KMOVQ", "KMOVW", "KNOTB", "KNOTD", "KNOTQ", "KNOTW",
"KORB", "KORD", "KORQ", "KORTESTB", "KORTESTD", "KORTESTQ", "KORTESTW",
"KORW", "KSHIFTLB", "KSHIFTLD", "KSHIFTLQ", "KSHIFTLW", "KSHIFTRB",
"KSHIFTRD", "KSHIFTRQ", "KSHIFTRW", "KTESTB", "KTESTD", "KTESTQ",
"KTESTW", "KUNPCKBW", "KUNPCKDQ", "KUNPCKWD", "KXNORB", "KXNORD",
"KXNORQ", "KXNORW", "KXORB", "KXORD", "KXORQ", "KXORW", "LAHF",
"LAR", "LDDQU", "LDMXCSR", "LDS", "LDTILECFG", "LEA", "LEAVE",
"LES", "LFENCE", "LFS", "LGDT", "LGS", "LIDT", "LLDT", "LLWPCB",
"LMSW", "LOADIWKEY", "LODSB", "LODSD", "LODSQ", "LODSW", "LOOP",
"LOOPNZ", "LOOPZ", "LSL", "LSS", "LTR", "LWPINS", "LWPVAL", "LZCNT",
"MASKMOVDQU", "MASKMOVQ", "MAXPD", "MAXPS", "MAXSD", "MAXSS",
"MCOMMIT", "MFENCE", "MINPD", "MINPS", "MINSD", "MINSS", "MONITOR",
"MONITORX", "MONTMUL", "MOV", "MOVAPD", "MOVAPS", "MOVBE", "MOVD",
"MOVDDUP", "MOVDIR64B", "MOVDIRI", "MOVDQ2Q", "MOVDQA", "MOVDQU",
"MOVHLPS", "MOVHPD", "MOVHPS", "MOVLHPS", "MOVLPD", "MOVLPS",
"MOVMSKPD", "MOVMSKPS", "MOVNTDQ", "MOVNTDQA", "MOVNTI", "MOVNTPD",
"MOVNTPS", "MOVNTQ", "MOVNTSD", "MOVNTSS", "MOVQ", "MOVQ2DQ",
"MOVSB", "MOVSD", "MOVSHDUP", "MOVSLDUP", "MOVSQ", "MOVSS", "MOVSW",
"MOVSX", "MOVSXD", "MOVUPD", "MOVUPS", "MOVZX", "MPSADBW", "MUL",
"MULPD", "MULPS", "MULSD", "MULSS", "MULX", "MWAIT", "MWAITX",
"NEG", "NOP", "NOT", "OR", "ORPD", "ORPS", "OUT", "OUTSB", "OUTSD",
"OUTSW", "PABSB", "PABSD", "PABSW", "PACKSSDW", "PACKSSWB", "PACKUSDW",
"PACKUSWB", "PADDB", "PADDD", "PADDQ", "PADDSB", "PADDSW", "PADDUSB",
"PADDUSW", "PADDW", "PALIGNR", "PAND", "PANDN", "PAUSE", "PAVGB",
"PAVGUSB", "PAVGW", "PBLENDVB", "PBLENDW", "PCLMULQDQ", "PCMPEQB",
"PCMPEQD", "PCMPEQQ", "PCMPEQW", "PCMPESTRI", "PCMPESTRM", "PCMPGTB",
"PCMPGTD", "PCMPGTQ", "PCMPGTW", "PCMPISTRI", "PCMPISTRM", "PCOMMIT",
"PCONFIG", "PDEP", "PEXT", "PEXTRB", "PEXTRD", "PEXTRQ", "PEXTRW",
"PF2ID", "PF2IW", "PFACC", "PFADD", "PFCMPEQ", "PFCMPGE", "PFCMPGT",
"PFMAX", "PFMIN", "PFMUL", "PFNACC", "PFPNACC", "PFRCP", "PFRCPIT1",
"PFRCPIT2", "PFRCPV", "PFRSQIT1", "PFRSQRT", "PFRSQRTV", "PFSUB",
"PFSUBR", "PHADDD", "PHADDSW", "PHADDW", "PHMINPOSUW", "PHSUBD",
"PHSUBSW", "PHSUBW", "PI2FD", "PI2FW", "PINSRB", "PINSRD", "PINSRQ",
"PINSRW", "PMADDUBSW", "PMADDWD", "PMAXSB", "PMAXSD", "PMAXSW",
"PMAXUB", "PMAXUD", "PMAXUW", "PMINSB", "PMINSD", "PMINSW", "PMINUB",
"PMINUD", "PMINUW", "PMOVMSKB", "PMOVSXBD", "PMOVSXBQ", "PMOVSXBW",
"PMOVSXDQ", "PMOVSXWD", "PMOVSXWQ", "PMOVZXBD", "PMOVZXBQ", "PMOVZXBW",
"PMOVZXDQ", "PMOVZXWD", "PMOVZXWQ", "PMULDQ", "PMULHRSW", "PMULHRW",
"PMULHUW", "PMULHW", "PMULLD", "PMULLW", "PMULUDQ", "POP", "POPA",
"POPAD", "POPCNT", "POPFD", "POPFQ", "POPFW", "POR", "PREFETCH",
"PREFETCHE", "PREFETCHM", "PREFETCHNTA", "PREFETCHT0", "PREFETCHT1",
"PREFETCHT2", "PREFETCHW", "PREFETCHWT1", "PSADBW", "PSHUFB",
"PSHUFD", "PSHUFHW", "PSHUFLW", "PSHUFW", "PSIGNB", "PSIGND",
"PSIGNW", "PSLLD", "PSLLDQ", "PSLLQ", "PSLLW", "PSMASH", "PSRAD",
"PSRAW", "PSRLD", "PSRLDQ", "PSRLQ", "PSRLW", "PSUBB", "PSUBD",
"PSUBQ", "PSUBSB", "PSUBSW", "PSUBUSB", "PSUBUSW", "PSUBW", "PSWAPD",
"PTEST", "PTWRITE", "PUNPCKHBW", "PUNPCKHDQ", "PUNPCKHQDQ", "PUNPCKHWD",
"PUNPCKLBW", "PUNPCKLDQ", "PUNPCKLQDQ", "PUNPCKLWD", "PUSH",
"PUSHA", "PUSHAD", "PUSHFD", "PUSHFQ", "PUSHFW", "PVALIDATE",
"PXOR", "RCL", "RCPPS", "RCPSS", "RCR", "RDFSBASE", "RDGSBASE",
"RDMSR", "RDPID", "RDPKRU", "RDPMC", "RDPRU", "RDRAND", "RDSEED",
"RDSHR", "RDSSPD", "RDSSPQ", "RDTSC", "RDTSCP", "RETF", "RETN",
"RMPADJUST", "RMPUPDATE", "ROL", "ROR", "RORX", "ROUNDPD", "ROUNDPS",
"ROUNDSD", "ROUNDSS", "RSDC", "RSLDT", "RSM", "RSQRTPS", "RSQRTSS",
"RSTORSSP", "RSTS", "SAHF", "SAL", "SALC", "SAR", "SARX", "SAVEPREVSSP",
"SBB", "SCASB", "SCASD", "SCASQ", "SCASW", "SEAMCALL", "SEAMOPS",
"SEAMRET", "SERIALIZE", "SETBE", "SETC", "SETL", "SETLE", "SETNBE",
"SETNC", "SETNL", "SETNLE", "SETNO", "SETNP", "SETNS", "SETNZ",
"SETO", "SETP", "SETS", "SETSSBSY", "SETZ", "SFENCE", "SGDT",
"SHA1MSG1", "SHA1MSG2", "SHA1NEXTE", "SHA1RNDS4", "SHA256MSG1",
"SHA256MSG2", "SHA256RNDS2", "SHL", "SHLD", "SHLX", "SHR", "SHRD",
"SHRX", "SHUFPD", "SHUFPS", "SIDT", "SKINIT", "SLDT", "SLWPCB",
"SMINT", "SMSW", "SPFLT", "SQRTPD", "SQRTPS", "SQRTSD", "SQRTSS",
"STAC", "STC", "STD", "STGI", "STI", "STMXCSR", "STOSB", "STOSD",
"STOSQ", "STOSW", "STR", "STTILECFG", "SUB", "SUBPD", "SUBPS",
"CLFLUSHOPT", "CLGI", "CLI", "CLRSSBSY", "CLTS", "CLUI", "CLWB",
"CLZERO", "CMC", "CMOVBE", "CMOVC", "CMOVL", "CMOVLE", "CMOVNBE",
"CMOVNC", "CMOVNL", "CMOVNLE", "CMOVNO", "CMOVNP", "CMOVNS",
"CMOVNZ", "CMOVO", "CMOVP", "CMOVS", "CMOVZ", "CMP", "CMPPD",
"CMPPS", "CMPSB", "CMPSD", "CMPSQ", "CMPSS", "CMPSW", "CMPXCHG",
"CMPXCHG16B", "CMPXCHG8B", "COMISD", "COMISS", "CPUID", "CPU_READ",
"CPU_WRITE", "CQO", "CRC32", "CVTDQ2PD", "CVTDQ2PS", "CVTPD2DQ",
"CVTPD2PI", "CVTPD2PS", "CVTPI2PD", "CVTPI2PS", "CVTPS2DQ", "CVTPS2PD",
"CVTPS2PI", "CVTSD2SI", "CVTSD2SS", "CVTSI2SD", "CVTSI2SS", "CVTSS2SD",
"CVTSS2SI", "CVTTPD2DQ", "CVTTPD2PI", "CVTTPS2DQ", "CVTTPS2PI",
"CVTTSD2SI", "CVTTSS2SI", "CWD", "CWDE", "DAA", "DAS", "DEC",
"DELAY", "DIV", "DIVPD", "DIVPS", "DIVSD", "DIVSS", "DMINT",
"DPPD", "DPPS", "EMMS", "ENCLS", "ENCLU", "ENCLV", "ENCODEKEY128",
"ENCODEKEY256", "ENDBR32", "ENDBR64", "ENQCMD", "ENQCMDS", "ENTER",
"EXTRACTPS", "EXTRQ", "F2XM1", "FABS", "FADD", "FADDP", "FBLD",
"FBSTP", "FCHS", "FCMOVB", "FCMOVBE", "FCMOVE", "FCMOVNB", "FCMOVNBE",
"FCMOVNE", "FCMOVNU", "FCMOVU", "FCOM", "FCOMI", "FCOMIP", "FCOMP",
"FCOMPP", "FCOS", "FDECSTP", "FDIV", "FDIVP", "FDIVR", "FDIVRP",
"FEMMS", "FFREE", "FFREEP", "FIADD", "FICOM", "FICOMP", "FIDIV",
"FIDIVR", "FILD", "FIMUL", "FINCSTP", "FIST", "FISTP", "FISTTP",
"FISUB", "FISUBR", "FLD", "FLD1", "FLDCW", "FLDENV", "FLDL2E",
"FLDL2T", "FLDLG2", "FLDLN2", "FLDPI", "FLDZ", "FMUL", "FMULP",
"FNCLEX", "FNDISI", "FNINIT", "FNOP", "FNSAVE", "FNSTCW", "FNSTENV",
"FNSTSW", "FPATAN", "FPREM", "FPREM1", "FPTAN", "FRINEAR", "FRNDINT",
"FRSTOR", "FSCALE", "FSIN", "FSINCOS", "FSQRT", "FST", "FSTDW",
"FSTP", "FSTPNCE", "FSTSG", "FSUB", "FSUBP", "FSUBR", "FSUBRP",
"FTST", "FUCOM", "FUCOMI", "FUCOMIP", "FUCOMP", "FUCOMPP", "FXAM",
"FXCH", "FXRSTOR", "FXRSTOR64", "FXSAVE", "FXSAVE64", "FXTRACT",
"FYL2X", "FYL2XP1", "GETSEC", "GF2P8AFFINEINVQB", "GF2P8AFFINEQB",
"GF2P8MULB", "HADDPD", "HADDPS", "HLT", "HRESET", "HSUBPD", "HSUBPS",
"IDIV", "IMUL", "IN", "INC", "INCSSPD", "INCSSPQ", "INSB", "INSD",
"INSERTPS", "INSERTQ", "INSW", "INT", "INT1", "INT3", "INTO",
"INVD", "INVEPT", "INVLPG", "INVLPGA", "INVLPGB", "INVPCID",
"INVVPID", "IRETD", "IRETQ", "IRETW", "JBE", "JC", "JCXZ", "JECXZ",
"JL", "JLE", "JMP", "JMPE", "JMPF", "JNBE", "JNC", "JNL", "JNLE",
"JNO", "JNP", "JNS", "JNZ", "JO", "JP", "JRCXZ", "JS", "JZ",
"KADDB", "KADDD", "KADDQ", "KADDW", "KANDB", "KANDD", "KANDNB",
"KANDND", "KANDNQ", "KANDNW", "KANDQ", "KANDW", "KMERGE2L1H",
"KMERGE2L1L", "KMOVB", "KMOVD", "KMOVQ", "KMOVW", "KNOTB", "KNOTD",
"KNOTQ", "KNOTW", "KORB", "KORD", "KORQ", "KORTESTB", "KORTESTD",
"KORTESTQ", "KORTESTW", "KORW", "KSHIFTLB", "KSHIFTLD", "KSHIFTLQ",
"KSHIFTLW", "KSHIFTRB", "KSHIFTRD", "KSHIFTRQ", "KSHIFTRW", "KTESTB",
"KTESTD", "KTESTQ", "KTESTW", "KUNPCKBW", "KUNPCKDQ", "KUNPCKWD",
"KXNORB", "KXNORD", "KXNORQ", "KXNORW", "KXORB", "KXORD", "KXORQ",
"KXORW", "LAHF", "LAR", "LDDQU", "LDMXCSR", "LDS", "LDTILECFG",
"LEA", "LEAVE", "LES", "LFENCE", "LFS", "LGDT", "LGS", "LIDT",
"LLDT", "LLWPCB", "LMSW", "LOADIWKEY", "LODSB", "LODSD", "LODSQ",
"LODSW", "LOOP", "LOOPNZ", "LOOPZ", "LSL", "LSS", "LTR", "LWPINS",
"LWPVAL", "LZCNT", "MASKMOVDQU", "MASKMOVQ", "MAXPD", "MAXPS",
"MAXSD", "MAXSS", "MCOMMIT", "MFENCE", "MINPD", "MINPS", "MINSD",
"MINSS", "MONITOR", "MONITORX", "MONTMUL", "MOV", "MOVAPD", "MOVAPS",
"MOVBE", "MOVD", "MOVDDUP", "MOVDIR64B", "MOVDIRI", "MOVDQ2Q",
"MOVDQA", "MOVDQU", "MOVHLPS", "MOVHPD", "MOVHPS", "MOVLHPS",
"MOVLPD", "MOVLPS", "MOVMSKPD", "MOVMSKPS", "MOVNTDQ", "MOVNTDQA",
"MOVNTI", "MOVNTPD", "MOVNTPS", "MOVNTQ", "MOVNTSD", "MOVNTSS",
"MOVQ", "MOVQ2DQ", "MOVSB", "MOVSD", "MOVSHDUP", "MOVSLDUP",
"MOVSQ", "MOVSS", "MOVSW", "MOVSX", "MOVSXD", "MOVUPD", "MOVUPS",
"MOVZX", "MPSADBW", "MUL", "MULPD", "MULPS", "MULSD", "MULSS",
"MULX", "MWAIT", "MWAITX", "NEG", "NOP", "NOT", "OR", "ORPD",
"ORPS", "OUT", "OUTSB", "OUTSD", "OUTSW", "PABSB", "PABSD", "PABSW",
"PACKSSDW", "PACKSSWB", "PACKUSDW", "PACKUSWB", "PADDB", "PADDD",
"PADDQ", "PADDSB", "PADDSW", "PADDUSB", "PADDUSW", "PADDW", "PALIGNR",
"PAND", "PANDN", "PAUSE", "PAVGB", "PAVGUSB", "PAVGW", "PBLENDVB",
"PBLENDW", "PCLMULQDQ", "PCMPEQB", "PCMPEQD", "PCMPEQQ", "PCMPEQW",
"PCMPESTRI", "PCMPESTRM", "PCMPGTB", "PCMPGTD", "PCMPGTQ", "PCMPGTW",
"PCMPISTRI", "PCMPISTRM", "PCOMMIT", "PCONFIG", "PDEP", "PEXT",
"PEXTRB", "PEXTRD", "PEXTRQ", "PEXTRW", "PF2ID", "PF2IW", "PFACC",
"PFADD", "PFCMPEQ", "PFCMPGE", "PFCMPGT", "PFMAX", "PFMIN", "PFMUL",
"PFNACC", "PFPNACC", "PFRCP", "PFRCPIT1", "PFRCPIT2", "PFRCPV",
"PFRSQIT1", "PFRSQRT", "PFRSQRTV", "PFSUB", "PFSUBR", "PHADDD",
"PHADDSW", "PHADDW", "PHMINPOSUW", "PHSUBD", "PHSUBSW", "PHSUBW",
"PI2FD", "PI2FW", "PINSRB", "PINSRD", "PINSRQ", "PINSRW", "PMADDUBSW",
"PMADDWD", "PMAXSB", "PMAXSD", "PMAXSW", "PMAXUB", "PMAXUD",
"PMAXUW", "PMINSB", "PMINSD", "PMINSW", "PMINUB", "PMINUD", "PMINUW",
"PMOVMSKB", "PMOVSXBD", "PMOVSXBQ", "PMOVSXBW", "PMOVSXDQ", "PMOVSXWD",
"PMOVSXWQ", "PMOVZXBD", "PMOVZXBQ", "PMOVZXBW", "PMOVZXDQ", "PMOVZXWD",
"PMOVZXWQ", "PMULDQ", "PMULHRSW", "PMULHRW", "PMULHUW", "PMULHW",
"PMULLD", "PMULLW", "PMULUDQ", "POP", "POPA", "POPAD", "POPCNT",
"POPFD", "POPFQ", "POPFW", "POR", "PREFETCH", "PREFETCHE", "PREFETCHM",
"PREFETCHNTA", "PREFETCHT0", "PREFETCHT1", "PREFETCHT2", "PREFETCHW",
"PREFETCHWT1", "PSADBW", "PSHUFB", "PSHUFD", "PSHUFHW", "PSHUFLW",
"PSHUFW", "PSIGNB", "PSIGND", "PSIGNW", "PSLLD", "PSLLDQ", "PSLLQ",
"PSLLW", "PSMASH", "PSRAD", "PSRAW", "PSRLD", "PSRLDQ", "PSRLQ",
"PSRLW", "PSUBB", "PSUBD", "PSUBQ", "PSUBSB", "PSUBSW", "PSUBUSB",
"PSUBUSW", "PSUBW", "PSWAPD", "PTEST", "PTWRITE", "PUNPCKHBW",
"PUNPCKHDQ", "PUNPCKHQDQ", "PUNPCKHWD", "PUNPCKLBW", "PUNPCKLDQ",
"PUNPCKLQDQ", "PUNPCKLWD", "PUSH", "PUSHA", "PUSHAD", "PUSHFD",
"PUSHFQ", "PUSHFW", "PVALIDATE", "PXOR", "RCL", "RCPPS", "RCPSS",
"RCR", "RDFSBASE", "RDGSBASE", "RDMSR", "RDPID", "RDPKRU", "RDPMC",
"RDPRU", "RDRAND", "RDSEED", "RDSHR", "RDSSPD", "RDSSPQ", "RDTSC",
"RDTSCP", "RETF", "RETN", "RMPADJUST", "RMPUPDATE", "ROL", "ROR",
"RORX", "ROUNDPD", "ROUNDPS", "ROUNDSD", "ROUNDSS", "RSDC", "RSLDT",
"RSM", "RSQRTPS", "RSQRTSS", "RSTORSSP", "RSTS", "SAHF", "SAL",
"SALC", "SAR", "SARX", "SAVEPREVSSP", "SBB", "SCASB", "SCASD",
"SCASQ", "SCASW", "SEAMCALL", "SEAMOPS", "SEAMRET", "SENDUIPI",
"SERIALIZE", "SETBE", "SETC", "SETL", "SETLE", "SETNBE", "SETNC",
"SETNL", "SETNLE", "SETNO", "SETNP", "SETNS", "SETNZ", "SETO",
"SETP", "SETS", "SETSSBSY", "SETZ", "SFENCE", "SGDT", "SHA1MSG1",
"SHA1MSG2", "SHA1NEXTE", "SHA1RNDS4", "SHA256MSG1", "SHA256MSG2",
"SHA256RNDS2", "SHL", "SHLD", "SHLX", "SHR", "SHRD", "SHRX",
"SHUFPD", "SHUFPS", "SIDT", "SKINIT", "SLDT", "SLWPCB", "SMINT",
"SMSW", "SPFLT", "SQRTPD", "SQRTPS", "SQRTSD", "SQRTSS", "STAC",
"STC", "STD", "STGI", "STI", "STMXCSR", "STOSB", "STOSD", "STOSQ",
"STOSW", "STR", "STTILECFG", "STUI", "SUB", "SUBPD", "SUBPS",
"SUBSD", "SUBSS", "SVDC", "SVLDT", "SVTS", "SWAPGS", "SYSCALL",
"SYSENTER", "SYSEXIT", "SYSRET", "T1MSKC", "TDCALL", "TDPBF16PS",
"TDPBSSD", "TDPBSUD", "TDPBUSD", "TDPBUUD", "TEST", "TILELOADD",
"TILELOADDT1", "TILERELEASE", "TILESTORED", "TILEZERO", "TLBSYNC",
"TPAUSE", "TZCNT", "TZMSK", "UCOMISD", "UCOMISS", "UD0", "UD1",
"UD2", "UMONITOR", "UMWAIT", "UNPCKHPD", "UNPCKHPS", "UNPCKLPD",
"UNPCKLPS", "V4FMADDPS", "V4FMADDSS", "V4FNMADDPS", "V4FNMADDSS",
"VADDPD", "VADDPS", "VADDSD", "VADDSS", "VADDSUBPD", "VADDSUBPS",
"VAESDEC", "VAESDECLAST", "VAESENC", "VAESENCLAST", "VAESIMC",
"VAESKEYGENASSIST", "VALIGND", "VALIGNQ", "VANDNPD", "VANDNPS",
"VANDPD", "VANDPS", "VBLENDMPD", "VBLENDMPS", "VBLENDPD", "VBLENDPS",
"VBLENDVPD", "VBLENDVPS", "VBROADCASTF128", "VBROADCASTF32X2",
"VBROADCASTF32X4", "VBROADCASTF32X8", "VBROADCASTF64X2", "VBROADCASTF64X4",
"VBROADCASTI128", "VBROADCASTI32X2", "VBROADCASTI32X4", "VBROADCASTI32X8",
"VBROADCASTI64X2", "VBROADCASTI64X4", "VBROADCASTSD", "VBROADCASTSS",
"VCMPPD", "VCMPPS", "VCMPSD", "VCMPSS", "VCOMISD", "VCOMISS",
"VCOMPRESSPD", "VCOMPRESSPS", "VCVTDQ2PD", "VCVTDQ2PS", "VCVTNE2PS2BF16",
"VCVTNEPS2BF16", "VCVTPD2DQ", "VCVTPD2PS", "VCVTPD2QQ", "VCVTPD2UDQ",
"VCVTPD2UQQ", "VCVTPH2PS", "VCVTPS2DQ", "VCVTPS2PD", "VCVTPS2PH",
"VCVTPS2QQ", "VCVTPS2UDQ", "VCVTPS2UQQ", "VCVTQQ2PD", "VCVTQQ2PS",
"VCVTSD2SI", "VCVTSD2SS", "VCVTSD2USI", "VCVTSI2SD", "VCVTSI2SS",
"VCVTSS2SD", "VCVTSS2SI", "VCVTSS2USI", "VCVTTPD2DQ", "VCVTTPD2QQ",
"VCVTTPD2UDQ", "VCVTTPD2UQQ", "VCVTTPS2DQ", "VCVTTPS2QQ", "VCVTTPS2UDQ",
"VCVTTPS2UQQ", "VCVTTSD2SI", "VCVTTSD2USI", "VCVTTSS2SI", "VCVTTSS2USI",
"VCVTUDQ2PD", "VCVTUDQ2PS", "VCVTUQQ2PD", "VCVTUQQ2PS", "VCVTUSI2SD",
"VCVTUSI2SS", "VDBPSADBW", "VDIVPD", "VDIVPS", "VDIVSD", "VDIVSS",
"VDPBF16PS", "VDPPD", "VDPPS", "VERR", "VERW", "VEXP2PD", "VEXP2PS",
"VEXPANDPD", "VEXPANDPS", "VEXTRACTF128", "VEXTRACTF32X4", "VEXTRACTF32X8",
"VEXTRACTF64X2", "VEXTRACTF64X4", "VEXTRACTI128", "VEXTRACTI32X4",
"VEXTRACTI32X8", "VEXTRACTI64X2", "VEXTRACTI64X4", "VEXTRACTPS",
"VFIXUPIMMPD", "VFIXUPIMMPS", "VFIXUPIMMSD", "VFIXUPIMMSS", "VFMADD132PD",
"VFMADD132PS", "VFMADD132SD", "VFMADD132SS", "VFMADD213PD", "VFMADD213PS",
"VFMADD213SD", "VFMADD213SS", "VFMADD231PD", "VFMADD231PS", "VFMADD231SD",
"VFMADD231SS", "VFMADDPD", "VFMADDPS", "VFMADDSD", "VFMADDSS",
"VFMADDSUB132PD", "VFMADDSUB132PS", "VFMADDSUB213PD", "VFMADDSUB213PS",
"VFMADDSUB231PD", "VFMADDSUB231PS", "VFMADDSUBPD", "VFMADDSUBPS",
"VFMSUB132PD", "VFMSUB132PS", "VFMSUB132SD", "VFMSUB132SS", "VFMSUB213PD",
"VFMSUB213PS", "VFMSUB213SD", "VFMSUB213SS", "VFMSUB231PD", "VFMSUB231PS",
"VFMSUB231SD", "VFMSUB231SS", "VFMSUBADD132PD", "VFMSUBADD132PS",
"VFMSUBADD213PD", "VFMSUBADD213PS", "VFMSUBADD231PD", "VFMSUBADD231PS",
"VFMSUBADDPD", "VFMSUBADDPS", "VFMSUBPD", "VFMSUBPS", "VFMSUBSD",
"VFMSUBSS", "VFNMADD132PD", "VFNMADD132PS", "VFNMADD132SD", "VFNMADD132SS",
"TDPBSSD", "TDPBSUD", "TDPBUSD", "TDPBUUD", "TEST", "TESTUI",
"TILELOADD", "TILELOADDT1", "TILERELEASE", "TILESTORED", "TILEZERO",
"TLBSYNC", "TPAUSE", "TZCNT", "TZMSK", "UCOMISD", "UCOMISS",
"UD0", "UD1", "UD2", "UIRET", "UMONITOR", "UMWAIT", "UNPCKHPD",
"UNPCKHPS", "UNPCKLPD", "UNPCKLPS", "V4FMADDPS", "V4FMADDSS",
"V4FNMADDPS", "V4FNMADDSS", "VADDPD", "VADDPS", "VADDSD", "VADDSS",
"VADDSUBPD", "VADDSUBPS", "VAESDEC", "VAESDECLAST", "VAESENC",
"VAESENCLAST", "VAESIMC", "VAESKEYGENASSIST", "VALIGND", "VALIGNQ",
"VANDNPD", "VANDNPS", "VANDPD", "VANDPS", "VBLENDMPD", "VBLENDMPS",
"VBLENDPD", "VBLENDPS", "VBLENDVPD", "VBLENDVPS", "VBROADCASTF128",
"VBROADCASTF32X2", "VBROADCASTF32X4", "VBROADCASTF32X8", "VBROADCASTF64X2",
"VBROADCASTF64X4", "VBROADCASTI128", "VBROADCASTI32X2", "VBROADCASTI32X4",
"VBROADCASTI32X8", "VBROADCASTI64X2", "VBROADCASTI64X4", "VBROADCASTSD",
"VBROADCASTSS", "VCMPPD", "VCMPPS", "VCMPSD", "VCMPSS", "VCOMISD",
"VCOMISS", "VCOMPRESSPD", "VCOMPRESSPS", "VCVTDQ2PD", "VCVTDQ2PS",
"VCVTNE2PS2BF16", "VCVTNEPS2BF16", "VCVTPD2DQ", "VCVTPD2PS",
"VCVTPD2QQ", "VCVTPD2UDQ", "VCVTPD2UQQ", "VCVTPH2PS", "VCVTPS2DQ",
"VCVTPS2PD", "VCVTPS2PH", "VCVTPS2QQ", "VCVTPS2UDQ", "VCVTPS2UQQ",
"VCVTQQ2PD", "VCVTQQ2PS", "VCVTSD2SI", "VCVTSD2SS", "VCVTSD2USI",
"VCVTSI2SD", "VCVTSI2SS", "VCVTSS2SD", "VCVTSS2SI", "VCVTSS2USI",
"VCVTTPD2DQ", "VCVTTPD2QQ", "VCVTTPD2UDQ", "VCVTTPD2UQQ", "VCVTTPS2DQ",
"VCVTTPS2QQ", "VCVTTPS2UDQ", "VCVTTPS2UQQ", "VCVTTSD2SI", "VCVTTSD2USI",
"VCVTTSS2SI", "VCVTTSS2USI", "VCVTUDQ2PD", "VCVTUDQ2PS", "VCVTUQQ2PD",
"VCVTUQQ2PS", "VCVTUSI2SD", "VCVTUSI2SS", "VDBPSADBW", "VDIVPD",
"VDIVPS", "VDIVSD", "VDIVSS", "VDPBF16PS", "VDPPD", "VDPPS",
"VERR", "VERW", "VEXP2PD", "VEXP2PS", "VEXPANDPD", "VEXPANDPS",
"VEXTRACTF128", "VEXTRACTF32X4", "VEXTRACTF32X8", "VEXTRACTF64X2",
"VEXTRACTF64X4", "VEXTRACTI128", "VEXTRACTI32X4", "VEXTRACTI32X8",
"VEXTRACTI64X2", "VEXTRACTI64X4", "VEXTRACTPS", "VFIXUPIMMPD",
"VFIXUPIMMPS", "VFIXUPIMMSD", "VFIXUPIMMSS", "VFMADD132PD", "VFMADD132PS",
"VFMADD132SD", "VFMADD132SS", "VFMADD213PD", "VFMADD213PS", "VFMADD213SD",
"VFMADD213SS", "VFMADD231PD", "VFMADD231PS", "VFMADD231SD", "VFMADD231SS",
"VFMADDPD", "VFMADDPS", "VFMADDSD", "VFMADDSS", "VFMADDSUB132PD",
"VFMADDSUB132PS", "VFMADDSUB213PD", "VFMADDSUB213PS", "VFMADDSUB231PD",
"VFMADDSUB231PS", "VFMADDSUBPD", "VFMADDSUBPS", "VFMSUB132PD",
"VFMSUB132PS", "VFMSUB132SD", "VFMSUB132SS", "VFMSUB213PD", "VFMSUB213PS",
"VFMSUB213SD", "VFMSUB213SS", "VFMSUB231PD", "VFMSUB231PS", "VFMSUB231SD",
"VFMSUB231SS", "VFMSUBADD132PD", "VFMSUBADD132PS", "VFMSUBADD213PD",
"VFMSUBADD213PS", "VFMSUBADD231PD", "VFMSUBADD231PS", "VFMSUBADDPD",
"VFMSUBADDPS", "VFMSUBPD", "VFMSUBPS", "VFMSUBSD", "VFMSUBSS",
"VFNMADD132PD", "VFNMADD132PS", "VFNMADD132SD", "VFNMADD132SS",
"VFNMADD213PD", "VFNMADD213PS", "VFNMADD213SD", "VFNMADD213SS",
"VFNMADD231PD", "VFNMADD231PS", "VFNMADD231SD", "VFNMADD231SS",
"VFNMADDPD", "VFNMADDPS", "VFNMADDSD", "VFNMADDSS", "VFNMSUB132PD",

1234
bddisasm/include/table_evex.h
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2810
bddisasm/include/table_root.h
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1202
bddisasm/include/table_vex.h
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154
bddisasm/include/table_xop.h
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@ -10,13 +10,13 @@ const ND_TABLE_INSTRUCTION gXopTable_root_0a_10_leaf =
const ND_TABLE_INSTRUCTION gXopTable_root_0a_12_00_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[595]
(const void *)&gInstructions[597]
};
const ND_TABLE_INSTRUCTION gXopTable_root_0a_12_01_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[596]
(const void *)&gInstructions[598]
};
const ND_TABLE_MODRM_REG gXopTable_root_0a_12_modrmreg =
@ -330,13 +330,13 @@ const ND_TABLE_INSTRUCTION gXopTable_root_09_01_06_leaf =
const ND_TABLE_INSTRUCTION gXopTable_root_09_01_07_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[1313]
(const void *)&gInstructions[1317]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_01_04_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[1336]
(const void *)&gInstructions[1341]
};
const ND_TABLE_MODRM_REG gXopTable_root_09_01_modrmreg =
@ -384,13 +384,13 @@ const ND_TABLE_MODRM_REG gXopTable_root_09_02_modrmreg =
const ND_TABLE_INSTRUCTION gXopTable_root_09_12_reg_00_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[577]
(const void *)&gInstructions[579]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_12_reg_01_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[1265]
(const void *)&gInstructions[1268]
};
const ND_TABLE_MODRM_REG gXopTable_root_09_12_reg_modrmreg =
@ -420,127 +420,127 @@ const ND_TABLE_MODRM_MOD gXopTable_root_09_12_modrmmod =
const ND_TABLE_INSTRUCTION gXopTable_root_09_81_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[1687]
(const void *)&gInstructions[1693]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_80_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[1688]
(const void *)&gInstructions[1694]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_83_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[1689]
(const void *)&gInstructions[1695]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_82_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[1690]
(const void *)&gInstructions[1696]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_c2_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2076]
(const void *)&gInstructions[2086]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_c3_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2077]
(const void *)&gInstructions[2087]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_c1_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2078]
(const void *)&gInstructions[2088]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_cb_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2080]
(const void *)&gInstructions[2090]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_d2_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2082]
(const void *)&gInstructions[2092]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_d3_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2083]
(const void *)&gInstructions[2093]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_d1_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2084]
(const void *)&gInstructions[2094]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_db_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2085]
(const void *)&gInstructions[2095]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_d6_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2086]
(const void *)&gInstructions[2096]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_d7_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2087]
(const void *)&gInstructions[2097]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_c6_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2089]
(const void *)&gInstructions[2099]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_c7_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2090]
(const void *)&gInstructions[2100]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_e1_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2092]
(const void *)&gInstructions[2102]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_e3_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2094]
(const void *)&gInstructions[2104]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_e2_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2097]
(const void *)&gInstructions[2107]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_90_00_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2259]
(const void *)&gInstructions[2269]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_90_01_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2260]
(const void *)&gInstructions[2270]
};
const ND_TABLE_VEX_W gXopTable_root_09_90_w =
@ -555,13 +555,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_90_w =
const ND_TABLE_INSTRUCTION gXopTable_root_09_92_00_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2262]
(const void *)&gInstructions[2272]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_92_01_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2263]
(const void *)&gInstructions[2273]
};
const ND_TABLE_VEX_W gXopTable_root_09_92_w =
@ -576,13 +576,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_92_w =
const ND_TABLE_INSTRUCTION gXopTable_root_09_93_00_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2265]
(const void *)&gInstructions[2275]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_93_01_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2266]
(const void *)&gInstructions[2276]
};
const ND_TABLE_VEX_W gXopTable_root_09_93_w =
@ -597,13 +597,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_93_w =
const ND_TABLE_INSTRUCTION gXopTable_root_09_91_00_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2268]
(const void *)&gInstructions[2278]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_91_01_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2269]
(const void *)&gInstructions[2279]
};
const ND_TABLE_VEX_W gXopTable_root_09_91_w =
@ -618,13 +618,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_91_w =
const ND_TABLE_INSTRUCTION gXopTable_root_09_98_00_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2276]
(const void *)&gInstructions[2286]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_98_01_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2277]
(const void *)&gInstructions[2287]
};
const ND_TABLE_VEX_W gXopTable_root_09_98_w =
@ -639,13 +639,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_98_w =
const ND_TABLE_INSTRUCTION gXopTable_root_09_9a_00_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2278]
(const void *)&gInstructions[2288]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_9a_01_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2279]
(const void *)&gInstructions[2289]
};
const ND_TABLE_VEX_W gXopTable_root_09_9a_w =
@ -660,13 +660,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_9a_w =
const ND_TABLE_INSTRUCTION gXopTable_root_09_9b_00_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2280]
(const void *)&gInstructions[2290]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_9b_01_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2281]
(const void *)&gInstructions[2291]
};
const ND_TABLE_VEX_W gXopTable_root_09_9b_w =
@ -681,13 +681,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_9b_w =
const ND_TABLE_INSTRUCTION gXopTable_root_09_99_00_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2282]
(const void *)&gInstructions[2292]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_99_01_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2283]
(const void *)&gInstructions[2293]
};
const ND_TABLE_VEX_W gXopTable_root_09_99_w =
@ -702,13 +702,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_99_w =
const ND_TABLE_INSTRUCTION gXopTable_root_09_94_00_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2284]
(const void *)&gInstructions[2294]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_94_01_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2285]
(const void *)&gInstructions[2295]
};
const ND_TABLE_VEX_W gXopTable_root_09_94_w =
@ -723,13 +723,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_94_w =
const ND_TABLE_INSTRUCTION gXopTable_root_09_95_01_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2286]
(const void *)&gInstructions[2296]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_95_00_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2297]
(const void *)&gInstructions[2307]
};
const ND_TABLE_VEX_W gXopTable_root_09_95_w =
@ -744,13 +744,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_95_w =
const ND_TABLE_INSTRUCTION gXopTable_root_09_96_01_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2287]
(const void *)&gInstructions[2297]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_96_00_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2288]
(const void *)&gInstructions[2298]
};
const ND_TABLE_VEX_W gXopTable_root_09_96_w =
@ -765,13 +765,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_96_w =
const ND_TABLE_INSTRUCTION gXopTable_root_09_97_00_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2295]
(const void *)&gInstructions[2305]
};
const ND_TABLE_INSTRUCTION gXopTable_root_09_97_01_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2296]
(const void *)&gInstructions[2306]
};
const ND_TABLE_VEX_W gXopTable_root_09_97_w =
@ -1049,13 +1049,13 @@ const ND_TABLE_OPCODE gXopTable_root_09_opcode =
const ND_TABLE_INSTRUCTION gXopTable_root_08_a2_00_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[1962]
(const void *)&gInstructions[1968]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_a2_01_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[1963]
(const void *)&gInstructions[1969]
};
const ND_TABLE_VEX_W gXopTable_root_08_a2_w =
@ -1070,133 +1070,133 @@ const ND_TABLE_VEX_W gXopTable_root_08_a2_w =
const ND_TABLE_INSTRUCTION gXopTable_root_08_cc_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[1992]
(const void *)&gInstructions[1998]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_ce_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[1993]
(const void *)&gInstructions[1999]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_cf_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[1998]
(const void *)&gInstructions[2004]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_ec_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[1999]
(const void *)&gInstructions[2005]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_ee_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2000]
(const void *)&gInstructions[2006]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_ef_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2001]
(const void *)&gInstructions[2007]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_ed_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2002]
(const void *)&gInstructions[2008]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_cd_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2003]
(const void *)&gInstructions[2009]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_9e_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2112]
(const void *)&gInstructions[2122]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_9f_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2113]
(const void *)&gInstructions[2123]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_97_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2114]
(const void *)&gInstructions[2124]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_8e_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2115]
(const void *)&gInstructions[2125]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_8f_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2116]
(const void *)&gInstructions[2126]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_87_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2117]
(const void *)&gInstructions[2127]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_86_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2118]
(const void *)&gInstructions[2128]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_85_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2119]
(const void *)&gInstructions[2129]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_96_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2120]
(const void *)&gInstructions[2130]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_95_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2121]
(const void *)&gInstructions[2131]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_a6_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2122]
(const void *)&gInstructions[2132]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_b6_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2123]
(const void *)&gInstructions[2133]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_a3_00_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2248]
(const void *)&gInstructions[2258]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_a3_01_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2249]
(const void *)&gInstructions[2259]
};
const ND_TABLE_VEX_W gXopTable_root_08_a3_w =
@ -1211,25 +1211,25 @@ const ND_TABLE_VEX_W gXopTable_root_08_a3_w =
const ND_TABLE_INSTRUCTION gXopTable_root_08_c0_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2258]
(const void *)&gInstructions[2268]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_c2_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2261]
(const void *)&gInstructions[2271]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_c3_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2264]
(const void *)&gInstructions[2274]
};
const ND_TABLE_INSTRUCTION gXopTable_root_08_c1_leaf =
{
ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[2267]
(const void *)&gInstructions[2277]
};
const ND_TABLE_OPCODE gXopTable_root_08_opcode =

1
bddisasm/include/tabledefs.h
View File

@ -398,6 +398,7 @@ typedef enum _ND_OPERAND_TYPE_SPEC
ND_OPT_MXCSR,
ND_OPT_PKRU,
ND_OPT_SSP,
ND_OPT_UIF,
// General Purpose REgisters.
ND_OPT_GPR_AH,

1
bddisasm_test/avx/avxvnni_64 Normal file
View File

@ -0,0 +1 @@
ﾄ窕P#ﾄ竈P#ﾄ窕Q#ﾄ竈Q#ﾄ窕R#ﾄ竈R#ﾄ窕S#ﾄ竈S#

10
bddisasm_test/avx/avxvnni_64.asm Normal file
View File

@ -0,0 +1,10 @@
bits 64
db 0xc4, 0xe2, 0x79, 0x50, 0x23 ; VPDPBUSD xmm4, xmm0, xmmword ptr [rbx]
db 0xc4, 0xe2, 0x7d, 0x50, 0x23 ; VPDPBUSD ymm4, ymm0, ymmword ptr [rbx]
db 0xc4, 0xe2, 0x79, 0x51, 0x23 ; VPDPBUSDS xmm4, xmm0, xmmword ptr [rbx]
db 0xc4, 0xe2, 0x7d, 0x51, 0x23 ; VPDPBUSDS ymm4, ymm0, ymmword ptr [rbx]
db 0xc4, 0xe2, 0x79, 0x52, 0x23 ; VPDPWSSD xmm4, xmm0, xmmword ptr [rbx]
db 0xc4, 0xe2, 0x7d, 0x52, 0x23 ; VPDPWSSD ymm4, ymm0, ymmword ptr [rbx]
db 0xc4, 0xe2, 0x79, 0x53, 0x23 ; VPDPWSSDS xmm4, xmm0, xmmword ptr [rbx]
db 0xc4, 0xe2, 0x7d, 0x53, 0x23 ; VPDPWSSDS ymm4, ymm0, ymmword ptr [rbx]

152
bddisasm_test/avx/avxvnni_64.result Normal file
View File

@ -0,0 +1,152 @@
0000000000000000 c4e2795023 VPDPBUSD xmm4, xmm0, xmmword ptr [rbx]
DSIZE: 32, ASIZE: 64, VLEN: 128
ISA Set: AVXVNNI, Ins cat: AVXVNNI, CET tracked: no
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: eax, bit: 4
Exception class: SSE/VEX, exception type: 4
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: RW, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 4, RegCount: 1
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: V, RegType: Vector, RegSize: 16, RegId: 0, RegCount: 1
Operand: 2, Acc: R-, Type: Memory, Size: 16, RawSize: 16, Encoding: M,
Segment: 3, Base: 3,
0000000000000005 c4e27d5023 VPDPBUSD ymm4, ymm0, ymmword ptr [rbx]
DSIZE: 32, ASIZE: 64, VLEN: 256
ISA Set: AVXVNNI, Ins cat: AVXVNNI, CET tracked: no
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: eax, bit: 4
Exception class: SSE/VEX, exception type: 4
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: RW, Type: Register, Size: 32, RawSize: 32, Encoding: R, RegType: Vector, RegSize: 32, RegId: 4, RegCount: 1
Operand: 1, Acc: R-, Type: Register, Size: 32, RawSize: 32, Encoding: V, RegType: Vector, RegSize: 32, RegId: 0, RegCount: 1
Operand: 2, Acc: R-, Type: Memory, Size: 32, RawSize: 32, Encoding: M,
Segment: 3, Base: 3,
000000000000000A c4e2795123 VPDPBUSDS xmm4, xmm0, xmmword ptr [rbx]
DSIZE: 32, ASIZE: 64, VLEN: 128
ISA Set: AVXVNNI, Ins cat: AVXVNNI, CET tracked: no
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: eax, bit: 4
Exception class: SSE/VEX, exception type: 4
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: RW, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 4, RegCount: 1
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: V, RegType: Vector, RegSize: 16, RegId: 0, RegCount: 1
Operand: 2, Acc: R-, Type: Memory, Size: 16, RawSize: 16, Encoding: M,
Segment: 3, Base: 3,
000000000000000F c4e27d5123 VPDPBUSDS ymm4, ymm0, ymmword ptr [rbx]
DSIZE: 32, ASIZE: 64, VLEN: 256
ISA Set: AVXVNNI, Ins cat: AVXVNNI, CET tracked: no
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: eax, bit: 4
Exception class: SSE/VEX, exception type: 4
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: RW, Type: Register, Size: 32, RawSize: 32, Encoding: R, RegType: Vector, RegSize: 32, RegId: 4, RegCount: 1
Operand: 1, Acc: R-, Type: Register, Size: 32, RawSize: 32, Encoding: V, RegType: Vector, RegSize: 32, RegId: 0, RegCount: 1
Operand: 2, Acc: R-, Type: Memory, Size: 32, RawSize: 32, Encoding: M,
Segment: 3, Base: 3,
0000000000000014 c4e2795223 VPDPWSSD xmm4, xmm0, xmmword ptr [rbx]
DSIZE: 32, ASIZE: 64, VLEN: 128
ISA Set: AVXVNNI, Ins cat: AVXVNNI, CET tracked: no
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: eax, bit: 4
Exception class: SSE/VEX, exception type: 4
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: RW, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 4, RegCount: 1
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: V, RegType: Vector, RegSize: 16, RegId: 0, RegCount: 1
Operand: 2, Acc: R-, Type: Memory, Size: 16, RawSize: 16, Encoding: M,
Segment: 3, Base: 3,
0000000000000019 c4e27d5223 VPDPWSSD ymm4, ymm0, ymmword ptr [rbx]
DSIZE: 32, ASIZE: 64, VLEN: 256
ISA Set: AVXVNNI, Ins cat: AVXVNNI, CET tracked: no
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: eax, bit: 4
Exception class: SSE/VEX, exception type: 4
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: RW, Type: Register, Size: 32, RawSize: 32, Encoding: R, RegType: Vector, RegSize: 32, RegId: 4, RegCount: 1
Operand: 1, Acc: R-, Type: Register, Size: 32, RawSize: 32, Encoding: V, RegType: Vector, RegSize: 32, RegId: 0, RegCount: 1
Operand: 2, Acc: R-, Type: Memory, Size: 32, RawSize: 32, Encoding: M,
Segment: 3, Base: 3,
000000000000001E c4e2795323 VPDPWSSDS xmm4, xmm0, xmmword ptr [rbx]
DSIZE: 32, ASIZE: 64, VLEN: 128
ISA Set: AVXVNNI, Ins cat: AVXVNNI, CET tracked: no
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: eax, bit: 4
Exception class: SSE/VEX, exception type: 4
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: RW, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 4, RegCount: 1
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: V, RegType: Vector, RegSize: 16, RegId: 0, RegCount: 1
Operand: 2, Acc: R-, Type: Memory, Size: 16, RawSize: 16, Encoding: M,
Segment: 3, Base: 3,
0000000000000023 c4e27d5323 VPDPWSSDS ymm4, ymm0, ymmword ptr [rbx]
DSIZE: 32, ASIZE: 64, VLEN: 256
ISA Set: AVXVNNI, Ins cat: AVXVNNI, CET tracked: no
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: eax, bit: 4
Exception class: SSE/VEX, exception type: 4
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: RW, Type: Register, Size: 32, RawSize: 32, Encoding: R, RegType: Vector, RegSize: 32, RegId: 4, RegCount: 1
Operand: 1, Acc: R-, Type: Register, Size: 32, RawSize: 32, Encoding: V, RegType: Vector, RegSize: 32, RegId: 0, RegCount: 1
Operand: 2, Acc: R-, Type: Memory, Size: 32, RawSize: 32, Encoding: M,
Segment: 3, Base: 3,

BIN
bddisasm_test/basic/system_64
View File

Binary file not shown.

2
bddisasm_test/basic/system_64.asm
View File

@ -54,3 +54,5 @@
wbinvd
db 0x0F, 0x01, 0xE8 ; serialize
db 0xF3, 0x0F, 0x3A, 0xF0, 0xC0, 0xBD ; hreset

16
bddisasm_test/basic/system_64.result
View File

@ -661,3 +661,19 @@
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
0000000000000087 f30f3af0c0bd HRESET 0xbd
DSIZE: 32, ASIZE: 64, VLEN: -
ISA Set: HRESET, Ins cat: HRESET, CET tracked: no
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: eax, bit: 22
Valid modes
R0: yes, R1: no, R2: no, R3: no
Real: yes, V8086: no, Prot: yes, Compat: yes, Long: yes
SMM on: yes, SMM off: yes, SGX on: no, SGX off: yes, TSX on: no, TSX off: yes
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: --, Type: Immediate, Size: 1, RawSize: 1, Encoding: I
Operand: 1, Acc: R-, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: General Purpose, RegSize: 4, RegId: 0, RegCount: 1

1
bddisasm_test/uintr/uintr_64 Normal file
View File

@ -0,0 +1 @@
<EFBFBD><01><><01><><01><><01><><0F><>

7
bddisasm_test/uintr/uintr_64.asm Normal file
View File

@ -0,0 +1,7 @@
bits 64
db 0xf3, 0x0f, 0x01, 0xec ; uiret
db 0xf3, 0x0f, 0x01, 0xed ; testui
db 0xf3, 0x0f, 0x01, 0xee ; clui
db 0xf3, 0x0f, 0x01, 0xef ; stui
db 0xf3, 0x0f, 0xc7, 0xf1 ; senduipi rcx

87
bddisasm_test/uintr/uintr_64.result Normal file
View File

@ -0,0 +1,87 @@
0000000000000000 f30f01ec UIRET
DSIZE: 64, ASIZE: 64, VLEN: -
ISA Set: UINTR, Ins cat: UINTR, CET tracked: no
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: edx, bit: 5
FLAGS access
Entire register
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: no, V8086: no, Prot: no, Compat: no, Long: yes
SMM on: yes, SMM off: yes, SGX on: no, SGX off: yes, TSX on: no, TSX off: yes
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: IP, RegSize: 8, RegId: 0, RegCount: 1
Operand: 1, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: Flags, RegSize: 8, RegId: 0, RegCount: 1
Operand: 2, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: General Purpose, RegSize: 8, RegId: 4, RegCount: 1
Operand: 3, Acc: -W, Type: Register, Size: 1, RawSize: 1, Encoding: S, RegType: UIF, RegSize: 1, RegId: 0, RegCount: 1
Operand: 4, Acc: R-, Type: Memory, Size: 24, RawSize: 24, Encoding: S, Stack: yes,
Segment: 2, Base: 4,
Operand: 5, Acc: R-, Type: Memory, Size: 8, RawSize: 8, Encoding: S, Shadow stack: 3,
0000000000000004 f30f01ed TESTUI
DSIZE: 32, ASIZE: 64, VLEN: -
ISA Set: UINTR, Ins cat: UINTR, CET tracked: no
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: edx, bit: 5
FLAGS access
CF: m, PF: 0, AF: 0, ZF: 0, SF: 0, OF: 0,
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: no, V8086: no, Prot: no, Compat: no, Long: yes
SMM on: yes, SMM off: yes, SGX on: no, SGX off: yes, TSX on: yes, TSX off: yes
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: R-, Type: Register, Size: 1, RawSize: 1, Encoding: S, RegType: UIF, RegSize: 1, RegId: 0, RegCount: 1
Operand: 1, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: Flags, RegSize: 4, RegId: 0, RegCount: 1
0000000000000008 f30f01ee CLUI
DSIZE: 32, ASIZE: 64, VLEN: -
ISA Set: UINTR, Ins cat: UINTR, CET tracked: no
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: edx, bit: 5
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: no, V8086: no, Prot: no, Compat: no, Long: yes
SMM on: yes, SMM off: yes, SGX on: no, SGX off: yes, TSX on: no, TSX off: yes
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: -W, Type: Register, Size: 1, RawSize: 1, Encoding: S, RegType: UIF, RegSize: 1, RegId: 0, RegCount: 1
000000000000000C f30f01ef STUI
DSIZE: 32, ASIZE: 64, VLEN: -
ISA Set: UINTR, Ins cat: UINTR, CET tracked: no
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: edx, bit: 5
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: no, V8086: no, Prot: no, Compat: no, Long: yes
SMM on: yes, SMM off: yes, SGX on: no, SGX off: yes, TSX on: no, TSX off: yes
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: -W, Type: Register, Size: 1, RawSize: 1, Encoding: S, RegType: UIF, RegSize: 1, RegId: 0, RegCount: 1
0000000000000010 f30fc7f1 SENDUIPI rcx
DSIZE: 32, ASIZE: 64, VLEN: -
ISA Set: UINTR, Ins cat: UINTR, CET tracked: no
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: edx, bit: 5
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: no, V8086: no, Prot: no, Compat: no, Long: yes
SMM on: yes, SMM off: yes, SGX on: no, SGX off: yes, TSX on: no, TSX off: yes
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: RW, Type: Register, Size: 8, RawSize: 8, Encoding: M, RegType: General Purpose, RegSize: 8, RegId: 1, RegCount: 1

7
disasmtool/disasmtool.c
View File

@ -115,6 +115,7 @@ const char* set_to_string(
case ND_SET_AVX512VNNI: return "AVX512VNNI";
case ND_SET_AVX512VP2INTERSECT: return "AVX512VP2INTERSECT";
case ND_SET_AVX512VPOPCNTDQ: return "AVX512VPOPCNTDQ";
case ND_SET_AVXVNNI: return "AVXVNNI";
case ND_SET_BMI1: return "BMI1";
case ND_SET_BMI2: return "BMI2";
case ND_SET_CET_SS: return "CET_SS";
@ -133,6 +134,7 @@ const char* set_to_string(
case ND_SET_FMA4: return "FMA4";
case ND_SET_FXSAVE: return "FXSAVE";
case ND_SET_GFNI: return "GFNI";
case ND_SET_HRESET: return "HRESET";
case ND_SET_I186: return "I186";
case ND_SET_I286PROT: return "I286PROT";
case ND_SET_I286REAL: return "I286REAL";
@ -191,6 +193,7 @@ const char* set_to_string(
case ND_SET_TSX: return "TSX";
case ND_SET_TSXLDTRK: return "TSXLDTRK";
case ND_SET_UD: return "UD";
case ND_SET_UINTR: return "UINTR";
case ND_SET_UNKNOWN: return "UNKNOWN";
case ND_SET_VAES: return "VAES";
case ND_SET_VPCLMULQDQ: return "VPCLMULQDQ";
@ -228,6 +231,7 @@ const char* category_to_string(
case ND_CAT_AVX512BF16: return "AVX512BF16";
case ND_CAT_AVX512VBMI: return "AVX512VBMI";
case ND_CAT_AVX512VP2INTERSECT: return "AVX512VP2INTERSECT";
case ND_CAT_AVXVNNI: return "AVXVNNI";
case ND_CAT_BITBYTE: return "BITBYTE";
case ND_CAT_BLEND: return "BLEND";
case ND_CAT_BMI1: return "BMI1";
@ -249,6 +253,7 @@ const char* category_to_string(
case ND_CAT_FMA4: return "FMA4";
case ND_CAT_GATHER: return "GATHER";
case ND_CAT_GFNI: return "GFNI";
case ND_CAT_HRESET: return "HRESET";
case ND_CAT_I386: return "I386";
case ND_CAT_IFMA: return "IFMA";
case ND_CAT_INTERRUPT: return "INTERRUPT";
@ -297,6 +302,7 @@ const char* category_to_string(
case ND_CAT_SYSTEM: return "SYSTEM";
case ND_CAT_TDX: return "TDX";
case ND_CAT_UD: return "UD";
case ND_CAT_UINTR: return "UINTR";
case ND_CAT_UNCOND_BR: return "UNCOND_BR";
case ND_CAT_UNKNOWN: return "UNKNOWN";
case ND_CAT_VAES: return "VAES";
@ -368,6 +374,7 @@ const char* regtype_to_string(
case ND_REG_SSP: return "SSP";
case ND_REG_FLG: return "Flags";
case ND_REG_RIP: return "IP";
case ND_REG_UIF: return "UIF";
default: return "???";
}
}

18
disasmtool_lix/dumpers.cpp
View File

@ -1540,6 +1540,14 @@ std::string ins_class_to_str(const ND_INS_CLASS cls)
case ND_INS_XSUSLDTRK: return "xsusldtrk";
case ND_INS_XSTORE: return "xstore";
case ND_INS_XTEST: return "xtest";
case ND_INS_HRESET: return "hreset";
case ND_INS_CLUI: return "clui";
case ND_INS_STUI: return "stui";
case ND_INS_TESTUI: return "testui";
case ND_INS_UIRET: return "uiret";
case ND_INS_SENDUIPI: return "senduipi";
}
return "<unknown>";
@ -1562,6 +1570,7 @@ std::string ins_cat_to_str(ND_INS_CATEGORY category)
case ND_CAT_AVX512BF16: return "avx512bf16";
case ND_CAT_AVX512VBMI: return "avx512vbmi";
case ND_CAT_AVX512VP2INTERSECT: return "avx512vp2intersect";
case ND_CAT_AVXVNNI: return "avxvnni";
case ND_CAT_BITBYTE: return "bitbyte";
case ND_CAT_BLEND: return "blend";
case ND_CAT_BMI1: return "bmi1";
@ -1583,6 +1592,7 @@ std::string ins_cat_to_str(ND_INS_CATEGORY category)
case ND_CAT_FMA4: return "fma4";
case ND_CAT_GATHER: return "gather";
case ND_CAT_GFNI: return "gfni";
case ND_CAT_HRESET: return "hreset";
case ND_CAT_I386: return "i386";
case ND_CAT_IFMA: return "ifma";
case ND_CAT_INTERRUPT: return "interrupt";
@ -1631,6 +1641,7 @@ std::string ins_cat_to_str(ND_INS_CATEGORY category)
case ND_CAT_SYSTEM: return "system";
case ND_CAT_TDX: return "tdx";
case ND_CAT_UD: return "ud";
case ND_CAT_UINTR: return "uintr";
case ND_CAT_UNCOND_BR: return "uncond_br";
case ND_CAT_UNKNOWN: return "unknown";
case ND_CAT_VAES: return "vaes";
@ -1684,6 +1695,7 @@ std::string ins_set_to_str(ND_INS_SET ins_set)
case ND_SET_AVX512VNNI: return "avx512vnni";
case ND_SET_AVX512VP2INTERSECT: return "avx512vp2intersect";
case ND_SET_AVX512VPOPCNTDQ: return "avx512vpopcntdq";
case ND_SET_AVXVNNI: return "avxvnni";
case ND_SET_BMI1: return "bmi1";
case ND_SET_BMI2: return "bmi2";
case ND_SET_CET_SS: return "cet_ss";
@ -1702,6 +1714,7 @@ std::string ins_set_to_str(ND_INS_SET ins_set)
case ND_SET_FMA4: return "fma4";
case ND_SET_FXSAVE: return "fxsave";
case ND_SET_GFNI: return "gfni";
case ND_SET_HRESET: return "hreset";
case ND_SET_I186: return "i186";
case ND_SET_INVLPGB: return "invlpgb";
case ND_SET_I286PROT: return "i286prot";
@ -1760,6 +1773,7 @@ std::string ins_set_to_str(ND_INS_SET ins_set)
case ND_SET_TSX: return "tsx";
case ND_SET_TSXLDTRK: return "tsxldtrk";
case ND_SET_UD: return "ud";
case ND_SET_UINTR: return "uintr";
case ND_SET_UNKNOWN: return "unknown";
case ND_SET_VAES: return "vaes";
case ND_SET_VPCLMULQDQ: return "vpclmulqdq";
@ -1855,6 +1869,8 @@ std::string reg_to_str(const int reg, const ND_REG_TYPE type)
return "flg";
case ND_REG_RIP:
return "rip";
case ND_REG_UIF:
return "uif";
}
return "<u>";
@ -1906,6 +1922,8 @@ std::string reg_type_to_str(const ND_REG_TYPE type)
return "flg";
case ND_REG_RIP:
return "rip";
case ND_REG_UIF:
return "uif";
}
return "<unknown>";

7
inc/bddisasm.h
View File

@ -376,11 +376,11 @@ typedef uint32_t ND_REG_SIZE;
//
// Sign extend 8 bit to 64 bit.
#define ND_SIGN_EX_8(x) ((x) & 0x00000080 ? 0xFFFFFFFFFFFFFF00 | (x) : (x))
#define ND_SIGN_EX_8(x) (((x) & 0x00000080) ? (0xFFFFFFFFFFFFFF00 | (x)) : (x))
// Sign extend 16 bit to 64 bit.
#define ND_SIGN_EX_16(x) ((x) & 0x00008000 ? 0xFFFFFFFFFFFF0000 | (x) : (x))
#define ND_SIGN_EX_16(x) (((x) & 0x00008000) ? (0xFFFFFFFFFFFF0000 | (x)) : (x))
// Sign extend 32 bit to 64 bit.
#define ND_SIGN_EX_32(x) ((x) & 0x80000000 ? 0xFFFFFFFF00000000 | (x) : (x))
#define ND_SIGN_EX_32(x) (((x) & 0x80000000) ? (0xFFFFFFFF00000000 | (x)) : (x))
// Wrapper for for ND_SIGN_EX_8/ND_SIGN_EX_16/ND_SIGN_EX_32. Sign extend sz bytes to 64 bits.
#define ND_SIGN_EX(sz, x) ((sz) == 1 ? ND_SIGN_EX_8(x) : (sz) == 2 ? ND_SIGN_EX_16(x) : \
(sz) == 4 ? ND_SIGN_EX_32(x) : (x))
@ -511,6 +511,7 @@ typedef enum _ND_REG_TYPE
ND_REG_SSP, // The register is the SSP (Shadow Stack Pointer) register.
ND_REG_FLG, // The register is the FLAGS register.
ND_REG_RIP, // The register is the instruction pointer register.
ND_REG_UIF, // The register is the User Interrupt Flag.
} ND_REG_TYPE;

12
inc/constants.h
View File

@ -96,6 +96,7 @@ typedef enum _ND_INS_CLASS
ND_INS_CLI,
ND_INS_CLRSSBSY,
ND_INS_CLTS,
ND_INS_CLUI,
ND_INS_CLWB,
ND_INS_CLZERO,
ND_INS_CMC,
@ -268,6 +269,7 @@ typedef enum _ND_INS_CLASS
ND_INS_HADDPD,
ND_INS_HADDPS,
ND_INS_HLT,
ND_INS_HRESET,
ND_INS_HSUBPD,
ND_INS_HSUBPS,
ND_INS_IDIV,
@ -636,6 +638,7 @@ typedef enum _ND_INS_CLASS
ND_INS_SEAMCALL,
ND_INS_SEAMOPS,
ND_INS_SEAMRET,
ND_INS_SENDUIPI,
ND_INS_SERIALIZE,
ND_INS_SETSSBSY,
ND_INS_SETcc,
@ -676,6 +679,7 @@ typedef enum _ND_INS_CLASS
ND_INS_STOS,
ND_INS_STR,
ND_INS_STTILECFG,
ND_INS_STUI,
ND_INS_SUB,
ND_INS_SUBPD,
ND_INS_SUBPS,
@ -697,6 +701,7 @@ typedef enum _ND_INS_CLASS
ND_INS_TDPBUSD,
ND_INS_TDPBUUD,
ND_INS_TEST,
ND_INS_TESTUI,
ND_INS_TILELOADD,
ND_INS_TILELOADDT1,
ND_INS_TILERELEASE,
@ -711,6 +716,7 @@ typedef enum _ND_INS_CLASS
ND_INS_UD0,
ND_INS_UD1,
ND_INS_UD2,
ND_INS_UIRET,
ND_INS_UMONITOR,
ND_INS_UMWAIT,
ND_INS_UNPCKHPD,
@ -1514,6 +1520,7 @@ typedef enum _ND_INS_SET
ND_SET_AVX512VNNI,
ND_SET_AVX512VP2INTERSECT,
ND_SET_AVX512VPOPCNTDQ,
ND_SET_AVXVNNI,
ND_SET_BMI1,
ND_SET_BMI2,
ND_SET_CET_IBT,
@ -1532,6 +1539,7 @@ typedef enum _ND_INS_SET
ND_SET_FMA4,
ND_SET_FXSAVE,
ND_SET_GFNI,
ND_SET_HRESET,
ND_SET_I186,
ND_SET_I286PROT,
ND_SET_I286REAL,
@ -1590,6 +1598,7 @@ typedef enum _ND_INS_SET
ND_SET_TSX,
ND_SET_TSXLDTRK,
ND_SET_UD,
ND_SET_UINTR,
ND_SET_UNKNOWN,
ND_SET_VAES,
ND_SET_VPCLMULQDQ,
@ -1620,6 +1629,7 @@ typedef enum _ND_INS_TYPE
ND_CAT_AVX512BF16,
ND_CAT_AVX512VBMI,
ND_CAT_AVX512VP2INTERSECT,
ND_CAT_AVXVNNI,
ND_CAT_BITBYTE,
ND_CAT_BLEND,
ND_CAT_BMI1,
@ -1641,6 +1651,7 @@ typedef enum _ND_INS_TYPE
ND_CAT_FMA4,
ND_CAT_GATHER,
ND_CAT_GFNI,
ND_CAT_HRESET,
ND_CAT_I386,
ND_CAT_IFMA,
ND_CAT_INTERRUPT,
@ -1689,6 +1700,7 @@ typedef enum _ND_INS_TYPE
ND_CAT_SYSTEM,
ND_CAT_TDX,
ND_CAT_UD,
ND_CAT_UINTR,
ND_CAT_UNCOND_BR,
ND_CAT_UNKNOWN,
ND_CAT_VAES,

4
inc/cpuidflags.h
View File

@ -76,15 +76,19 @@
#define ND_CFF_ENQCMD ND_CFF(0x00000007, 0x00000000, NDR_ECX, 29)
#define ND_CFF_AVX5124VNNIW ND_CFF(0x00000007, 0x00000000, NDR_EDX, 2)
#define ND_CFF_AVX5124FMAPS ND_CFF(0x00000007, 0x00000000, NDR_EDX, 3)
#define ND_CFF_UINTR ND_CFF(0x00000007, 0x00000000, NDR_EDX, 5)
#define ND_CFF_AVX512VP2INTERSECT ND_CFF(0x00000007, 0x00000000, NDR_EDX, 8)
#define ND_CFF_SERIALIZE ND_CFF(0x00000007, 0x00000000, NDR_EDX, 14)
#define ND_CFF_TSXLDTRK ND_CFF(0x00000007, 0x00000000, NDR_EDX, 16)
#define ND_CFF_PCONFIG ND_CFF(0x00000007, 0x00000000, NDR_EDX, 18)
#define ND_CFF_CET_IBT ND_CFF(0x00000007, 0x00000000, NDR_EDX, 20)
#define ND_CFF_AMXBF16 ND_CFF(0x00000007, 0x00000000, NDR_EDX, 22)
#define ND_CFF_AVX512FP16 ND_CFF(0x00000007, 0x00000000, NDR_EDX, 23)
#define ND_CFF_AMXTILE ND_CFF(0x00000007, 0x00000000, NDR_EDX, 24)
#define ND_CFF_AMXINT8 ND_CFF(0x00000007, 0x00000000, NDR_EDX, 25)
#define ND_CFF_AVXVNNI ND_CFF(0x00000007, 0x00000001, NDR_EAX, 4)
#define ND_CFF_AVX512BF16 ND_CFF(0x00000007, 0x00000001, NDR_EAX, 5)
#define ND_CFF_HRESET ND_CFF(0x00000007, 0x00000001, NDR_EAX, 22)
#define ND_CFF_XSAVEOPT ND_CFF(0x0000000D, 0x00000001, NDR_EAX, 0)
#define ND_CFF_XSAVEC ND_CFF(0x0000000D, 0x00000001, NDR_EAX, 1)
#define ND_CFF_XSAVES ND_CFF(0x0000000D, 0x00000001, NDR_EAX, 3)

2
inc/version.h
View File

@ -6,7 +6,7 @@
#define DISASM_VER_H
#define DISASM_VERSION_MAJOR 1
#define DISASM_VERSION_MINOR 30
#define DISASM_VERSION_MINOR 31
#define DISASM_VERSION_REVISION 0
#endif // DISASM_VER_H

2
isagenerator/disasmlib.py
View File

@ -302,6 +302,8 @@ valid_impops = {# register size
'SHS2' : ('SHSP', 'v2'), # Shadow stack push/pop, 2 words.
'SHS3' : ('SHSP', 'v3'), # Shadow stack push/pop, 3 words.
'SHS4' : ('SHSP', 'v4'), # Shadow stack push/pop, 4 words.
# User Interrupt Flag.
'UIF' : ('UIF', 'b'), # User Interrupt Flag, stored with size of 1 byte, although it is 1 bit.
}
# If an operand type is not present here, than that operand is implicit & it's not encoded inside the instruction.

1
isagenerator/generate_tables.py
View File

@ -181,6 +181,7 @@ optype = {
'MXCSR' : 'ND_OPT_MXCSR',
'PKRU' : 'ND_OPT_PKRU',
'SSP' : 'ND_OPT_SSP',
'UIF' : 'ND_OPT_UIF'
}
opsize = {

5
isagenerator/instructions/cpuid.dat
View File

@ -76,17 +76,20 @@ MOVDIR64B : 0x00000007, 0x00000000, ECX, 28
ENQCMD : 0x00000007, 0x00000000, ECX, 29
AVX5124VNNIW : 0x00000007, 0x00000000, EDX, 2
AVX5124FMAPS : 0x00000007, 0x00000000, EDX, 3
UINTR : 0x00000007, 0x00000000, EDX, 5
AVX512VP2INTERSECT : 0x00000007, 0x00000000, EDX, 8
SERIALIZE : 0x00000007, 0x00000000, EDX, 14
TSXLDTRK : 0x00000007, 0x00000000, EDX, 16
PCONFIG : 0x00000007, 0x00000000, EDX, 18
CET_IBT : 0x00000007, 0x00000000, EDX, 20
AMXBF16 : 0x00000007, 0x00000000, EDX, 22
AVX512FP16 : 0x00000007, 0x00000000, EDX, 23
AMXTILE : 0x00000007, 0x00000000, EDX, 24
AMXINT8 : 0x00000007, 0x00000000, EDX, 25
AVXVNNI : 0x00000007, 0x00000001, EAX, 4
AVX512BF16 : 0x00000007, 0x00000001, EAX, 5
HRESET : 0x00000007, 0x00000001, EAX, 22
XSAVEOPT : 0x0000000D, 0x00000001, EAX, 0
XSAVEC : 0x0000000D, 0x00000001, EAX, 1

3
isagenerator/instructions/flags.dat
View File

@ -105,3 +105,6 @@ AESKL : CF=0|PF=0|AF=0|ZF=m|SF=0|OF=0
# All flags are zeroed.
ZERO : CF=0|PF=0|AF=0|ZF=0|SF=0|OF=0
# UINTR flags access, as done by TESTUI.
UINTR : CF=m|PF=0|AF=0|ZF=0|SF=0|OF=0

5
isagenerator/instructions/table_0F.dat
View File

@ -56,8 +56,12 @@ SETSSBSY nil SHS0,SSP [ 0xF3 0x0F 0x01 /0
XSUSLDTRK nil nil [ 0xF2 0x0F 0x01 /0xE8] s:TSXLDTRK, t:MISC
XRESLDTRK nil nil [ 0xF2 0x0F 0x01 /0xE9] s:TSXLDTRK, t:MISC
SAVEPREVSSP nil SHSS,SSP [ 0xF3 0x0F 0x01 /0xEA] s:CET_SS, t:CET, w:RW|R, f:CF=t
UIRET nil rIP,Fv,sSP,UIF,Kv3,SHS1 [ 0xF3 0x0F 0x01 /0xEC] s:UINTR, t:UINTR, a:F64, w:W|W|W|W|R|R, m:O64|NOTSX|NOSGX
TESTUI nil UIF,Fv [ 0xF3 0x0F 0x01 /0xED] s:UINTR, t:UINTR, w:R|W, f:UINTR, m:O64|NOSGX
RDPKRU nil EDX,EAX,ECX,PKRU [ NP 0x0F 0x01 /0xEE] s:PKU, t:MISC, w:W|W|R|R
CLUI nil UIF [ 0xF3 0x0F 0x01 /0xEE] s:UINTR, t:UINTR, w:W, m:O64|NOTSX|NOSGX
WRPKRU nil EDX,EAX,ECX,PKRU [ NP 0x0F 0x01 /0xEF] s:PKU, t:MISC, w:R|R|R|W
STUI nil UIF [ 0xF3 0x0F 0x01 /0xEF] s:UINTR, t:UINTR, w:W, m:O64|NOTSX|NOSGX
SWAPGS nil GSBASE,KGSBASE [ 0x0F 0x01 /0xF8] s:LONGMODE, t:SYSTEM, w:RW|RW, m:KERNEL|O64
RDTSCP nil EAX,EDX,ECX,TSC,TSCAUX [ 0x0F 0x01 /0xF9] s:RDTSCP, t:SYSTEM, w:W|W|W|R|R
MONITORX nil EAX,ECX,EDX [ NP 0x0F 0x01 /0xFA] s:MWAITT, t:SYSTEM, w:R|R|R, m:KERNEL|NOV86
@ -570,6 +574,7 @@ VMXON Mq Fv [ 0xF3 0x0F 0xC7 /6
VMPTRST Mq Fv [ NP 0x0F 0xC7 /7:mem] s:VTX, t:VTX, w:W|W, f:VMX, m:VMXROOT
RDRAND Rv Fv [ 0x0F 0xC7 /6:reg] s:RDRAND, t:RDRAND, w:W|W, f:CF=m|PF=0|AF=0|ZF=0|SF=0|OF=0
RDRAND Rv Fv [ 0x66 0x0F 0xC7 /6:reg] s:RDRAND, t:RDRAND, a:S66, w:W|W, f:CF=m|PF=0|AF=0|ZF=0|SF=0|OF=0
SENDUIPI Rq nil [ 0xF3 0x0F 0xC7 /6:reg] s:UINTR, t:UINTR, w:RW, m:O64|NOTSX|NOSGX
RDSEED Rv Fv [ 0x0F 0xC7 /7:reg] s:RDSEED, t:RDSEED, w:W|W, f:CF=m|PF=0|AF=0|ZF=0|SF=0|OF=0
RDSEED Rv Fv [ 0x66 0x0F 0xC7 /7:reg] s:RDSEED, t:RDSEED, a:S66, w:W|W, f:CF=m|PF=0|AF=0|ZF=0|SF=0|OF=0
RDPID Ryf TSCAUX [ 0xF3 0x0F 0xC7 /7:reg] s:RDPID, t:RDPID, w:W|R

1
isagenerator/instructions/table_0F_3A.dat
View File

@ -66,3 +66,4 @@ AESKEYGENASSIST Vdq,Wdq,Ib nil [ 0x66 0x0F 0x
# 0xE0 - 0xEF
# 0xF0 - 0xFF
HRESET Ib EAX [ 0xF3 0x0F 0x3A 0xF0 /0xC0 ib] s:HRESET, t:HRESET, w:N|R, m:KERNEL|NOV86|NOTSX

5
isagenerator/instructions/table_vex2.dat
View File

@ -94,6 +94,11 @@ TILERELEASE nil nil [vex m:2 p:0 l:0 w:0
TILEZERO rTt nil [vex m:2 p:3 l:0 w:0 0x49 /r:reg rm:0] s:AMXTILE, t:AMX, w:W, m:NOTSX|O64, e:AMX_E5
# 0x50 - 0x5F
VPDPBUSD Vx,Hx,Wx nil [vex m:2 p:1 l:x w:0 0x50 /r] s:AVXVNNI, t:AVXVNNI, w:RW|R|R, e:4
VPDPBUSDS Vx,Hx,Wx nil [vex m:2 p:1 l:x w:0 0x51 /r] s:AVXVNNI, t:AVXVNNI, w:RW|R|R, e:4
VPDPWSSD Vx,Hx,Wx nil [vex m:2 p:1 l:x w:0 0x52 /r] s:AVXVNNI, t:AVXVNNI, w:RW|R|R, e:4
VPDPWSSDS Vx,Hx,Wx nil [vex m:2 p:1 l:x w:0 0x53 /r] s:AVXVNNI, t:AVXVNNI, w:RW|R|R, e:4
VPBROADCASTD Vx,Wd nil [vex m:2 p:1 l:x w:0 0x58 /r] s:AVX2, t:BROADCAST, w:W|R, e:6
VPBROADCASTQ Vx,Wq nil [vex m:2 p:1 l:x w:0 0x59 /r] s:AVX2, t:BROADCAST, w:W|R, e:6
VBROADCASTI128 Vqq,Mdq nil [vex m:2 p:1 l:1 w:0 0x5A /r:mem] s:AVX2, t:BROADCAST, w:W|R, e:6

1
pybddisasm/_pybddisasm/_pybddisasm.c
View File

@ -82,6 +82,7 @@ static char *RegTypeToString(ND_REG_TYPE RegType)
case ND_REG_SSP: return "SSP";
case ND_REG_FLG: return "FLG";
case ND_REG_RIP: return "RIP";
case ND_REG_UIF: return "UIF";
}
return "unknown";

2
pybddisasm/setup.py
View File

@ -12,7 +12,7 @@ from setuptools import find_packages, setup, Command, Extension, Distribution
from codecs import open
VERSION = (0, 1, 3)
LIBRARY_VERSION = (1, 30, 0)
LIBRARY_VERSION = (1, 31, 0)
LIBRARY_INSTRUX_SIZE = 864
packages = ['pybddisasm']