mirror of
https://github.com/bitdefender/bddisasm.git
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Added support for AMD RMPQUERY instruction.
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File diff suppressed because it is too large
Load Diff
@ -10,7 +10,7 @@
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#ifndef MNEMONICS_H
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#ifndef MNEMONICS_H
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#define MNEMONICS_H
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#define MNEMONICS_H
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const char *gMnemonics[1733] =
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const char *gMnemonics[1734] =
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{
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{
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"AAA", "AAD", "AADD", "AAM", "AAND", "AAS", "ADC", "ADCX", "ADD",
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"AAA", "AAD", "AADD", "AAM", "AAND", "AAS", "ADC", "ADCX", "ADD",
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"ADDPD", "ADDPS", "ADDSD", "ADDSS", "ADDSUBPD", "ADDSUBPS", "ADOX",
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"ADDPD", "ADDPS", "ADDSD", "ADDSS", "ADDSUBPD", "ADDSUBPS", "ADOX",
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@ -118,101 +118,102 @@ const char *gMnemonics[1733] =
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"PXOR", "RCL", "RCPPS", "RCPSS", "RCR", "RDFSBASE", "RDGSBASE",
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"PXOR", "RCL", "RCPPS", "RCPSS", "RCR", "RDFSBASE", "RDGSBASE",
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"RDMSR", "RDMSRLIST", "RDPID", "RDPKRU", "RDPMC", "RDPRU", "RDRAND",
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"RDMSR", "RDMSRLIST", "RDPID", "RDPKRU", "RDPMC", "RDPRU", "RDRAND",
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"RDSEED", "RDSHR", "RDSSPD", "RDSSPQ", "RDTSC", "RDTSCP", "RETF",
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"RDSEED", "RDSHR", "RDSSPD", "RDSSPQ", "RDTSC", "RDTSCP", "RETF",
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"RETN", "RMPADJUST", "RMPUPDATE", "ROL", "ROR", "RORX", "ROUNDPD",
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"RETN", "RMPADJUST", "RMPQUERY", "RMPUPDATE", "ROL", "ROR", "RORX",
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"ROUNDPS", "ROUNDSD", "ROUNDSS", "RSDC", "RSLDT", "RSM", "RSQRTPS",
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"ROUNDPD", "ROUNDPS", "ROUNDSD", "ROUNDSS", "RSDC", "RSLDT",
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"RSQRTSS", "RSTORSSP", "RSTS", "SAHF", "SAL", "SALC", "SAR",
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"RSM", "RSQRTPS", "RSQRTSS", "RSTORSSP", "RSTS", "SAHF", "SAL",
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"SARX", "SAVEPREVSSP", "SBB", "SCASB", "SCASD", "SCASQ", "SCASW",
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"SALC", "SAR", "SARX", "SAVEPREVSSP", "SBB", "SCASB", "SCASD",
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"SEAMCALL", "SEAMOPS", "SEAMRET", "SENDUIPI", "SERIALIZE", "SETBE",
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"SCASQ", "SCASW", "SEAMCALL", "SEAMOPS", "SEAMRET", "SENDUIPI",
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"SETC", "SETL", "SETLE", "SETNBE", "SETNC", "SETNL", "SETNLE",
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"SERIALIZE", "SETBE", "SETC", "SETL", "SETLE", "SETNBE", "SETNC",
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"SETNO", "SETNP", "SETNS", "SETNZ", "SETO", "SETP", "SETS", "SETSSBSY",
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"SETNL", "SETNLE", "SETNO", "SETNP", "SETNS", "SETNZ", "SETO",
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"SETZ", "SFENCE", "SGDT", "SHA1MSG1", "SHA1MSG2", "SHA1NEXTE",
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"SETP", "SETS", "SETSSBSY", "SETZ", "SFENCE", "SGDT", "SHA1MSG1",
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"SHA1RNDS4", "SHA256MSG1", "SHA256MSG2", "SHA256RNDS2", "SHL",
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"SHA1MSG2", "SHA1NEXTE", "SHA1RNDS4", "SHA256MSG1", "SHA256MSG2",
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"SHLD", "SHLX", "SHR", "SHRD", "SHRX", "SHUFPD", "SHUFPS", "SIDT",
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"SHA256RNDS2", "SHL", "SHLD", "SHLX", "SHR", "SHRD", "SHRX",
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"SKINIT", "SLDT", "SLWPCB", "SMINT", "SMSW", "SPFLT", "SQRTPD",
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"SHUFPD", "SHUFPS", "SIDT", "SKINIT", "SLDT", "SLWPCB", "SMINT",
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"SQRTPS", "SQRTSD", "SQRTSS", "STAC", "STC", "STD", "STGI", "STI",
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"SMSW", "SPFLT", "SQRTPD", "SQRTPS", "SQRTSD", "SQRTSS", "STAC",
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"STMXCSR", "STOSB", "STOSD", "STOSQ", "STOSW", "STR", "STTILECFG",
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"STC", "STD", "STGI", "STI", "STMXCSR", "STOSB", "STOSD", "STOSQ",
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"STUI", "SUB", "SUBPD", "SUBPS", "SUBSD", "SUBSS", "SVDC", "SVLDT",
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"STOSW", "STR", "STTILECFG", "STUI", "SUB", "SUBPD", "SUBPS",
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"SVTS", "SWAPGS", "SYSCALL", "SYSENTER", "SYSEXIT", "SYSRET",
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"SUBSD", "SUBSS", "SVDC", "SVLDT", "SVTS", "SWAPGS", "SYSCALL",
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"T1MSKC", "TDCALL", "TDPBF16PS", "TDPBSSD", "TDPBSUD", "TDPBUSD",
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"SYSENTER", "SYSEXIT", "SYSRET", "T1MSKC", "TDCALL", "TDPBF16PS",
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"TDPBUUD", "TDPFP16PS", "TEST", "TESTUI", "TILELOADD", "TILELOADDT1",
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"TDPBSSD", "TDPBSUD", "TDPBUSD", "TDPBUUD", "TDPFP16PS", "TEST",
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"TILERELEASE", "TILESTORED", "TILEZERO", "TLBSYNC", "TPAUSE",
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"TESTUI", "TILELOADD", "TILELOADDT1", "TILERELEASE", "TILESTORED",
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"TZCNT", "TZMSK", "UCOMISD", "UCOMISS", "UD0", "UD1", "UD2",
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"TILEZERO", "TLBSYNC", "TPAUSE", "TZCNT", "TZMSK", "UCOMISD",
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"UIRET", "UMONITOR", "UMWAIT", "UNPCKHPD", "UNPCKHPS", "UNPCKLPD",
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"UCOMISS", "UD0", "UD1", "UD2", "UIRET", "UMONITOR", "UMWAIT",
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"UNPCKLPS", "V4FMADDPS", "V4FMADDSS", "V4FNMADDPS", "V4FNMADDSS",
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"UNPCKHPD", "UNPCKHPS", "UNPCKLPD", "UNPCKLPS", "V4FMADDPS",
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"VADDPD", "VADDPH", "VADDPS", "VADDSD", "VADDSH", "VADDSS", "VADDSUBPD",
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"V4FMADDSS", "V4FNMADDPS", "V4FNMADDSS", "VADDPD", "VADDPH",
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"VADDSUBPS", "VAESDEC", "VAESDECLAST", "VAESENC", "VAESENCLAST",
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"VADDPS", "VADDSD", "VADDSH", "VADDSS", "VADDSUBPD", "VADDSUBPS",
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"VAESIMC", "VAESKEYGENASSIST", "VALIGND", "VALIGNQ", "VANDNPD",
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"VAESDEC", "VAESDECLAST", "VAESENC", "VAESENCLAST", "VAESIMC",
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"VANDNPS", "VANDPD", "VANDPS", "VBCSTNEBF162PS", "VBCSTNESH2PS",
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"VAESKEYGENASSIST", "VALIGND", "VALIGNQ", "VANDNPD", "VANDNPS",
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"VBLENDMPD", "VBLENDMPS", "VBLENDPD", "VBLENDPS", "VBLENDVPD",
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"VANDPD", "VANDPS", "VBCSTNEBF162PS", "VBCSTNESH2PS", "VBLENDMPD",
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"VBLENDVPS", "VBROADCASTF128", "VBROADCASTF32X2", "VBROADCASTF32X4",
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"VBLENDMPS", "VBLENDPD", "VBLENDPS", "VBLENDVPD", "VBLENDVPS",
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"VBROADCASTF32X8", "VBROADCASTF64X2", "VBROADCASTF64X4", "VBROADCASTI128",
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"VBROADCASTF128", "VBROADCASTF32X2", "VBROADCASTF32X4", "VBROADCASTF32X8",
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"VBROADCASTI32X2", "VBROADCASTI32X4", "VBROADCASTI32X8", "VBROADCASTI64X2",
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"VBROADCASTF64X2", "VBROADCASTF64X4", "VBROADCASTI128", "VBROADCASTI32X2",
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"VBROADCASTI64X4", "VBROADCASTSD", "VBROADCASTSS", "VCMPPD",
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"VBROADCASTI32X4", "VBROADCASTI32X8", "VBROADCASTI64X2", "VBROADCASTI64X4",
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"VCMPPH", "VCMPPS", "VCMPSD", "VCMPSH", "VCMPSS", "VCOMISD",
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"VBROADCASTSD", "VBROADCASTSS", "VCMPPD", "VCMPPH", "VCMPPS",
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"VCOMISH", "VCOMISS", "VCOMPRESSPD", "VCOMPRESSPS", "VCVTDQ2PD",
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"VCMPSD", "VCMPSH", "VCMPSS", "VCOMISD", "VCOMISH", "VCOMISS",
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"VCVTDQ2PH", "VCVTDQ2PS", "VCVTNE2PS2BF16", "VCVTNEEBF162PS",
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"VCOMPRESSPD", "VCOMPRESSPS", "VCVTDQ2PD", "VCVTDQ2PH", "VCVTDQ2PS",
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"VCVTNEEPH2PS", "VCVTNEOBF162PS", "VCVTNEOPH2PS", "VCVTNEPS2BF16",
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"VCVTNE2PS2BF16", "VCVTNEEBF162PS", "VCVTNEEPH2PS", "VCVTNEOBF162PS",
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"VCVTPD2DQ", "VCVTPD2PH", "VCVTPD2PS", "VCVTPD2QQ", "VCVTPD2UDQ",
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"VCVTNEOPH2PS", "VCVTNEPS2BF16", "VCVTPD2DQ", "VCVTPD2PH", "VCVTPD2PS",
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"VCVTPD2UQQ", "VCVTPH2DQ", "VCVTPH2PD", "VCVTPH2PS", "VCVTPH2PSX",
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"VCVTPD2QQ", "VCVTPD2UDQ", "VCVTPD2UQQ", "VCVTPH2DQ", "VCVTPH2PD",
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"VCVTPH2QQ", "VCVTPH2UDQ", "VCVTPH2UQQ", "VCVTPH2UW", "VCVTPH2W",
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"VCVTPH2PS", "VCVTPH2PSX", "VCVTPH2QQ", "VCVTPH2UDQ", "VCVTPH2UQQ",
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"VCVTPS2DQ", "VCVTPS2PD", "VCVTPS2PH", "VCVTPS2PHX", "VCVTPS2QQ",
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"VCVTPH2UW", "VCVTPH2W", "VCVTPS2DQ", "VCVTPS2PD", "VCVTPS2PH",
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"VCVTPS2UDQ", "VCVTPS2UQQ", "VCVTQQ2PD", "VCVTQQ2PH", "VCVTQQ2PS",
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"VCVTPS2PHX", "VCVTPS2QQ", "VCVTPS2UDQ", "VCVTPS2UQQ", "VCVTQQ2PD",
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"VCVTSD2SH", "VCVTSD2SI", "VCVTSD2SS", "VCVTSD2USI", "VCVTSH2SD",
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"VCVTQQ2PH", "VCVTQQ2PS", "VCVTSD2SH", "VCVTSD2SI", "VCVTSD2SS",
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"VCVTSH2SI", "VCVTSH2SS", "VCVTSH2USI", "VCVTSI2SD", "VCVTSI2SH",
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"VCVTSD2USI", "VCVTSH2SD", "VCVTSH2SI", "VCVTSH2SS", "VCVTSH2USI",
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"VCVTSI2SS", "VCVTSS2SD", "VCVTSS2SH", "VCVTSS2SI", "VCVTSS2USI",
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"VCVTSI2SD", "VCVTSI2SH", "VCVTSI2SS", "VCVTSS2SD", "VCVTSS2SH",
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"VCVTTPD2DQ", "VCVTTPD2QQ", "VCVTTPD2UDQ", "VCVTTPD2UQQ", "VCVTTPH2DQ",
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"VCVTSS2SI", "VCVTSS2USI", "VCVTTPD2DQ", "VCVTTPD2QQ", "VCVTTPD2UDQ",
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"VCVTTPH2QQ", "VCVTTPH2UDQ", "VCVTTPH2UQQ", "VCVTTPH2UW", "VCVTTPH2W",
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"VCVTTPD2UQQ", "VCVTTPH2DQ", "VCVTTPH2QQ", "VCVTTPH2UDQ", "VCVTTPH2UQQ",
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"VCVTTPS2DQ", "VCVTTPS2QQ", "VCVTTPS2UDQ", "VCVTTPS2UQQ", "VCVTTSD2SI",
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"VCVTTPH2UW", "VCVTTPH2W", "VCVTTPS2DQ", "VCVTTPS2QQ", "VCVTTPS2UDQ",
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"VCVTTSD2USI", "VCVTTSH2SI", "VCVTTSH2USI", "VCVTTSS2SI", "VCVTTSS2USI",
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"VCVTTPS2UQQ", "VCVTTSD2SI", "VCVTTSD2USI", "VCVTTSH2SI", "VCVTTSH2USI",
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"VCVTUDQ2PD", "VCVTUDQ2PH", "VCVTUDQ2PS", "VCVTUQQ2PD", "VCVTUQQ2PH",
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"VCVTTSS2SI", "VCVTTSS2USI", "VCVTUDQ2PD", "VCVTUDQ2PH", "VCVTUDQ2PS",
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"VCVTUQQ2PS", "VCVTUSI2SD", "VCVTUSI2SH", "VCVTUSI2SS", "VCVTUW2PH",
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"VCVTUQQ2PD", "VCVTUQQ2PH", "VCVTUQQ2PS", "VCVTUSI2SD", "VCVTUSI2SH",
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"VCVTW2PH", "VDBPSADBW", "VDIVPD", "VDIVPH", "VDIVPS", "VDIVSD",
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"VCVTUSI2SS", "VCVTUW2PH", "VCVTW2PH", "VDBPSADBW", "VDIVPD",
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"VDIVSH", "VDIVSS", "VDPBF16PS", "VDPPD", "VDPPS", "VERR", "VERW",
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"VDIVPH", "VDIVPS", "VDIVSD", "VDIVSH", "VDIVSS", "VDPBF16PS",
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"VEXP2PD", "VEXP2PS", "VEXPANDPD", "VEXPANDPS", "VEXTRACTF128",
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"VDPPD", "VDPPS", "VERR", "VERW", "VEXP2PD", "VEXP2PS", "VEXPANDPD",
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"VEXTRACTF32X4", "VEXTRACTF32X8", "VEXTRACTF64X2", "VEXTRACTF64X4",
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"VEXPANDPS", "VEXTRACTF128", "VEXTRACTF32X4", "VEXTRACTF32X8",
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"VEXTRACTI128", "VEXTRACTI32X4", "VEXTRACTI32X8", "VEXTRACTI64X2",
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"VEXTRACTF64X2", "VEXTRACTF64X4", "VEXTRACTI128", "VEXTRACTI32X4",
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"VEXTRACTI64X4", "VEXTRACTPS", "VFCMADDCPH", "VFCMADDCSH", "VFCMULCPH",
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"VEXTRACTI32X8", "VEXTRACTI64X2", "VEXTRACTI64X4", "VEXTRACTPS",
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"VFCMULCSH", "VFIXUPIMMPD", "VFIXUPIMMPS", "VFIXUPIMMSD", "VFIXUPIMMSS",
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"VFCMADDCPH", "VFCMADDCSH", "VFCMULCPH", "VFCMULCSH", "VFIXUPIMMPD",
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"VFMADD132PD", "VFMADD132PH", "VFMADD132PS", "VFMADD132SD", "VFMADD132SH",
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"VFIXUPIMMPS", "VFIXUPIMMSD", "VFIXUPIMMSS", "VFMADD132PD", "VFMADD132PH",
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"VFMADD132SS", "VFMADD213PD", "VFMADD213PH", "VFMADD213PS", "VFMADD213SD",
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"VFMADD132PS", "VFMADD132SD", "VFMADD132SH", "VFMADD132SS", "VFMADD213PD",
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"VFMADD213SH", "VFMADD213SS", "VFMADD231PD", "VFMADD231PH", "VFMADD231PS",
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"VFMADD213PH", "VFMADD213PS", "VFMADD213SD", "VFMADD213SH", "VFMADD213SS",
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"VFMADD231SD", "VFMADD231SH", "VFMADD231SS", "VFMADDCPH", "VFMADDCSH",
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"VFMADD231PD", "VFMADD231PH", "VFMADD231PS", "VFMADD231SD", "VFMADD231SH",
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"VFMADDPD", "VFMADDPS", "VFMADDSD", "VFMADDSS", "VFMADDSUB132PD",
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"VFMADD231SS", "VFMADDCPH", "VFMADDCSH", "VFMADDPD", "VFMADDPS",
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"VFMADDSUB132PH", "VFMADDSUB132PS", "VFMADDSUB213PD", "VFMADDSUB213PH",
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"VFMADDSD", "VFMADDSS", "VFMADDSUB132PD", "VFMADDSUB132PH", "VFMADDSUB132PS",
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"VFMADDSUB213PS", "VFMADDSUB231PD", "VFMADDSUB231PH", "VFMADDSUB231PS",
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"VFMADDSUB213PD", "VFMADDSUB213PH", "VFMADDSUB213PS", "VFMADDSUB231PD",
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"VFMADDSUBPD", "VFMADDSUBPS", "VFMSUB132PD", "VFMSUB132PH", "VFMSUB132PS",
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"VFMADDSUB231PH", "VFMADDSUB231PS", "VFMADDSUBPD", "VFMADDSUBPS",
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"VFMSUB132SD", "VFMSUB132SH", "VFMSUB132SS", "VFMSUB213PD", "VFMSUB213PH",
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"VFMSUB132PD", "VFMSUB132PH", "VFMSUB132PS", "VFMSUB132SD", "VFMSUB132SH",
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"VFMSUB213PS", "VFMSUB213SD", "VFMSUB213SH", "VFMSUB213SS", "VFMSUB231PD",
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"VFMSUB132SS", "VFMSUB213PD", "VFMSUB213PH", "VFMSUB213PS", "VFMSUB213SD",
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"VFMSUB231PH", "VFMSUB231PS", "VFMSUB231SD", "VFMSUB231SH", "VFMSUB231SS",
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"VFMSUB213SH", "VFMSUB213SS", "VFMSUB231PD", "VFMSUB231PH", "VFMSUB231PS",
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"VFMSUBADD132PD", "VFMSUBADD132PH", "VFMSUBADD132PS", "VFMSUBADD213PD",
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"VFMSUB231SD", "VFMSUB231SH", "VFMSUB231SS", "VFMSUBADD132PD",
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"VFMSUBADD213PH", "VFMSUBADD213PS", "VFMSUBADD231PD", "VFMSUBADD231PH",
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"VFMSUBADD132PH", "VFMSUBADD132PS", "VFMSUBADD213PD", "VFMSUBADD213PH",
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"VFMSUBADD231PS", "VFMSUBADDPD", "VFMSUBADDPS", "VFMSUBPD", "VFMSUBPS",
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"VFMSUBADD213PS", "VFMSUBADD231PD", "VFMSUBADD231PH", "VFMSUBADD231PS",
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"VFMSUBSD", "VFMSUBSS", "VFMULCPH", "VFMULCSH", "VFNMADD132PD",
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"VFMSUBADDPD", "VFMSUBADDPS", "VFMSUBPD", "VFMSUBPS", "VFMSUBSD",
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"VFNMADD132PH", "VFNMADD132PS", "VFNMADD132SD", "VFNMADD132SH",
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"VFMSUBSS", "VFMULCPH", "VFMULCSH", "VFNMADD132PD", "VFNMADD132PH",
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"VFNMADD132SS", "VFNMADD213PD", "VFNMADD213PH", "VFNMADD213PS",
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"VFNMADD132PS", "VFNMADD132SD", "VFNMADD132SH", "VFNMADD132SS",
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"VFNMADD213SD", "VFNMADD213SH", "VFNMADD213SS", "VFNMADD231PD",
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"VFNMADD213PD", "VFNMADD213PH", "VFNMADD213PS", "VFNMADD213SD",
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"VFNMADD231PH", "VFNMADD231PS", "VFNMADD231SD", "VFNMADD231SH",
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"VFNMADD213SH", "VFNMADD213SS", "VFNMADD231PD", "VFNMADD231PH",
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"VFNMADD231SS", "VFNMADDPD", "VFNMADDPS", "VFNMADDSD", "VFNMADDSS",
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"VFNMADD231PS", "VFNMADD231SD", "VFNMADD231SH", "VFNMADD231SS",
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"VFNMSUB132PD", "VFNMSUB132PH", "VFNMSUB132PS", "VFNMSUB132SD",
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"VFNMADDPD", "VFNMADDPS", "VFNMADDSD", "VFNMADDSS", "VFNMSUB132PD",
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"VFNMSUB132SH", "VFNMSUB132SS", "VFNMSUB213PD", "VFNMSUB213PH",
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"VFNMSUB132PH", "VFNMSUB132PS", "VFNMSUB132SD", "VFNMSUB132SH",
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"VFNMSUB213PS", "VFNMSUB213SD", "VFNMSUB213SH", "VFNMSUB213SS",
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"VFNMSUB132SS", "VFNMSUB213PD", "VFNMSUB213PH", "VFNMSUB213PS",
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"VFNMSUB231PD", "VFNMSUB231PH", "VFNMSUB231PS", "VFNMSUB231SD",
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"VFNMSUB213SD", "VFNMSUB213SH", "VFNMSUB213SS", "VFNMSUB231PD",
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"VFNMSUB231SH", "VFNMSUB231SS", "VFNMSUBPD", "VFNMSUBPS", "VFNMSUBSD",
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"VFNMSUB231PH", "VFNMSUB231PS", "VFNMSUB231SD", "VFNMSUB231SH",
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"VFNMSUBSS", "VFPCLASSPD", "VFPCLASSPH", "VFPCLASSPS", "VFPCLASSSD",
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"VFNMSUB231SS", "VFNMSUBPD", "VFNMSUBPS", "VFNMSUBSD", "VFNMSUBSS",
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"VFPCLASSSH", "VFPCLASSSS", "VFRCZPD", "VFRCZPS", "VFRCZSD",
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"VFPCLASSPD", "VFPCLASSPH", "VFPCLASSPS", "VFPCLASSSD", "VFPCLASSSH",
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"VFRCZSS", "VGATHERDPD", "VGATHERDPS", "VGATHERPF0DPD", "VGATHERPF0DPS",
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"VFPCLASSSS", "VFRCZPD", "VFRCZPS", "VFRCZSD", "VFRCZSS", "VGATHERDPD",
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"VGATHERPF0QPD", "VGATHERPF0QPS", "VGATHERPF1DPD", "VGATHERPF1DPS",
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"VGATHERDPS", "VGATHERPF0DPD", "VGATHERPF0DPS", "VGATHERPF0QPD",
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"VGATHERPF1QPD", "VGATHERPF1QPS", "VGATHERQPD", "VGATHERQPS",
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"VGATHERPF0QPS", "VGATHERPF1DPD", "VGATHERPF1DPS", "VGATHERPF1QPD",
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"VGETEXPPD", "VGETEXPPH", "VGETEXPPS", "VGETEXPSD", "VGETEXPSH",
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"VGATHERPF1QPS", "VGATHERQPD", "VGATHERQPS", "VGETEXPPD", "VGETEXPPH",
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"VGETEXPSS", "VGETMANTPD", "VGETMANTPH", "VGETMANTPS", "VGETMANTSD",
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"VGETEXPPS", "VGETEXPSD", "VGETEXPSH", "VGETEXPSS", "VGETMANTPD",
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||||||
"VGETMANTSH", "VGETMANTSS", "VGF2P8AFFINEINVQB", "VGF2P8AFFINEQB",
|
"VGETMANTPH", "VGETMANTPS", "VGETMANTSD", "VGETMANTSH", "VGETMANTSS",
|
||||||
"VGF2P8MULB", "VHADDPD", "VHADDPS", "VHSUBPD", "VHSUBPS", "VINSERTF128",
|
"VGF2P8AFFINEINVQB", "VGF2P8AFFINEQB", "VGF2P8MULB", "VHADDPD",
|
||||||
"VINSERTF32X4", "VINSERTF32X8", "VINSERTF64X2", "VINSERTF64X4",
|
"VHADDPS", "VHSUBPD", "VHSUBPS", "VINSERTF128", "VINSERTF32X4",
|
||||||
"VINSERTI128", "VINSERTI32X4", "VINSERTI32X8", "VINSERTI64X2",
|
"VINSERTF32X8", "VINSERTF64X2", "VINSERTF64X4", "VINSERTI128",
|
||||||
"VINSERTI64X4", "VINSERTPS", "VLDDQU", "VLDMXCSR", "VMASKMOVDQU",
|
"VINSERTI32X4", "VINSERTI32X8", "VINSERTI64X2", "VINSERTI64X4",
|
||||||
"VMASKMOVPD", "VMASKMOVPS", "VMAXPD", "VMAXPH", "VMAXPS", "VMAXSD",
|
"VINSERTPS", "VLDDQU", "VLDMXCSR", "VMASKMOVDQU", "VMASKMOVPD",
|
||||||
"VMAXSH", "VMAXSS", "VMCALL", "VMCLEAR", "VMFUNC", "VMGEXIT",
|
"VMASKMOVPS", "VMAXPD", "VMAXPH", "VMAXPS", "VMAXSD", "VMAXSH",
|
||||||
"VMINPD", "VMINPH", "VMINPS", "VMINSD", "VMINSH", "VMINSS", "VMLAUNCH",
|
"VMAXSS", "VMCALL", "VMCLEAR", "VMFUNC", "VMGEXIT", "VMINPD",
|
||||||
|
"VMINPH", "VMINPS", "VMINSD", "VMINSH", "VMINSS", "VMLAUNCH",
|
||||||
"VMLOAD", "VMMCALL", "VMOVAPD", "VMOVAPS", "VMOVD", "VMOVDDUP",
|
"VMLOAD", "VMMCALL", "VMOVAPD", "VMOVAPS", "VMOVD", "VMOVDDUP",
|
||||||
"VMOVDQA", "VMOVDQA32", "VMOVDQA64", "VMOVDQU", "VMOVDQU16",
|
"VMOVDQA", "VMOVDQA32", "VMOVDQA64", "VMOVDQU", "VMOVDQU16",
|
||||||
"VMOVDQU32", "VMOVDQU64", "VMOVDQU8", "VMOVHLPS", "VMOVHPD",
|
"VMOVDQU32", "VMOVDQU64", "VMOVDQU8", "VMOVHLPS", "VMOVHPD",
|
||||||
|
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@ -339,13 +339,13 @@ const ND_TABLE_INSTRUCTION gXopTable_root_09_01_06_leaf =
|
|||||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_01_07_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_09_01_07_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[1358]
|
(const void *)&gInstructions[1359]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_01_04_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_09_01_04_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[1383]
|
(const void *)&gInstructions[1384]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_MODRM_REG gXopTable_root_09_01_modrmreg =
|
const ND_TABLE_MODRM_REG gXopTable_root_09_01_modrmreg =
|
||||||
@ -399,7 +399,7 @@ const ND_TABLE_INSTRUCTION gXopTable_root_09_12_reg_00_leaf =
|
|||||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_12_reg_01_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_09_12_reg_01_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[1309]
|
(const void *)&gInstructions[1310]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_MODRM_REG gXopTable_root_09_12_reg_modrmreg =
|
const ND_TABLE_MODRM_REG gXopTable_root_09_12_reg_modrmreg =
|
||||||
@ -429,127 +429,127 @@ const ND_TABLE_MODRM_MOD gXopTable_root_09_12_modrmmod =
|
|||||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_81_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_09_81_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[1821]
|
(const void *)&gInstructions[1822]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_80_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_09_80_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[1822]
|
(const void *)&gInstructions[1823]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_83_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_09_83_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[1823]
|
(const void *)&gInstructions[1824]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_82_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_09_82_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[1824]
|
(const void *)&gInstructions[1825]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_c2_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_09_c2_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2242]
|
(const void *)&gInstructions[2243]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_c3_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_09_c3_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2243]
|
(const void *)&gInstructions[2244]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_c1_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_09_c1_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2244]
|
(const void *)&gInstructions[2245]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_cb_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_09_cb_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2246]
|
(const void *)&gInstructions[2247]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_d2_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_09_d2_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2248]
|
(const void *)&gInstructions[2249]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_d3_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_09_d3_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2249]
|
(const void *)&gInstructions[2250]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_d1_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_09_d1_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2250]
|
(const void *)&gInstructions[2251]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_db_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_09_db_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2251]
|
(const void *)&gInstructions[2252]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_d6_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_09_d6_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2252]
|
(const void *)&gInstructions[2253]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_d7_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_09_d7_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2253]
|
(const void *)&gInstructions[2254]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_c6_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_09_c6_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2255]
|
(const void *)&gInstructions[2256]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_c7_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_09_c7_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2256]
|
(const void *)&gInstructions[2257]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_e1_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_09_e1_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2258]
|
(const void *)&gInstructions[2259]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_e3_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_09_e3_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2260]
|
(const void *)&gInstructions[2261]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_e2_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_09_e2_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2263]
|
(const void *)&gInstructions[2264]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_90_00_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_09_90_00_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2427]
|
(const void *)&gInstructions[2428]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_90_01_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_09_90_01_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2428]
|
(const void *)&gInstructions[2429]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_VEX_W gXopTable_root_09_90_w =
|
const ND_TABLE_VEX_W gXopTable_root_09_90_w =
|
||||||
@ -564,13 +564,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_90_w =
|
|||||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_92_00_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_09_92_00_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2430]
|
(const void *)&gInstructions[2431]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_92_01_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_09_92_01_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2431]
|
(const void *)&gInstructions[2432]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_VEX_W gXopTable_root_09_92_w =
|
const ND_TABLE_VEX_W gXopTable_root_09_92_w =
|
||||||
@ -585,13 +585,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_92_w =
|
|||||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_93_00_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_09_93_00_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2433]
|
(const void *)&gInstructions[2434]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_93_01_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_09_93_01_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2434]
|
(const void *)&gInstructions[2435]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_VEX_W gXopTable_root_09_93_w =
|
const ND_TABLE_VEX_W gXopTable_root_09_93_w =
|
||||||
@ -606,13 +606,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_93_w =
|
|||||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_91_00_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_09_91_00_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2436]
|
(const void *)&gInstructions[2437]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_91_01_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_09_91_01_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2437]
|
(const void *)&gInstructions[2438]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_VEX_W gXopTable_root_09_91_w =
|
const ND_TABLE_VEX_W gXopTable_root_09_91_w =
|
||||||
@ -627,13 +627,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_91_w =
|
|||||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_98_00_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_09_98_00_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2444]
|
(const void *)&gInstructions[2445]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_98_01_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_09_98_01_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2445]
|
(const void *)&gInstructions[2446]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_VEX_W gXopTable_root_09_98_w =
|
const ND_TABLE_VEX_W gXopTable_root_09_98_w =
|
||||||
@ -648,13 +648,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_98_w =
|
|||||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_9a_00_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_09_9a_00_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2446]
|
(const void *)&gInstructions[2447]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_9a_01_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_09_9a_01_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2447]
|
(const void *)&gInstructions[2448]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_VEX_W gXopTable_root_09_9a_w =
|
const ND_TABLE_VEX_W gXopTable_root_09_9a_w =
|
||||||
@ -669,13 +669,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_9a_w =
|
|||||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_9b_00_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_09_9b_00_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2448]
|
(const void *)&gInstructions[2449]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_9b_01_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_09_9b_01_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2449]
|
(const void *)&gInstructions[2450]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_VEX_W gXopTable_root_09_9b_w =
|
const ND_TABLE_VEX_W gXopTable_root_09_9b_w =
|
||||||
@ -690,13 +690,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_9b_w =
|
|||||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_99_00_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_09_99_00_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2450]
|
(const void *)&gInstructions[2451]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_99_01_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_09_99_01_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2451]
|
(const void *)&gInstructions[2452]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_VEX_W gXopTable_root_09_99_w =
|
const ND_TABLE_VEX_W gXopTable_root_09_99_w =
|
||||||
@ -711,13 +711,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_99_w =
|
|||||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_94_00_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_09_94_00_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2452]
|
(const void *)&gInstructions[2453]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_94_01_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_09_94_01_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2453]
|
(const void *)&gInstructions[2454]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_VEX_W gXopTable_root_09_94_w =
|
const ND_TABLE_VEX_W gXopTable_root_09_94_w =
|
||||||
@ -732,13 +732,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_94_w =
|
|||||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_95_01_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_09_95_01_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2454]
|
(const void *)&gInstructions[2455]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_95_00_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_09_95_00_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2465]
|
(const void *)&gInstructions[2466]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_VEX_W gXopTable_root_09_95_w =
|
const ND_TABLE_VEX_W gXopTable_root_09_95_w =
|
||||||
@ -753,13 +753,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_95_w =
|
|||||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_96_01_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_09_96_01_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2455]
|
(const void *)&gInstructions[2456]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_96_00_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_09_96_00_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2456]
|
(const void *)&gInstructions[2457]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_VEX_W gXopTable_root_09_96_w =
|
const ND_TABLE_VEX_W gXopTable_root_09_96_w =
|
||||||
@ -774,13 +774,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_96_w =
|
|||||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_97_00_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_09_97_00_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2463]
|
(const void *)&gInstructions[2464]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_97_01_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_09_97_01_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2464]
|
(const void *)&gInstructions[2465]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_VEX_W gXopTable_root_09_97_w =
|
const ND_TABLE_VEX_W gXopTable_root_09_97_w =
|
||||||
@ -1058,13 +1058,13 @@ const ND_TABLE_OPCODE gXopTable_root_09_opcode =
|
|||||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_a2_00_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_08_a2_00_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2114]
|
(const void *)&gInstructions[2115]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_a2_01_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_08_a2_01_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2115]
|
(const void *)&gInstructions[2116]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_VEX_W gXopTable_root_08_a2_w =
|
const ND_TABLE_VEX_W gXopTable_root_08_a2_w =
|
||||||
@ -1079,133 +1079,133 @@ const ND_TABLE_VEX_W gXopTable_root_08_a2_w =
|
|||||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_cc_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_08_cc_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2144]
|
(const void *)&gInstructions[2145]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_ce_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_08_ce_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2145]
|
(const void *)&gInstructions[2146]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_cf_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_08_cf_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2150]
|
(const void *)&gInstructions[2151]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_ec_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_08_ec_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2151]
|
(const void *)&gInstructions[2152]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_ee_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_08_ee_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2152]
|
(const void *)&gInstructions[2153]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_ef_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_08_ef_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2153]
|
(const void *)&gInstructions[2154]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_ed_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_08_ed_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2154]
|
(const void *)&gInstructions[2155]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_cd_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_08_cd_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2155]
|
(const void *)&gInstructions[2156]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_9e_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_08_9e_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2278]
|
(const void *)&gInstructions[2279]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_9f_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_08_9f_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2279]
|
(const void *)&gInstructions[2280]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_97_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_08_97_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2280]
|
(const void *)&gInstructions[2281]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_8e_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_08_8e_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2281]
|
(const void *)&gInstructions[2282]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_8f_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_08_8f_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2282]
|
(const void *)&gInstructions[2283]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_87_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_08_87_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2283]
|
(const void *)&gInstructions[2284]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_86_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_08_86_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2284]
|
(const void *)&gInstructions[2285]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_85_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_08_85_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2285]
|
(const void *)&gInstructions[2286]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_96_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_08_96_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2286]
|
(const void *)&gInstructions[2287]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_95_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_08_95_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2287]
|
(const void *)&gInstructions[2288]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_a6_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_08_a6_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2288]
|
(const void *)&gInstructions[2289]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_b6_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_08_b6_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2289]
|
(const void *)&gInstructions[2290]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_a3_00_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_08_a3_00_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2416]
|
(const void *)&gInstructions[2417]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_a3_01_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_08_a3_01_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2417]
|
(const void *)&gInstructions[2418]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_VEX_W gXopTable_root_08_a3_w =
|
const ND_TABLE_VEX_W gXopTable_root_08_a3_w =
|
||||||
@ -1220,25 +1220,25 @@ const ND_TABLE_VEX_W gXopTable_root_08_a3_w =
|
|||||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_c0_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_08_c0_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2426]
|
(const void *)&gInstructions[2427]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_c2_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_08_c2_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2429]
|
(const void *)&gInstructions[2430]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_c3_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_08_c3_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2432]
|
(const void *)&gInstructions[2433]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_c1_leaf =
|
const ND_TABLE_INSTRUCTION gXopTable_root_08_c1_leaf =
|
||||||
{
|
{
|
||||||
ND_ILUT_INSTRUCTION,
|
ND_ILUT_INSTRUCTION,
|
||||||
(const void *)&gInstructions[2435]
|
(const void *)&gInstructions[2436]
|
||||||
};
|
};
|
||||||
|
|
||||||
const ND_TABLE_OPCODE gXopTable_root_08_opcode =
|
const ND_TABLE_OPCODE gXopTable_root_08_opcode =
|
||||||
|
@ -4,3 +4,4 @@
|
|||||||
rmpupdate
|
rmpupdate
|
||||||
psmash
|
psmash
|
||||||
pvalidate
|
pvalidate
|
||||||
|
rmpquery
|
@ -78,3 +78,25 @@
|
|||||||
Operand: 2, Acc: R-, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: General Purpose, RegSize: 4, RegId: 2, RegCount: 1
|
Operand: 2, Acc: R-, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: General Purpose, RegSize: 4, RegId: 2, RegCount: 1
|
||||||
Operand: 3, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: Flags, RegSize: 4, RegId: 0, RegCount: 1
|
Operand: 3, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: Flags, RegSize: 4, RegId: 0, RegCount: 1
|
||||||
|
|
||||||
|
0000000000000010 f30f01fd RMPQUERY
|
||||||
|
DSIZE: 32, ASIZE: 64, VLEN: -
|
||||||
|
ISA Set: SNP, Ins cat: SYSTEM, CET tracked: no
|
||||||
|
CPUID leaf: 0x8000001f, reg: eax, bit: 6
|
||||||
|
FLAGS access
|
||||||
|
PF: m, AF: m, ZF: m, SF: m, OF: m,
|
||||||
|
Valid modes
|
||||||
|
R0: yes, R1: no, R2: no, R3: no
|
||||||
|
Real: no, V8086: no, Prot: no, Compat: no, Long: yes
|
||||||
|
SMM on: yes, SMM off: yes, SGX on: no, SGX off: yes, TSX on: yes, TSX off: yes
|
||||||
|
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
|
||||||
|
Valid prefixes
|
||||||
|
REP: no, REPcc: no, LOCK: no
|
||||||
|
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||||
|
BND: no, BHINT: no, DNT: no
|
||||||
|
Operand: 0, Acc: R-, Type: Memory, Size: 1, RawSize: 1, Encoding: S,
|
||||||
|
Segment: 3, Base: 0,
|
||||||
|
Operand: 1, Acc: RW, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: General Purpose, RegSize: 4, RegId: 0, RegCount: 1
|
||||||
|
Operand: 2, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: General Purpose, RegSize: 8, RegId: 1, RegCount: 1
|
||||||
|
Operand: 3, Acc: RW, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: General Purpose, RegSize: 8, RegId: 2, RegCount: 1
|
||||||
|
Operand: 4, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: Flags, RegSize: 4, RegId: 0, RegCount: 1
|
||||||
|
|
||||||
|
@ -1 +1 @@
|
|||||||
<EFBFBD><01><><01><><01><><01>
|
<EFBFBD><01><><01><><01><><01><EFBFBD><01>
|
@ -12,7 +12,7 @@ from setuptools import find_packages, setup, Command, Extension, Distribution
|
|||||||
from codecs import open
|
from codecs import open
|
||||||
|
|
||||||
VERSION = (0, 1, 3)
|
VERSION = (0, 1, 3)
|
||||||
LIBRARY_VERSION = (1, 35, 0)
|
LIBRARY_VERSION = (1, 36, 0)
|
||||||
LIBRARY_INSTRUX_SIZE = 856
|
LIBRARY_INSTRUX_SIZE = 856
|
||||||
|
|
||||||
packages = ['pybddisasm']
|
packages = ['pybddisasm']
|
||||||
|
@ -1585,6 +1585,7 @@ std::string ins_class_to_str(const ND_INS_CLASS cls)
|
|||||||
case ND_INS_VPDPBUUDS: return "vpdpbuuds";
|
case ND_INS_VPDPBUUDS: return "vpdpbuuds";
|
||||||
case ND_INS_WRMSRLIST: return "wrmsrlist";
|
case ND_INS_WRMSRLIST: return "wrmsrlist";
|
||||||
case ND_INS_WRMSRNS: return "wrmsrns";
|
case ND_INS_WRMSRNS: return "wrmsrns";
|
||||||
|
case ND_INS_RMPQUERY: return "rmpquery";
|
||||||
default: return "unhandled!";
|
default: return "unhandled!";
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -640,6 +640,7 @@ typedef enum _ND_INS_CLASS
|
|||||||
ND_INS_RETF,
|
ND_INS_RETF,
|
||||||
ND_INS_RETN,
|
ND_INS_RETN,
|
||||||
ND_INS_RMPADJUST,
|
ND_INS_RMPADJUST,
|
||||||
|
ND_INS_RMPQUERY,
|
||||||
ND_INS_RMPUPDATE,
|
ND_INS_RMPUPDATE,
|
||||||
ND_INS_ROL,
|
ND_INS_ROL,
|
||||||
ND_INS_ROR,
|
ND_INS_ROR,
|
||||||
|
@ -128,5 +128,6 @@
|
|||||||
#define ND_CFF_RDPRU ND_CFF(0x80000008, 0xFFFFFFFF, NDR_EBX, 4)
|
#define ND_CFF_RDPRU ND_CFF(0x80000008, 0xFFFFFFFF, NDR_EBX, 4)
|
||||||
#define ND_CFF_MCOMMIT ND_CFF(0x80000008, 0xFFFFFFFF, NDR_EBX, 8)
|
#define ND_CFF_MCOMMIT ND_CFF(0x80000008, 0xFFFFFFFF, NDR_EBX, 8)
|
||||||
#define ND_CFF_SNP ND_CFF(0x8000001F, 0xFFFFFFFF, NDR_EAX, 4)
|
#define ND_CFF_SNP ND_CFF(0x8000001F, 0xFFFFFFFF, NDR_EAX, 4)
|
||||||
|
#define ND_CFF_RMPQUERY ND_CFF(0x8000001F, 0xFFFFFFFF, NDR_EAX, 6)
|
||||||
|
|
||||||
#endif // CPUID_FLAGS_H
|
#endif // CPUID_FLAGS_H
|
||||||
|
@ -6,7 +6,7 @@
|
|||||||
#define DISASM_VER_H
|
#define DISASM_VER_H
|
||||||
|
|
||||||
#define DISASM_VERSION_MAJOR 1
|
#define DISASM_VERSION_MAJOR 1
|
||||||
#define DISASM_VERSION_MINOR 35
|
#define DISASM_VERSION_MINOR 36
|
||||||
#define DISASM_VERSION_REVISION 0
|
#define DISASM_VERSION_REVISION 0
|
||||||
|
|
||||||
// bdshemu depends on bddisasm. It cannot be used without it.
|
// bdshemu depends on bddisasm. It cannot be used without it.
|
||||||
|
@ -135,3 +135,4 @@ MCOMMIT : 0x80000008, 0xFFFFFFFF, EBX, 8
|
|||||||
|
|
||||||
|
|
||||||
SNP : 0x8000001F, 0xFFFFFFFF, EAX, 4
|
SNP : 0x8000001F, 0xFFFFFFFF, EAX, 4
|
||||||
|
RMPQUERY : 0x8000001F, 0xFFFFFFFF, EAX, 6
|
||||||
|
@ -76,6 +76,7 @@ MCOMMIT nil Fv [ 0xF3 0x0F 0x01 /0
|
|||||||
MWAITX nil EAX,ECX,EBX [ NP 0x0F 0x01 /0xFB] s:MWAITT, t:SYSTEM, w:R|R|R, m:KERNEL|NOV86
|
MWAITX nil EAX,ECX,EBX [ NP 0x0F 0x01 /0xFB] s:MWAITT, t:SYSTEM, w:R|R|R, m:KERNEL|NOV86
|
||||||
CLZERO nil rAX [ 0x0F 0x01 /0xFC] s:CLZERO, t:MISC, w:R
|
CLZERO nil rAX [ 0x0F 0x01 /0xFC] s:CLZERO, t:MISC, w:R
|
||||||
RDPRU nil EAX,EDX,ECX,Fv [ 0x0F 0x01 /0xFD] s:RDPRU, t:MISC, w:W|W|R|W, f:CF=m|PF=0|AF=0|ZF=0|SF=0|OF=0
|
RDPRU nil EAX,EDX,ECX,Fv [ 0x0F 0x01 /0xFD] s:RDPRU, t:MISC, w:W|W|R|W, f:CF=m|PF=0|AF=0|ZF=0|SF=0|OF=0
|
||||||
|
RMPQUERY nil pAXb,EAX,RCX,RDX,Fv [ 0xF3 0x0F 0x01 /0xFD] s:SNP, t:SYSTEM, w:R|RW|W|RW|W, f:OF=m|ZF=m|AF=m|PF=m|SF=m, a:I67, m:O64|KERNEL, i:RMPQUERY
|
||||||
INVLPGB nil rAX,ECX,EDX [ 0x0F 0x01 /0xFE] s:INVLPGB, t:SYSTEM, w:R|R|R, m:NOREAL|KERNEL
|
INVLPGB nil rAX,ECX,EDX [ 0x0F 0x01 /0xFE] s:INVLPGB, t:SYSTEM, w:R|R|R, m:NOREAL|KERNEL
|
||||||
RMPADJUST nil pAXb,EAX,RCX,RDX,Fv [ 0xF3 0x0F 0x01 /0xFE] s:SNP, t:SYSTEM, w:R|RW|R|R|W, f:OF=m|ZF=m|AF=m|PF=m|SF=m, a:I67, m:O64|KERNEL
|
RMPADJUST nil pAXb,EAX,RCX,RDX,Fv [ 0xF3 0x0F 0x01 /0xFE] s:SNP, t:SYSTEM, w:R|RW|R|R|W, f:OF=m|ZF=m|AF=m|PF=m|SF=m, a:I67, m:O64|KERNEL
|
||||||
RMPUPDATE nil RAX,pCXdq,Fv [ 0xF2 0x0F 0x01 /0xFE] s:SNP, t:SYSTEM, w:RW|R|W, f:OF=m|ZF=m|AF=m|PF=m|SF=m, a:I67, m:O64|KERNEL
|
RMPUPDATE nil RAX,pCXdq,Fv [ 0xF2 0x0F 0x01 /0xFE] s:SNP, t:SYSTEM, w:RW|R|W, f:OF=m|ZF=m|AF=m|PF=m|SF=m, a:I67, m:O64|KERNEL
|
||||||
|
Loading…
Reference in New Issue
Block a user