mirror of
https://github.com/bitdefender/bddisasm.git
synced 2024-12-22 22:18:09 +00:00
Fixed RET with immediate - the immediate is not sign-extended.
Fixed VEX decoding in 32 bit mode - vex.vvvv bit 3 is simply ignored. Fixed several FMA instructions decoding (L/W flag should be ignored). Print the 64 bit immediate value in disassembly, instead of the raw immediate (note that the operand always contains the sign-extended, full immediate). XBEGIN always uses 32/64 bit RIP size (0x66 does not affect its size). Decode WBINVD even if it's preceded by 0x66/0xF2 prefixes. Several mnemonic fixes (FXSAVE64, FXRSTOR64, PUSHA/PUSHAD...). Properly decode VPERMIL2* instructions. Fixed SSE register decoding when it is encoded in immediate. Decode SCATTER instructions even though they use the VSIB index as source. Some disp8 fixes (t1s -> t1s8/t1s16). SYSCALL/SYSRET are decoded and executed in 32 bit compat modem, even though SDM states they are invalid. RDPID uses 32/64 bit reg size, never 16. Various other minor tweaks & fixes. Re-generated the test files, and added some more, new tests.
This commit is contained in:
Andrei Vlad LUTAS
parent
52ed638c13
commit
752bc626c4
@ -203,6 +203,8 @@ static const uint16_t gOperandMap[] =
|
||||
ND_OPE_S, // ND_OPT_MEM_SHSP
|
||||
ND_OPE_S, // ND_OPT_MEM_SHS0
|
||||
|
||||
ND_OPE_L, // ND_OPT_Im2z
|
||||
|
||||
ND_OPE_S, // ND_OPT_CR_0
|
||||
ND_OPE_S, // ND_OPT_IDTR
|
||||
ND_OPE_S, // ND_OPT_GDTR
|
||||
@ -529,10 +531,7 @@ NdFetchVex3(
|
||||
// Vex.R and Vex.X have been tested by the initial if.
|
||||
|
||||
// Vex.vvvv must be less than 8.
|
||||
if ((Instrux->Exs.v & 0x8) == 0x8)
|
||||
{
|
||||
return ND_STATUS_INVALID_ENCODING_IN_MODE;
|
||||
}
|
||||
Instrux->Exs.v &= 7;
|
||||
|
||||
// Vex.B is ignored, so we force it to 0.
|
||||
Instrux->Exs.b = 0;
|
||||
@ -1243,7 +1242,7 @@ NdGetCompDispSize(
|
||||
case ND_TUPLE_T1S16:
|
||||
return 2;
|
||||
case ND_TUPLE_T1S:
|
||||
return Instrux->Exs.w ? 8 : 4;
|
||||
return !!(Instrux->Attributes & ND_FLAG_WIG) ? 4 : Instrux->Exs.w ? 8 : 4;
|
||||
case ND_TUPLE_T1F:
|
||||
return (uint8_t)MemSize;
|
||||
case ND_TUPLE_T2:
|
||||
@ -2330,6 +2329,13 @@ NdParseOperand(
|
||||
}
|
||||
break;
|
||||
|
||||
case ND_OPT_Im2z:
|
||||
{
|
||||
operand->Type = ND_OP_IMM;
|
||||
operand->Info.Immediate.Imm = Instrux->SseImmediate & 3;
|
||||
}
|
||||
break;
|
||||
|
||||
case ND_OPT_J:
|
||||
// Fetch the relative offset. NOTE: The size of the relative can't exceed 4 bytes.
|
||||
status = NdFetchRelativeOffset(Instrux, Code, Offset, Size, (uint8_t)size);
|
||||
@ -2571,12 +2577,6 @@ memory:
|
||||
{
|
||||
if ((Instrux->ModRm.mod == 0) && (Instrux->ModRm.rm == REG_RBP))
|
||||
{
|
||||
// Some instructions (example: MPX) don't support RIP relative addressing.
|
||||
if (!!(Instrux->Attributes & ND_FLAG_NO_RIP_REL))
|
||||
{
|
||||
return ND_STATUS_RIP_REL_ADDRESSING_NOT_SUPPORTED;
|
||||
}
|
||||
|
||||
//
|
||||
// RIP relative addressing addresses a memory region relative to the current RIP; However,
|
||||
// the current RIP, when executing the current instruction, is already updated and points
|
||||
@ -2585,6 +2585,12 @@ memory:
|
||||
// addressing, as long as we're in long mode.
|
||||
//
|
||||
operand->Info.Memory.IsRipRel = Instrux->IsRipRelative = (Instrux->DefCode == ND_CODE_64);
|
||||
|
||||
// Some instructions (example: MPX) don't support RIP relative addressing.
|
||||
if (operand->Info.Memory.IsRipRel && !!(Instrux->Attributes & ND_FLAG_NO_RIP_REL))
|
||||
{
|
||||
return ND_STATUS_RIP_REL_ADDRESSING_NOT_SUPPORTED;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
@ -2728,7 +2734,12 @@ memory:
|
||||
operand->Type = ND_OP_REG;
|
||||
operand->Info.Register.Type = ND_REG_SSE;
|
||||
operand->Info.Register.Size = (ND_REG_SIZE)(size < ND_SIZE_128BIT ? ND_SIZE_128BIT : size);
|
||||
operand->Info.Register.Reg = ((Instrux->SseImmediate >> 4) & 0xF) | ((Instrux->SseImmediate & 8) << 1);
|
||||
operand->Info.Register.Reg = (Instrux->SseImmediate >> 4) & 0xF;
|
||||
|
||||
if (Instrux->DefCode != ND_CODE_64)
|
||||
{
|
||||
operand->Info.Register.Reg &= 0x7;
|
||||
}
|
||||
|
||||
Offset = Instrux->Length;
|
||||
break;
|
||||
@ -3637,6 +3648,7 @@ NdGetEffectiveOpMode(
|
||||
break;
|
||||
case ND_CODE_64:
|
||||
Instrux->EfOpMode = (width || f64 || (d64 && !has66)) ? ND_OPSZ_64 : (has66 ? ND_OPSZ_16 : ND_OPSZ_32);
|
||||
Instrux->AddrMode = !!(Instrux->Attributes & ND_FLAG_I67) ? ND_ADDR_64 : Instrux->AddrMode;
|
||||
break;
|
||||
default:
|
||||
return ND_STATUS_INVALID_INSTRUX;
|
||||
@ -3692,7 +3704,8 @@ NdValidateInstruction(
|
||||
}
|
||||
|
||||
// VSIB instructions have a restriction: the same vector register can't be used by more than one operand.
|
||||
if (ND_HAS_VSIB(Instrux))
|
||||
// The exception is SCATTER*, which can use the VSIB reg as two sources.
|
||||
if (ND_HAS_VSIB(Instrux) && Instrux->Category != ND_CAT_SCATTER)
|
||||
{
|
||||
uint8_t usedVects[32] = { 0 };
|
||||
|
||||
@ -3769,8 +3782,10 @@ NdValidateInstruction(
|
||||
}
|
||||
}
|
||||
|
||||
// EVEX.b must be 0 if SAE/ER is not used.
|
||||
if (Instrux->Exs.bm && (Instrux->ModRm.mod == 3) && !ND_SAE_SUPPORT(Instrux) && !ND_ER_SUPPORT(Instrux))
|
||||
// EVEX.b must be 0 if SAE/ER is not used, but can be ignored if the ignore embedded rounding flag is set.
|
||||
if (Instrux->Exs.bm && (Instrux->ModRm.mod == 3) &&
|
||||
!ND_SAE_SUPPORT(Instrux) && !ND_ER_SUPPORT(Instrux) &&
|
||||
!(Instrux->Attributes & ND_FLAG_IER))
|
||||
{
|
||||
return ND_STATUS_ER_SAE_NOT_SUPPORTED;
|
||||
}
|
||||
@ -4483,7 +4498,7 @@ NdToText(
|
||||
|
||||
case ND_OP_IMM:
|
||||
{
|
||||
switch (pOp->RawSize)
|
||||
switch (pOp->Size)
|
||||
{
|
||||
case 1:
|
||||
status = NdSprintf(temp, sizeof(temp), "0x%02x", (uint8_t)pOp->Info.Immediate.Imm);
|
||||
@ -4563,8 +4578,10 @@ NdToText(
|
||||
|
||||
case ND_OP_MEM:
|
||||
{
|
||||
// Prepend the size.
|
||||
switch (pOp->Size)
|
||||
// Prepend the size. For VSIB addressing, store the VSIB element size, not the total accessed size.
|
||||
ND_OPERAND_SIZE size = pOp->Info.Memory.IsVsib ? pOp->Info.Memory.Vsib.ElemSize : pOp->Size;
|
||||
|
||||
switch (size)
|
||||
{
|
||||
case 1:
|
||||
res = nd_strcat_s(Buffer, BufferSize, "byte ptr ");
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -1,7 +1,7 @@
|
||||
#ifndef _MNEMONICS_H_
|
||||
#define _MNEMONICS_H_
|
||||
|
||||
const char *gMnemonics[1561] =
|
||||
const char *gMnemonics[1567] =
|
||||
{
|
||||
"AAA", "AAD", "AAM", "AAS", "ADC", "ADCX", "ADD", "ADDPD", "ADDPS",
|
||||
"ADDSD", "ADDSS", "ADDSUBPD", "ADDSUBPS", "ADOX", "AESDEC", "AESDECLAST",
|
||||
@ -40,109 +40,109 @@ const char *gMnemonics[1561] =
|
||||
"FSIN", "FSINCOS", "FSQRT", "FST", "FSTDW", "FSTP", "FSTPNCE",
|
||||
"FSTSG", "FSUB", "FSUBP", "FSUBR", "FSUBRP", "FTST", "FUCOM",
|
||||
"FUCOMI", "FUCOMIP", "FUCOMP", "FUCOMPP", "FXAM", "FXCH", "FXRSTOR",
|
||||
"FXSAVE", "FXTRACT", "FYL2X", "FYL2XP1", "GETSEC", "GF2P8AFFINEINVQB",
|
||||
"GF2P8AFFINEQB", "GF2P8MULB", "HADDPD", "HADDPS", "HLT", "HSUBPD",
|
||||
"HSUBPS", "IDIV", "IMUL", "IN", "INC", "INCSSPD", "INCSSPQ",
|
||||
"INSB", "INSD", "INSERTPS", "INSERTQ", "INSW", "INT", "INT1",
|
||||
"INT3", "INTO", "INVD", "INVEPT", "INVLPG", "INVLPGA", "INVLPGB",
|
||||
"INVPCID", "INVVPID", "IRETD", "IRETQ", "IRETW", "JBE", "JC",
|
||||
"JCXZ", "JECXZ", "JL", "JLE", "JMP", "JMPE", "JMPF", "JNBE",
|
||||
"JNC", "JNL", "JNLE", "JNO", "JNP", "JNS", "JNZ", "JO", "JP",
|
||||
"JRCXZ", "JS", "JZ", "KADDB", "KADDD", "KADDQ", "KADDW", "KANDB",
|
||||
"KANDD", "KANDNB", "KANDND", "KANDNQ", "KANDNW", "KANDQ", "KANDW",
|
||||
"KMERGE2L1H", "KMERGE2L1L", "KMOVB", "KMOVD", "KMOVQ", "KMOVW",
|
||||
"KNOTB", "KNOTD", "KNOTQ", "KNOTW", "KORB", "KORD", "KORQ", "KORTESTB",
|
||||
"KORTESTD", "KORTESTQ", "KORTESTW", "KORW", "KSHIFTLB", "KSHIFTLD",
|
||||
"KSHIFTLQ", "KSHIFTLW", "KSHIFTRB", "KSHIFTRD", "KSHIFTRQ", "KSHIFTRW",
|
||||
"KTESTB", "KTESTD", "KTESTQ", "KTESTW", "KUNPCKBW", "KUNPCKDQ",
|
||||
"KUNPCKWD", "KXNORB", "KXNORD", "KXNORQ", "KXNORW", "KXORB",
|
||||
"KXORD", "KXORQ", "KXORW", "LAHF", "LAR", "LDDQU", "LDMXCSR",
|
||||
"LDS", "LDTILECFG", "LEA", "LEAVE", "LES", "LFENCE", "LFS", "LGDT",
|
||||
"LGS", "LIDT", "LLDT", "LLWPCB", "LMSW", "LOADALL", "LOADALLD",
|
||||
"FXRSTOR64", "FXSAVE", "FXSAVE64", "FXTRACT", "FYL2X", "FYL2XP1",
|
||||
"GETSEC", "GF2P8AFFINEINVQB", "GF2P8AFFINEQB", "GF2P8MULB", "HADDPD",
|
||||
"HADDPS", "HLT", "HSUBPD", "HSUBPS", "IDIV", "IMUL", "IN", "INC",
|
||||
"INCSSPD", "INCSSPQ", "INSB", "INSD", "INSERTPS", "INSERTQ",
|
||||
"INSW", "INT", "INT1", "INT3", "INTO", "INVD", "INVEPT", "INVLPG",
|
||||
"INVLPGA", "INVLPGB", "INVPCID", "INVVPID", "IRETD", "IRETQ",
|
||||
"IRETW", "JBE", "JC", "JCXZ", "JECXZ", "JL", "JLE", "JMP", "JMPE",
|
||||
"JMPF", "JNBE", "JNC", "JNL", "JNLE", "JNO", "JNP", "JNS", "JNZ",
|
||||
"JO", "JP", "JRCXZ", "JS", "JZ", "KADDB", "KADDD", "KADDQ", "KADDW",
|
||||
"KANDB", "KANDD", "KANDNB", "KANDND", "KANDNQ", "KANDNW", "KANDQ",
|
||||
"KANDW", "KMERGE2L1H", "KMERGE2L1L", "KMOVB", "KMOVD", "KMOVQ",
|
||||
"KMOVW", "KNOTB", "KNOTD", "KNOTQ", "KNOTW", "KORB", "KORD",
|
||||
"KORQ", "KORTESTB", "KORTESTD", "KORTESTQ", "KORTESTW", "KORW",
|
||||
"KSHIFTLB", "KSHIFTLD", "KSHIFTLQ", "KSHIFTLW", "KSHIFTRB", "KSHIFTRD",
|
||||
"KSHIFTRQ", "KSHIFTRW", "KTESTB", "KTESTD", "KTESTQ", "KTESTW",
|
||||
"KUNPCKBW", "KUNPCKDQ", "KUNPCKWD", "KXNORB", "KXNORD", "KXNORQ",
|
||||
"KXNORW", "KXORB", "KXORD", "KXORQ", "KXORW", "LAHF", "LAR",
|
||||
"LDDQU", "LDMXCSR", "LDS", "LDTILECFG", "LEA", "LEAVE", "LES",
|
||||
"LFENCE", "LFS", "LGDT", "LGS", "LIDT", "LLDT", "LLWPCB", "LMSW",
|
||||
"LODSB", "LODSD", "LODSQ", "LODSW", "LOOP", "LOOPNZ", "LOOPZ",
|
||||
"LSL", "LSS", "LTR", "LWPINS", "LWPVAL", "LZCNT", "MASKMOVDQU",
|
||||
"MASKMOVQ", "MAXPD", "MAXPS", "MAXSD", "MAXSS", "MCOMMIT", "MFENCE",
|
||||
"MINPD", "MINPS", "MINSD", "MINSS", "MONITOR", "MONITORX", "MONTMUL",
|
||||
"MOV", "MOVAPD", "MOVAPS", "MOVBE", "MOVD", "MOVDDUP", "MOVDIR64B",
|
||||
"MOVDIRI", "MOVDQ2Q", "MOVDQA", "MOVDQU", "MOVHPD", "MOVHPS",
|
||||
"MOVLHPS", "MOVLPD", "MOVLPS", "MOVMSKPD", "MOVMSKPS", "MOVNTDQ",
|
||||
"MOVNTDQA", "MOVNTI", "MOVNTPD", "MOVNTPS", "MOVNTQ", "MOVNTSD",
|
||||
"MOVNTSS", "MOVQ", "MOVQ2DQ", "MOVSB", "MOVSD", "MOVSHDUP", "MOVSLDUP",
|
||||
"MOVSQ", "MOVSS", "MOVSW", "MOVSX", "MOVSXD", "MOVUPD", "MOVUPS",
|
||||
"MOVZX", "MPSADBW", "MUL", "MULPD", "MULPS", "MULSD", "MULSS",
|
||||
"MULX", "MWAIT", "MWAITX", "NEG", "NOP", "NOT", "OR", "ORPD",
|
||||
"ORPS", "OUT", "OUTSB", "OUTSD", "OUTSW", "PABSB", "PABSD", "PABSW",
|
||||
"PACKSSDW", "PACKSSWB", "PACKUSDW", "PACKUSWB", "PADDB", "PADDD",
|
||||
"PADDQ", "PADDSB", "PADDSW", "PADDUSB", "PADDUSW", "PADDW", "PALIGNR",
|
||||
"PAND", "PANDN", "PAUSE", "PAVGB", "PAVGUSB", "PAVGW", "PBLENDVB",
|
||||
"PBLENDW", "PCLMULQDQ", "PCMPEQB", "PCMPEQD", "PCMPEQQ", "PCMPEQW",
|
||||
"PCMPESTRI", "PCMPESTRM", "PCMPGTB", "PCMPGTD", "PCMPGTQ", "PCMPGTW",
|
||||
"PCMPISTRI", "PCMPISTRM", "PCOMMIT", "PCONFIG", "PDEP", "PEXT",
|
||||
"PEXTRB", "PEXTRD", "PEXTRQ", "PEXTRW", "PF2ID", "PF2IW", "PFACC",
|
||||
"PFADD", "PFCMPEQ", "PFCMPGE", "PFCMPGT", "PFMAX", "PFMIN", "PFMUL",
|
||||
"PFNACC", "PFPNACC", "PFRCPIT1", "PFRCPIT2", "PFRCPV", "PFRSQIT1",
|
||||
"PFRSQRT", "PFRSQRTV", "PFSUB", "PFSUBR", "PHADDD", "PHADDSW",
|
||||
"PHADDW", "PHMINPOSUW", "PHSUBD", "PHSUBSW", "PHSUBW", "PI2FD",
|
||||
"PI2FW", "PINSRB", "PINSRD", "PINSRQ", "PINSRW", "PMADDUBSW",
|
||||
"PMADDWD", "PMAXSB", "PMAXSD", "PMAXSW", "PMAXUB", "PMAXUD",
|
||||
"PMAXUW", "PMINSB", "PMINSD", "PMINSW", "PMINUB", "PMINUD", "PMINUW",
|
||||
"PMOVMSKB", "PMOVSXBD", "PMOVSXBQ", "PMOVSXBW", "PMOVSXDQ", "PMOVSXWD",
|
||||
"PMOVSXWQ", "PMOVZXBD", "PMOVZXBQ", "PMOVZXBW", "PMOVZXDQ", "PMOVZXWD",
|
||||
"PMOVZXWQ", "PMULDQ", "PMULHRSW", "PMULHRW", "PMULHUW", "PMULHW",
|
||||
"PMULLD", "PMULLW", "PMULUDQ", "POP", "POPA", "POPCNT", "POPFD",
|
||||
"POPFQ", "POPFW", "POR", "PREFETCH", "PREFETCHE", "PREFETCHM",
|
||||
"PREFETCHNTA", "PREFETCHT0", "PREFETCHT1", "PREFETCHT2", "PREFETCHW",
|
||||
"PREFETCHWT1", "PSADBW", "PSHUFB", "PSHUFD", "PSHUFHW", "PSHUFLW",
|
||||
"PSHUFW", "PSIGNB", "PSIGND", "PSIGNW", "PSLLD", "PSLLDQ", "PSLLQ",
|
||||
"PSLLW", "PSMASH", "PSRAD", "PSRAW", "PSRLD", "PSRLDQ", "PSRLQ",
|
||||
"PSRLW", "PSUBB", "PSUBD", "PSUBQ", "PSUBSB", "PSUBSW", "PSUBUSB",
|
||||
"PSUBUSW", "PSUBW", "PSWAPD", "PTEST", "PTWRITE", "PUNPCKHBW",
|
||||
"PUNPCKHDQ", "PUNPCKHQDQ", "PUNPCKHWD", "PUNPCKLBW", "PUNPCKLDQ",
|
||||
"PUNPCKLQDQ", "PUNPCKLWD", "PUSH", "PUSHA", "PUSHFD", "PUSHFQ",
|
||||
"PUSHFW", "PVALIDATE", "PXOR", "RCL", "RCPPS", "RCPSS", "RCR",
|
||||
"RDFSBASE", "RDGSBASE", "RDMSR", "RDPID", "RDPKRU", "RDPMC",
|
||||
"RDPRU", "RDRAND", "RDSEED", "RDSHR", "RDSSPD", "RDSSPQ", "RDTSC",
|
||||
"RDTSCP", "RETF", "RETN", "RMPADJUST", "RMPUPDATE", "ROL", "ROR",
|
||||
"RORX", "ROUNDPD", "ROUNDPS", "ROUNDSD", "ROUNDSS", "RSDC", "RSLDT",
|
||||
"RSM", "RSQRTPS", "RSQRTSS", "RSTORSSP", "RSTS", "SAHF", "SAL",
|
||||
"SALC", "SAR", "SARX", "SAVEPREVSSP", "SBB", "SCASB", "SCASD",
|
||||
"SCASQ", "SCASW", "SERIALIZE", "SETBE", "SETC", "SETL", "SETLE",
|
||||
"SETNB", "SETNC", "SETNL", "SETNLE", "SETNO", "SETNP", "SETNS",
|
||||
"SETNZ", "SETO", "SETP", "SETS", "SETSSBSY", "SETZ", "SFENCE",
|
||||
"SGDT", "SHA1MSG1", "SHA1MSG2", "SHA1NEXTE", "SHA1RNDS4", "SHA256MSG1",
|
||||
"SHA256MSG2", "SHA256RNDS2", "SHL", "SHLD", "SHLX", "SHR", "SHRD",
|
||||
"SHRX", "SHUFPD", "SHUFPS", "SIDT", "SKINIT", "SLDT", "SLWPCB",
|
||||
"SMINT", "SMSW", "SPFLT", "SQRTPD", "SQRTPS", "SQRTSD", "SQRTSS",
|
||||
"STAC", "STC", "STD", "STGI", "STI", "STMXCSR", "STOSB", "STOSD",
|
||||
"STOSQ", "STOSW", "STR", "STTILECFG", "SUB", "SUBPD", "SUBPS",
|
||||
"SUBSD", "SUBSS", "SVDC", "SVLDT", "SVTS", "SWAPGS", "SYSCALL",
|
||||
"SYSENTER", "SYSEXIT", "SYSRET", "T1MSKC", "TDPBF16PS", "TDPBSSD",
|
||||
"TDPBSUD", "TDPBUSD", "TDPBUUD", "TEST", "TILELOADD", "TILELOADDT1",
|
||||
"TILERELEASE", "TILESTORED", "TILEZERO", "TLBSYNC", "TPAUSE",
|
||||
"TZCNT", "TZMSK", "UCOMISD", "UCOMISS", "UD0", "UD1", "UD2",
|
||||
"UMONITOR", "UMWAIT", "UNPCKHPD", "UNPCKHPS", "UNPCKLPD", "UNPCKLPS",
|
||||
"V4FMADDPS", "V4FMADDSS", "V4FNMADDPS", "V4FNMADDSS", "VADDPD",
|
||||
"VADDPS", "VADDSD", "VADDSS", "VADDSUBPD", "VADDSUBPS", "VAESDEC",
|
||||
"VAESDECLAST", "VAESENC", "VAESENCLAST", "VAESIMC", "VAESKEYGENASSIST",
|
||||
"VALIGND", "VALIGNQ", "VANDNPD", "VANDNPS", "VANDPD", "VANDPS",
|
||||
"VBLENDMPD", "VBLENDMPS", "VBLENDPD", "VBLENDPS", "VBLENDVPD",
|
||||
"VBLENDVPS", "VBROADCASTF128", "VBROADCASTF32X2", "VBROADCASTF32X4",
|
||||
"VBROADCASTF32X8", "VBROADCASTF64X2", "VBROADCASTF64X4", "VBROADCASTI128",
|
||||
"VBROADCASTI32X2", "VBROADCASTI32X4", "VBROADCASTI32X8", "VBROADCASTI64X2",
|
||||
"VBROADCASTI64X4", "VBROADCASTSD", "VBROADCASTSS", "VCMPPD",
|
||||
"VCMPPS", "VCMPSD", "VCMPSS", "VCOMISD", "VCOMISS", "VCOMPRESSPD",
|
||||
"VCOMPRESSPS", "VCVTDQ2PD", "VCVTDQ2PS", "VCVTNE2PS2BF16", "VCVTNEPS2BF16",
|
||||
"VCVTPD2DQ", "VCVTPD2PS", "VCVTPD2QQ", "VCVTPD2UDQ", "VCVTPD2UQQ",
|
||||
"VCVTPH2PS", "VCVTPS2DQ", "VCVTPS2PD", "VCVTPS2PH", "VCVTPS2QQ",
|
||||
"VCVTPS2UDQ", "VCVTPS2UQQ", "VCVTQQ2PD", "VCVTQQ2PS", "VCVTSD2SI",
|
||||
"VCVTSD2SS", "VCVTSD2USI", "VCVTSI2SD", "VCVTSI2SS", "VCVTSS2SD",
|
||||
"VCVTSS2SI", "VCVTSS2USI", "VCVTTPD2DQ", "VCVTTPD2QQ", "VCVTTPD2UDQ",
|
||||
"VCVTTPD2UQQ", "VCVTTPS2DQ", "VCVTTPS2QQ", "VCVTTPS2UDQ", "VCVTTPS2UQQ",
|
||||
"VCVTTSD2SI", "VCVTTSD2USI", "VCVTTSS2SI", "VCVTTSS2USI", "VCVTUDQ2PD",
|
||||
"VCVTUDQ2PS", "VCVTUQQ2PD", "VCVTUQQ2PS", "VCVTUSI2SD", "VCVTUSI2SS",
|
||||
"VDBPSADBW", "VDIVPD", "VDIVPS", "VDIVSD", "VDIVSS", "VDPBF16PS",
|
||||
"VDPPD", "VDPPS", "VERR", "VERW", "VEXP2PD", "VEXP2PS", "VEXPANDPD",
|
||||
"VEXPANDPS", "VEXTRACTF128", "VEXTRACTF32X4", "VEXTRACTF32X8",
|
||||
"MOVDIRI", "MOVDQ2Q", "MOVDQA", "MOVDQU", "MOVHLPS", "MOVHPD",
|
||||
"MOVHPS", "MOVLHPS", "MOVLPD", "MOVLPS", "MOVMSKPD", "MOVMSKPS",
|
||||
"MOVNTDQ", "MOVNTDQA", "MOVNTI", "MOVNTPD", "MOVNTPS", "MOVNTQ",
|
||||
"MOVNTSD", "MOVNTSS", "MOVQ", "MOVQ2DQ", "MOVSB", "MOVSD", "MOVSHDUP",
|
||||
"MOVSLDUP", "MOVSQ", "MOVSS", "MOVSW", "MOVSX", "MOVSXD", "MOVUPD",
|
||||
"MOVUPS", "MOVZX", "MPSADBW", "MUL", "MULPD", "MULPS", "MULSD",
|
||||
"MULSS", "MULX", "MWAIT", "MWAITX", "NEG", "NOP", "NOT", "OR",
|
||||
"ORPD", "ORPS", "OUT", "OUTSB", "OUTSD", "OUTSW", "PABSB", "PABSD",
|
||||
"PABSW", "PACKSSDW", "PACKSSWB", "PACKUSDW", "PACKUSWB", "PADDB",
|
||||
"PADDD", "PADDQ", "PADDSB", "PADDSW", "PADDUSB", "PADDUSW", "PADDW",
|
||||
"PALIGNR", "PAND", "PANDN", "PAUSE", "PAVGB", "PAVGUSB", "PAVGW",
|
||||
"PBLENDVB", "PBLENDW", "PCLMULQDQ", "PCMPEQB", "PCMPEQD", "PCMPEQQ",
|
||||
"PCMPEQW", "PCMPESTRI", "PCMPESTRM", "PCMPGTB", "PCMPGTD", "PCMPGTQ",
|
||||
"PCMPGTW", "PCMPISTRI", "PCMPISTRM", "PCOMMIT", "PCONFIG", "PDEP",
|
||||
"PEXT", "PEXTRB", "PEXTRD", "PEXTRQ", "PEXTRW", "PF2ID", "PF2IW",
|
||||
"PFACC", "PFADD", "PFCMPEQ", "PFCMPGE", "PFCMPGT", "PFMAX", "PFMIN",
|
||||
"PFMUL", "PFNACC", "PFPNACC", "PFRCP", "PFRCPIT1", "PFRCPIT2",
|
||||
"PFRCPV", "PFRSQIT1", "PFRSQRT", "PFRSQRTV", "PFSUB", "PFSUBR",
|
||||
"PHADDD", "PHADDSW", "PHADDW", "PHMINPOSUW", "PHSUBD", "PHSUBSW",
|
||||
"PHSUBW", "PI2FD", "PI2FW", "PINSRB", "PINSRD", "PINSRQ", "PINSRW",
|
||||
"PMADDUBSW", "PMADDWD", "PMAXSB", "PMAXSD", "PMAXSW", "PMAXUB",
|
||||
"PMAXUD", "PMAXUW", "PMINSB", "PMINSD", "PMINSW", "PMINUB", "PMINUD",
|
||||
"PMINUW", "PMOVMSKB", "PMOVSXBD", "PMOVSXBQ", "PMOVSXBW", "PMOVSXDQ",
|
||||
"PMOVSXWD", "PMOVSXWQ", "PMOVZXBD", "PMOVZXBQ", "PMOVZXBW", "PMOVZXDQ",
|
||||
"PMOVZXWD", "PMOVZXWQ", "PMULDQ", "PMULHRSW", "PMULHRW", "PMULHUW",
|
||||
"PMULHW", "PMULLD", "PMULLW", "PMULUDQ", "POP", "POPA", "POPAD",
|
||||
"POPCNT", "POPFD", "POPFQ", "POPFW", "POR", "PREFETCH", "PREFETCHE",
|
||||
"PREFETCHM", "PREFETCHNTA", "PREFETCHT0", "PREFETCHT1", "PREFETCHT2",
|
||||
"PREFETCHW", "PREFETCHWT1", "PSADBW", "PSHUFB", "PSHUFD", "PSHUFHW",
|
||||
"PSHUFLW", "PSHUFW", "PSIGNB", "PSIGND", "PSIGNW", "PSLLD", "PSLLDQ",
|
||||
"PSLLQ", "PSLLW", "PSMASH", "PSRAD", "PSRAW", "PSRLD", "PSRLDQ",
|
||||
"PSRLQ", "PSRLW", "PSUBB", "PSUBD", "PSUBQ", "PSUBSB", "PSUBSW",
|
||||
"PSUBUSB", "PSUBUSW", "PSUBW", "PSWAPD", "PTEST", "PTWRITE",
|
||||
"PUNPCKHBW", "PUNPCKHDQ", "PUNPCKHQDQ", "PUNPCKHWD", "PUNPCKLBW",
|
||||
"PUNPCKLDQ", "PUNPCKLQDQ", "PUNPCKLWD", "PUSH", "PUSHA", "PUSHAD",
|
||||
"PUSHFD", "PUSHFQ", "PUSHFW", "PVALIDATE", "PXOR", "RCL", "RCPPS",
|
||||
"RCPSS", "RCR", "RDFSBASE", "RDGSBASE", "RDMSR", "RDPID", "RDPKRU",
|
||||
"RDPMC", "RDPRU", "RDRAND", "RDSEED", "RDSHR", "RDSSPD", "RDSSPQ",
|
||||
"RDTSC", "RDTSCP", "RETF", "RETN", "RMPADJUST", "RMPUPDATE",
|
||||
"ROL", "ROR", "RORX", "ROUNDPD", "ROUNDPS", "ROUNDSD", "ROUNDSS",
|
||||
"RSDC", "RSLDT", "RSM", "RSQRTPS", "RSQRTSS", "RSTORSSP", "RSTS",
|
||||
"SAHF", "SAL", "SALC", "SAR", "SARX", "SAVEPREVSSP", "SBB", "SCASB",
|
||||
"SCASD", "SCASQ", "SCASW", "SERIALIZE", "SETBE", "SETC", "SETL",
|
||||
"SETLE", "SETNBE", "SETNC", "SETNL", "SETNLE", "SETNO", "SETNP",
|
||||
"SETNS", "SETNZ", "SETO", "SETP", "SETS", "SETSSBSY", "SETZ",
|
||||
"SFENCE", "SGDT", "SHA1MSG1", "SHA1MSG2", "SHA1NEXTE", "SHA1RNDS4",
|
||||
"SHA256MSG1", "SHA256MSG2", "SHA256RNDS2", "SHL", "SHLD", "SHLX",
|
||||
"SHR", "SHRD", "SHRX", "SHUFPD", "SHUFPS", "SIDT", "SKINIT",
|
||||
"SLDT", "SLWPCB", "SMINT", "SMSW", "SPFLT", "SQRTPD", "SQRTPS",
|
||||
"SQRTSD", "SQRTSS", "STAC", "STC", "STD", "STGI", "STI", "STMXCSR",
|
||||
"STOSB", "STOSD", "STOSQ", "STOSW", "STR", "STTILECFG", "SUB",
|
||||
"SUBPD", "SUBPS", "SUBSD", "SUBSS", "SVDC", "SVLDT", "SVTS",
|
||||
"SWAPGS", "SYSCALL", "SYSENTER", "SYSEXIT", "SYSRET", "T1MSKC",
|
||||
"TDPBF16PS", "TDPBSSD", "TDPBSUD", "TDPBUSD", "TDPBUUD", "TEST",
|
||||
"TILELOADD", "TILELOADDT1", "TILERELEASE", "TILESTORED", "TILEZERO",
|
||||
"TLBSYNC", "TPAUSE", "TZCNT", "TZMSK", "UCOMISD", "UCOMISS",
|
||||
"UD0", "UD1", "UD2", "UMONITOR", "UMWAIT", "UNPCKHPD", "UNPCKHPS",
|
||||
"UNPCKLPD", "UNPCKLPS", "V4FMADDPS", "V4FMADDSS", "V4FNMADDPS",
|
||||
"V4FNMADDSS", "VADDPD", "VADDPS", "VADDSD", "VADDSS", "VADDSUBPD",
|
||||
"VADDSUBPS", "VAESDEC", "VAESDECLAST", "VAESENC", "VAESENCLAST",
|
||||
"VAESIMC", "VAESKEYGENASSIST", "VALIGND", "VALIGNQ", "VANDNPD",
|
||||
"VANDNPS", "VANDPD", "VANDPS", "VBLENDMPD", "VBLENDMPS", "VBLENDPD",
|
||||
"VBLENDPS", "VBLENDVPD", "VBLENDVPS", "VBROADCASTF128", "VBROADCASTF32X2",
|
||||
"VBROADCASTF32X4", "VBROADCASTF32X8", "VBROADCASTF64X2", "VBROADCASTF64X4",
|
||||
"VBROADCASTI128", "VBROADCASTI32X2", "VBROADCASTI32X4", "VBROADCASTI32X8",
|
||||
"VBROADCASTI64X2", "VBROADCASTI64X4", "VBROADCASTSD", "VBROADCASTSS",
|
||||
"VCMPPD", "VCMPPS", "VCMPSD", "VCMPSS", "VCOMISD", "VCOMISS",
|
||||
"VCOMPRESSPD", "VCOMPRESSPS", "VCVTDQ2PD", "VCVTDQ2PS", "VCVTNE2PS2BF16",
|
||||
"VCVTNEPS2BF16", "VCVTPD2DQ", "VCVTPD2PS", "VCVTPD2QQ", "VCVTPD2UDQ",
|
||||
"VCVTPD2UQQ", "VCVTPH2PS", "VCVTPS2DQ", "VCVTPS2PD", "VCVTPS2PH",
|
||||
"VCVTPS2QQ", "VCVTPS2UDQ", "VCVTPS2UQQ", "VCVTQQ2PD", "VCVTQQ2PS",
|
||||
"VCVTSD2SI", "VCVTSD2SS", "VCVTSD2USI", "VCVTSI2SD", "VCVTSI2SS",
|
||||
"VCVTSS2SD", "VCVTSS2SI", "VCVTSS2USI", "VCVTTPD2DQ", "VCVTTPD2QQ",
|
||||
"VCVTTPD2UDQ", "VCVTTPD2UQQ", "VCVTTPS2DQ", "VCVTTPS2QQ", "VCVTTPS2UDQ",
|
||||
"VCVTTPS2UQQ", "VCVTTSD2SI", "VCVTTSD2USI", "VCVTTSS2SI", "VCVTTSS2USI",
|
||||
"VCVTUDQ2PD", "VCVTUDQ2PS", "VCVTUQQ2PD", "VCVTUQQ2PS", "VCVTUSI2SD",
|
||||
"VCVTUSI2SS", "VDBPSADBW", "VDIVPD", "VDIVPS", "VDIVSD", "VDIVSS",
|
||||
"VDPBF16PS", "VDPPD", "VDPPS", "VERR", "VERW", "VEXP2PD", "VEXP2PS",
|
||||
"VEXPANDPD", "VEXPANDPS", "VEXTRACTF128", "VEXTRACTF32X4", "VEXTRACTF32X8",
|
||||
"VEXTRACTF64X2", "VEXTRACTF64X4", "VEXTRACTI128", "VEXTRACTI32X4",
|
||||
"VEXTRACTI32X8", "VEXTRACTI64X2", "VEXTRACTI64X4", "VEXTRACTPS",
|
||||
"VFIXUPIMMPD", "VFIXUPIMMPS", "VFIXUPIMMSD", "VFIXUPIMMSS", "VFMADD132PD",
|
||||
@ -202,7 +202,7 @@ const char *gMnemonics[1561] =
|
||||
"VPCOMW", "VPCONFLICTD", "VPCONFLICTQ", "VPDPBUSD", "VPDPBUSDS",
|
||||
"VPDPWSSD", "VPDPWSSDS", "VPERM2F128", "VPERM2I128", "VPERMB",
|
||||
"VPERMD", "VPERMI2B", "VPERMI2D", "VPERMI2PD", "VPERMI2PS", "VPERMI2Q",
|
||||
"VPERMI2W", "VPERMILPD", "VPERMILPS", "VPERMILzz2PD", "VPERMILzz2PS",
|
||||
"VPERMI2W", "VPERMIL2PD", "VPERMIL2PS", "VPERMILPD", "VPERMILPS",
|
||||
"VPERMPD", "VPERMPS", "VPERMQ", "VPERMT2B", "VPERMT2D", "VPERMT2PD",
|
||||
"VPERMT2PS", "VPERMT2Q", "VPERMT2W", "VPERMW", "VPEXPANDB", "VPEXPANDD",
|
||||
"VPEXPANDQ", "VPEXPANDW", "VPEXTRB", "VPEXTRD", "VPEXTRQ", "VPEXTRW",
|
||||
@ -232,15 +232,15 @@ const char *gMnemonics[1561] =
|
||||
"VPRORD", "VPRORQ", "VPRORVD", "VPRORVQ", "VPROTB", "VPROTD",
|
||||
"VPROTQ", "VPROTW", "VPSADBW", "VPSCATTERDD", "VPSCATTERDQ",
|
||||
"VPSCATTERQD", "VPSCATTERQQ", "VPSHAB", "VPSHAD", "VPSHAQ", "VPSHAW",
|
||||
"VPSHLB", "VPSHLDD", "VPSHLDQ", "VPSHLDVD", "VPSHLDVQ", "VPSHLDVW",
|
||||
"VPSHLDW", "VPSHLQ", "VPSHRDD", "VPSHRDQ", "VPSHRDVD", "VPSHRDVQ",
|
||||
"VPSHRDVW", "VPSHRDW", "VPSHUFB", "VPSHUFBITQMB", "VPSHUFD",
|
||||
"VPSHUFHW", "VPSHUFLW", "VPSIGNB", "VPSIGND", "VPSIGNW", "VPSLLD",
|
||||
"VPSLLDQ", "VPSLLQ", "VPSLLVD", "VPSLLVQ", "VPSLLVW", "VPSLLW",
|
||||
"VPSRAD", "VPSRAQ", "VPSRAVD", "VPSRAVQ", "VPSRAVW", "VPSRAW",
|
||||
"VPSRLD", "VPSRLDQ", "VPSRLQ", "VPSRLVD", "VPSRLVQ", "VPSRLVW",
|
||||
"VPSRLW", "VPSUBB", "VPSUBD", "VPSUBQ", "VPSUBSB", "VPSUBSW",
|
||||
"VPSUBUSB", "VPSUBUSW", "VPSUBW", "VPTERNLOGD", "VPTERNLOGQ",
|
||||
"VPSHLB", "VPSHLD", "VPSHLDD", "VPSHLDQ", "VPSHLDVD", "VPSHLDVQ",
|
||||
"VPSHLDVW", "VPSHLDW", "VPSHLQ", "VPSHLW", "VPSHRDD", "VPSHRDQ",
|
||||
"VPSHRDVD", "VPSHRDVQ", "VPSHRDVW", "VPSHRDW", "VPSHUFB", "VPSHUFBITQMB",
|
||||
"VPSHUFD", "VPSHUFHW", "VPSHUFLW", "VPSIGNB", "VPSIGND", "VPSIGNW",
|
||||
"VPSLLD", "VPSLLDQ", "VPSLLQ", "VPSLLVD", "VPSLLVQ", "VPSLLVW",
|
||||
"VPSLLW", "VPSRAD", "VPSRAQ", "VPSRAVD", "VPSRAVQ", "VPSRAVW",
|
||||
"VPSRAW", "VPSRLD", "VPSRLDQ", "VPSRLQ", "VPSRLVD", "VPSRLVQ",
|
||||
"VPSRLVW", "VPSRLW", "VPSUBB", "VPSUBD", "VPSUBQ", "VPSUBSB",
|
||||
"VPSUBSW", "VPSUBUSB", "VPSUBUSW", "VPSUBW", "VPTERNLOGD", "VPTERNLOGQ",
|
||||
"VPTEST", "VPTESTMB", "VPTESTMD", "VPTESTMQ", "VPTESTMW", "VPTESTNMB",
|
||||
"VPTESTNMD", "VPTESTNMQ", "VPTESTNMW", "VPUNPCKHBW", "VPUNPCKHDQ",
|
||||
"VPUNPCKHQDQ", "VPUNPCKHWD", "VPUNPCKLBW", "VPUNPCKLDQ", "VPUNPCKLQDQ",
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@ -330,13 +330,13 @@ const ND_TABLE_INSTRUCTION gXopTable_root_09_01_06_leaf =
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_01_07_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[1293]
|
||||
(const void *)&gInstructions[1295]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_01_04_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[1315]
|
||||
(const void *)&gInstructions[1317]
|
||||
};
|
||||
|
||||
const ND_TABLE_MODRM_REG gXopTable_root_09_01_modrmreg =
|
||||
@ -384,13 +384,13 @@ const ND_TABLE_MODRM_REG gXopTable_root_09_02_modrmreg =
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_12_reg_00_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[565]
|
||||
(const void *)&gInstructions[567]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_12_reg_01_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[1245]
|
||||
(const void *)&gInstructions[1247]
|
||||
};
|
||||
|
||||
const ND_TABLE_MODRM_REG gXopTable_root_09_12_reg_modrmreg =
|
||||
@ -420,127 +420,127 @@ const ND_TABLE_MODRM_MOD gXopTable_root_09_12_modrmmod =
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_81_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[1666]
|
||||
(const void *)&gInstructions[1668]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_80_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[1667]
|
||||
(const void *)&gInstructions[1669]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_83_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[1668]
|
||||
(const void *)&gInstructions[1670]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_82_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[1669]
|
||||
(const void *)&gInstructions[1671]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_c2_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2054]
|
||||
(const void *)&gInstructions[2057]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_c3_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2055]
|
||||
(const void *)&gInstructions[2058]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_c1_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2056]
|
||||
(const void *)&gInstructions[2059]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_cb_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2058]
|
||||
(const void *)&gInstructions[2061]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_d2_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2060]
|
||||
(const void *)&gInstructions[2063]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_d3_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2061]
|
||||
(const void *)&gInstructions[2064]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_d1_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2062]
|
||||
(const void *)&gInstructions[2065]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_db_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2063]
|
||||
(const void *)&gInstructions[2066]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_d6_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2064]
|
||||
(const void *)&gInstructions[2067]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_d7_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2065]
|
||||
(const void *)&gInstructions[2068]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_c6_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2067]
|
||||
(const void *)&gInstructions[2070]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_c7_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2068]
|
||||
(const void *)&gInstructions[2071]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_e1_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2070]
|
||||
(const void *)&gInstructions[2073]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_e3_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2072]
|
||||
(const void *)&gInstructions[2075]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_e2_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2075]
|
||||
(const void *)&gInstructions[2078]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_90_00_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2237]
|
||||
(const void *)&gInstructions[2240]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_90_01_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2238]
|
||||
(const void *)&gInstructions[2241]
|
||||
};
|
||||
|
||||
const ND_TABLE_VEX_W gXopTable_root_09_90_w =
|
||||
@ -555,13 +555,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_90_w =
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_92_00_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2240]
|
||||
(const void *)&gInstructions[2243]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_92_01_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2241]
|
||||
(const void *)&gInstructions[2244]
|
||||
};
|
||||
|
||||
const ND_TABLE_VEX_W gXopTable_root_09_92_w =
|
||||
@ -576,13 +576,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_92_w =
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_93_00_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2243]
|
||||
(const void *)&gInstructions[2246]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_93_01_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2244]
|
||||
(const void *)&gInstructions[2247]
|
||||
};
|
||||
|
||||
const ND_TABLE_VEX_W gXopTable_root_09_93_w =
|
||||
@ -597,13 +597,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_93_w =
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_91_00_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2246]
|
||||
(const void *)&gInstructions[2249]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_91_01_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2247]
|
||||
(const void *)&gInstructions[2250]
|
||||
};
|
||||
|
||||
const ND_TABLE_VEX_W gXopTable_root_09_91_w =
|
||||
@ -618,13 +618,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_91_w =
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_98_00_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2254]
|
||||
(const void *)&gInstructions[2257]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_98_01_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2255]
|
||||
(const void *)&gInstructions[2258]
|
||||
};
|
||||
|
||||
const ND_TABLE_VEX_W gXopTable_root_09_98_w =
|
||||
@ -639,13 +639,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_98_w =
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_9a_00_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2256]
|
||||
(const void *)&gInstructions[2259]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_9a_01_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2257]
|
||||
(const void *)&gInstructions[2260]
|
||||
};
|
||||
|
||||
const ND_TABLE_VEX_W gXopTable_root_09_9a_w =
|
||||
@ -660,13 +660,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_9a_w =
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_9b_00_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2258]
|
||||
(const void *)&gInstructions[2261]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_9b_01_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2259]
|
||||
(const void *)&gInstructions[2262]
|
||||
};
|
||||
|
||||
const ND_TABLE_VEX_W gXopTable_root_09_9b_w =
|
||||
@ -681,13 +681,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_9b_w =
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_99_00_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2260]
|
||||
(const void *)&gInstructions[2263]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_99_01_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2261]
|
||||
(const void *)&gInstructions[2264]
|
||||
};
|
||||
|
||||
const ND_TABLE_VEX_W gXopTable_root_09_99_w =
|
||||
@ -702,13 +702,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_99_w =
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_94_00_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2262]
|
||||
(const void *)&gInstructions[2265]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_94_01_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2263]
|
||||
(const void *)&gInstructions[2266]
|
||||
};
|
||||
|
||||
const ND_TABLE_VEX_W gXopTable_root_09_94_w =
|
||||
@ -720,16 +720,16 @@ const ND_TABLE_VEX_W gXopTable_root_09_94_w =
|
||||
}
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_95_00_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2264]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_95_01_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2265]
|
||||
(const void *)&gInstructions[2267]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_95_00_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2278]
|
||||
};
|
||||
|
||||
const ND_TABLE_VEX_W gXopTable_root_09_95_w =
|
||||
@ -741,16 +741,16 @@ const ND_TABLE_VEX_W gXopTable_root_09_95_w =
|
||||
}
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_96_00_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2266]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_96_01_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2267]
|
||||
(const void *)&gInstructions[2268]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_96_00_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2269]
|
||||
};
|
||||
|
||||
const ND_TABLE_VEX_W gXopTable_root_09_96_w =
|
||||
@ -765,13 +765,13 @@ const ND_TABLE_VEX_W gXopTable_root_09_96_w =
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_97_00_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2274]
|
||||
(const void *)&gInstructions[2276]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_09_97_01_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2275]
|
||||
(const void *)&gInstructions[2277]
|
||||
};
|
||||
|
||||
const ND_TABLE_VEX_W gXopTable_root_09_97_w =
|
||||
@ -1049,13 +1049,13 @@ const ND_TABLE_OPCODE gXopTable_root_09_opcode =
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_a2_00_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[1940]
|
||||
(const void *)&gInstructions[1943]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_a2_01_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[1941]
|
||||
(const void *)&gInstructions[1944]
|
||||
};
|
||||
|
||||
const ND_TABLE_VEX_W gXopTable_root_08_a2_w =
|
||||
@ -1070,133 +1070,133 @@ const ND_TABLE_VEX_W gXopTable_root_08_a2_w =
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_cc_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[1970]
|
||||
(const void *)&gInstructions[1973]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_ce_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[1971]
|
||||
(const void *)&gInstructions[1974]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_cf_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[1976]
|
||||
(const void *)&gInstructions[1979]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_ec_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[1977]
|
||||
(const void *)&gInstructions[1980]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_ee_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[1978]
|
||||
(const void *)&gInstructions[1981]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_ef_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[1979]
|
||||
(const void *)&gInstructions[1982]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_ed_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[1980]
|
||||
(const void *)&gInstructions[1983]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_cd_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[1981]
|
||||
(const void *)&gInstructions[1984]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_9e_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2090]
|
||||
(const void *)&gInstructions[2093]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_9f_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2091]
|
||||
(const void *)&gInstructions[2094]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_97_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2092]
|
||||
(const void *)&gInstructions[2095]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_8e_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2093]
|
||||
(const void *)&gInstructions[2096]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_8f_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2094]
|
||||
(const void *)&gInstructions[2097]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_87_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2095]
|
||||
(const void *)&gInstructions[2098]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_86_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2096]
|
||||
(const void *)&gInstructions[2099]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_85_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2097]
|
||||
(const void *)&gInstructions[2100]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_96_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2098]
|
||||
(const void *)&gInstructions[2101]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_95_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2099]
|
||||
(const void *)&gInstructions[2102]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_a6_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2100]
|
||||
(const void *)&gInstructions[2103]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_b6_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2101]
|
||||
(const void *)&gInstructions[2104]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_a3_00_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2226]
|
||||
(const void *)&gInstructions[2229]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_a3_01_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2227]
|
||||
(const void *)&gInstructions[2230]
|
||||
};
|
||||
|
||||
const ND_TABLE_VEX_W gXopTable_root_08_a3_w =
|
||||
@ -1211,25 +1211,25 @@ const ND_TABLE_VEX_W gXopTable_root_08_a3_w =
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_c0_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2236]
|
||||
(const void *)&gInstructions[2239]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_c2_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2239]
|
||||
(const void *)&gInstructions[2242]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_c3_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2242]
|
||||
(const void *)&gInstructions[2245]
|
||||
};
|
||||
|
||||
const ND_TABLE_INSTRUCTION gXopTable_root_08_c1_leaf =
|
||||
{
|
||||
ND_ILUT_INSTRUCTION,
|
||||
(const void *)&gInstructions[2245]
|
||||
(const void *)&gInstructions[2248]
|
||||
};
|
||||
|
||||
const ND_TABLE_OPCODE gXopTable_root_08_opcode =
|
||||
|
||||
@ -413,6 +413,9 @@ typedef enum _ND_OPERAND_TYPE_SPEC
|
||||
ND_OPT_MEM_SHSP,
|
||||
ND_OPT_MEM_SHS0,
|
||||
|
||||
// Special immediates.
|
||||
ND_OPT_Im2z,
|
||||
|
||||
// Misc CR/XCR/MSR/SYS registers.
|
||||
ND_OPT_CR_0,
|
||||
ND_OPT_SYS_IDTR,
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
0000000000000000 c4e2919294fb00100000 VGATHERDPD xmm2, xmmword ptr [rbx+xmm7*8+0x1000], xmm13
|
||||
0000000000000000 c4e2919294fb00100000 VGATHERDPD xmm2, qword ptr [rbx+xmm7*8+0x1000], xmm13
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX2GATHER, Ins cat: AVX2GATHER, CET tracked: no
|
||||
Exception class: SSE/VEX, exception type: 12
|
||||
@ -16,7 +16,7 @@
|
||||
VSIB index size: 4, VSIB element size: 8, VSIB element count: 2
|
||||
Operand: 2, Acc: RW, Type: Register, Size: 16, RawSize: 16, Encoding: V, RegType: Vector, RegSize: 16, RegId: 13, RegCount: 1
|
||||
|
||||
000000000000000A c4e2119294fb00100000 VGATHERDPS xmm2, xmmword ptr [rbx+xmm7*8+0x1000], xmm13
|
||||
000000000000000A c4e2119294fb00100000 VGATHERDPS xmm2, dword ptr [rbx+xmm7*8+0x1000], xmm13
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX2GATHER, Ins cat: AVX2GATHER, CET tracked: no
|
||||
Exception class: SSE/VEX, exception type: 12
|
||||
@ -34,7 +34,7 @@
|
||||
VSIB index size: 4, VSIB element size: 4, VSIB element count: 4
|
||||
Operand: 2, Acc: RW, Type: Register, Size: 16, RawSize: 16, Encoding: V, RegType: Vector, RegSize: 16, RegId: 13, RegCount: 1
|
||||
|
||||
0000000000000014 c4e2919394fb00100000 VGATHERQPD xmm2, xmmword ptr [rbx+xmm7*8+0x1000], xmm13
|
||||
0000000000000014 c4e2919394fb00100000 VGATHERQPD xmm2, qword ptr [rbx+xmm7*8+0x1000], xmm13
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX2GATHER, Ins cat: AVX2GATHER, CET tracked: no
|
||||
Exception class: SSE/VEX, exception type: 12
|
||||
@ -52,7 +52,7 @@
|
||||
VSIB index size: 8, VSIB element size: 8, VSIB element count: 2
|
||||
Operand: 2, Acc: RW, Type: Register, Size: 16, RawSize: 16, Encoding: V, RegType: Vector, RegSize: 16, RegId: 13, RegCount: 1
|
||||
|
||||
000000000000001E c4e2119394fb00100000 VGATHERQPS xmm2, qword ptr [rbx+xmm7*8+0x1000], xmm13
|
||||
000000000000001E c4e2119394fb00100000 VGATHERQPS xmm2, dword ptr [rbx+xmm7*8+0x1000], xmm13
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX2GATHER, Ins cat: AVX2GATHER, CET tracked: no
|
||||
Exception class: SSE/VEX, exception type: 12
|
||||
@ -70,7 +70,7 @@
|
||||
VSIB index size: 8, VSIB element size: 4, VSIB element count: 2
|
||||
Operand: 2, Acc: RW, Type: Register, Size: 16, RawSize: 16, Encoding: V, RegType: Vector, RegSize: 16, RegId: 13, RegCount: 1
|
||||
|
||||
0000000000000028 c4e2159394cb00100000 VGATHERQPS xmm2, xmmword ptr [rbx+ymm1*8+0x1000], xmm13
|
||||
0000000000000028 c4e2159394cb00100000 VGATHERQPS xmm2, dword ptr [rbx+ymm1*8+0x1000], xmm13
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVX2GATHER, Ins cat: AVX2GATHER, CET tracked: no
|
||||
Exception class: SSE/VEX, exception type: 12
|
||||
@ -88,7 +88,7 @@
|
||||
VSIB index size: 8, VSIB element size: 4, VSIB element count: 4
|
||||
Operand: 2, Acc: RW, Type: Register, Size: 16, RawSize: 16, Encoding: V, RegType: Vector, RegSize: 16, RegId: 13, RegCount: 1
|
||||
|
||||
0000000000000032 c4e2119094fb00100000 VPGATHERDD xmm2, xmmword ptr [rbx+xmm7*8+0x1000], xmm13
|
||||
0000000000000032 c4e2119094fb00100000 VPGATHERDD xmm2, dword ptr [rbx+xmm7*8+0x1000], xmm13
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX2GATHER, Ins cat: AVX2GATHER, CET tracked: no
|
||||
Exception class: SSE/VEX, exception type: 12
|
||||
@ -106,7 +106,7 @@
|
||||
VSIB index size: 4, VSIB element size: 4, VSIB element count: 4
|
||||
Operand: 2, Acc: RW, Type: Register, Size: 16, RawSize: 16, Encoding: V, RegType: Vector, RegSize: 16, RegId: 13, RegCount: 1
|
||||
|
||||
000000000000003C c4e2919094fb00100000 VPGATHERDQ xmm2, xmmword ptr [rbx+xmm7*8+0x1000], xmm13
|
||||
000000000000003C c4e2919094fb00100000 VPGATHERDQ xmm2, qword ptr [rbx+xmm7*8+0x1000], xmm13
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX2GATHER, Ins cat: AVX2GATHER, CET tracked: no
|
||||
Exception class: SSE/VEX, exception type: 12
|
||||
@ -124,7 +124,7 @@
|
||||
VSIB index size: 4, VSIB element size: 8, VSIB element count: 2
|
||||
Operand: 2, Acc: RW, Type: Register, Size: 16, RawSize: 16, Encoding: V, RegType: Vector, RegSize: 16, RegId: 13, RegCount: 1
|
||||
|
||||
0000000000000046 c4e2119194fb00100000 VPGATHERQD xmm2, qword ptr [rbx+xmm7*8+0x1000], xmm13
|
||||
0000000000000046 c4e2119194fb00100000 VPGATHERQD xmm2, dword ptr [rbx+xmm7*8+0x1000], xmm13
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX2GATHER, Ins cat: AVX2GATHER, CET tracked: no
|
||||
Exception class: SSE/VEX, exception type: 12
|
||||
@ -142,7 +142,7 @@
|
||||
VSIB index size: 8, VSIB element size: 4, VSIB element count: 2
|
||||
Operand: 2, Acc: RW, Type: Register, Size: 16, RawSize: 16, Encoding: V, RegType: Vector, RegSize: 16, RegId: 13, RegCount: 1
|
||||
|
||||
0000000000000050 c4e2159194cb00100000 VPGATHERQD xmm2, xmmword ptr [rbx+ymm1*8+0x1000], xmm13
|
||||
0000000000000050 c4e2159194cb00100000 VPGATHERQD xmm2, dword ptr [rbx+ymm1*8+0x1000], xmm13
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVX2GATHER, Ins cat: AVX2GATHER, CET tracked: no
|
||||
Exception class: SSE/VEX, exception type: 12
|
||||
@ -160,7 +160,7 @@
|
||||
VSIB index size: 8, VSIB element size: 4, VSIB element count: 4
|
||||
Operand: 2, Acc: RW, Type: Register, Size: 16, RawSize: 16, Encoding: V, RegType: Vector, RegSize: 16, RegId: 13, RegCount: 1
|
||||
|
||||
000000000000005A c4e2919194fb00100000 VPGATHERQQ xmm2, xmmword ptr [rbx+xmm7*8+0x1000], xmm13
|
||||
000000000000005A c4e2919194fb00100000 VPGATHERQQ xmm2, qword ptr [rbx+xmm7*8+0x1000], xmm13
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX2GATHER, Ins cat: AVX2GATHER, CET tracked: no
|
||||
Exception class: SSE/VEX, exception type: 12
|
||||
|
||||
@ -20609,7 +20609,7 @@
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512BW, Ins cat: AVX512, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 30
|
||||
EVEX Tuple Type: Tuple 1 Scalar
|
||||
EVEX Tuple Type: Tuple 1 scalar, 8 bit
|
||||
Exception class: EVEX, exception type: E9NF
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -20627,7 +20627,7 @@
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512BW, Ins cat: AVX512, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 30
|
||||
EVEX Tuple Type: Tuple 1 Scalar
|
||||
EVEX Tuple Type: Tuple 1 scalar, 8 bit
|
||||
Exception class: EVEX, exception type: E9NF
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -20802,7 +20802,7 @@
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512BW, Ins cat: AVX512, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 30
|
||||
EVEX Tuple Type: Tuple 1 Scalar
|
||||
EVEX Tuple Type: Tuple 1 scalar, 16 bit
|
||||
Exception class: EVEX, exception type: E9NF
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -20908,7 +20908,7 @@
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512BW, Ins cat: AVX512, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 30
|
||||
EVEX Tuple Type: Tuple 1 Scalar
|
||||
EVEX Tuple Type: Tuple 1 scalar, 16 bit
|
||||
Exception class: EVEX, exception type: E9NF
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -31299,7 +31299,7 @@
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 512
|
||||
ISA Set: AVX512BW, Ins cat: AVX512, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 30
|
||||
EVEX Tuple Type: Mem 128
|
||||
EVEX Tuple Type: Full Mem
|
||||
Exception class: EVEX, exception type: E4.nb
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -31863,7 +31863,7 @@
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 512
|
||||
ISA Set: AVX512BW, Ins cat: AVX512, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 30
|
||||
EVEX Tuple Type: Mem 128
|
||||
EVEX Tuple Type: Full Mem
|
||||
Exception class: EVEX, exception type: E4.nb
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -32761,7 +32761,7 @@
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 512
|
||||
ISA Set: AVX512BW, Ins cat: AVX512, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 30
|
||||
EVEX Tuple Type: Mem 128
|
||||
EVEX Tuple Type: Full Mem
|
||||
Exception class: EVEX, exception type: E4.nb
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
|
||||
@ -31928,7 +31928,7 @@
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512BW, Ins cat: AVX512, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 30
|
||||
EVEX Tuple Type: Tuple 1 Scalar
|
||||
EVEX Tuple Type: Tuple 1 scalar, 8 bit
|
||||
Exception class: EVEX, exception type: E9NF
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -31946,7 +31946,7 @@
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512BW, Ins cat: AVX512, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 30
|
||||
EVEX Tuple Type: Tuple 1 Scalar
|
||||
EVEX Tuple Type: Tuple 1 scalar, 8 bit
|
||||
Exception class: EVEX, exception type: E9NF
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -31998,7 +31998,7 @@
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512BW, Ins cat: AVX512, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 30
|
||||
EVEX Tuple Type: Tuple 1 Scalar
|
||||
EVEX Tuple Type: Tuple 1 scalar, 16 bit
|
||||
Exception class: EVEX, exception type: E9NF
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -32104,7 +32104,7 @@
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512BW, Ins cat: AVX512, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 30
|
||||
EVEX Tuple Type: Tuple 1 Scalar
|
||||
EVEX Tuple Type: Tuple 1 scalar, 16 bit
|
||||
Exception class: EVEX, exception type: E9NF
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -53354,7 +53354,7 @@
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512BW, Ins cat: AVX512, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 30
|
||||
EVEX Tuple Type: Mem 128
|
||||
EVEX Tuple Type: Full Mem
|
||||
Exception class: EVEX, exception type: E4.nb
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -53374,7 +53374,7 @@
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512BW, Ins cat: AVX512, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 30
|
||||
EVEX Tuple Type: Mem 128
|
||||
EVEX Tuple Type: Full Mem
|
||||
Exception class: EVEX, exception type: E4.nb
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -53394,7 +53394,7 @@
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512BW, Ins cat: AVX512, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 30
|
||||
EVEX Tuple Type: Mem 128
|
||||
EVEX Tuple Type: Full Mem
|
||||
Exception class: EVEX, exception type: E4.nb
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -53431,7 +53431,7 @@
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVX512BW, Ins cat: AVX512, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 30
|
||||
EVEX Tuple Type: Mem 128
|
||||
EVEX Tuple Type: Full Mem
|
||||
Exception class: EVEX, exception type: E4.nb
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -53447,11 +53447,11 @@
|
||||
Segment: 3, Base: 3,
|
||||
Operand: 3, Acc: R-, Type: Immediate, Size: 1, RawSize: 1, Encoding: I
|
||||
|
||||
0000000000004905 62b115287174db080a VPSLLW ymm13, ymmword ptr [rbx+r11*8+0x80], 0x0a
|
||||
0000000000004905 62b115287174db080a VPSLLW ymm13, ymmword ptr [rbx+r11*8+0x100], 0x0a
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVX512BW, Ins cat: AVX512, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 30
|
||||
EVEX Tuple Type: Mem 128
|
||||
EVEX Tuple Type: Full Mem
|
||||
Exception class: EVEX, exception type: E4.nb
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -53467,11 +53467,11 @@
|
||||
Segment: 3, Base: 3, Index: 11 * 8, Displacement: 0x0000000000000008,
|
||||
Operand: 3, Acc: R-, Type: Immediate, Size: 1, RawSize: 1, Encoding: I
|
||||
|
||||
000000000000490E 62b115287174dbf80a VPSLLW ymm13, ymmword ptr [rbx+r11*8-0x80], 0x0a
|
||||
000000000000490E 62b115287174dbf80a VPSLLW ymm13, ymmword ptr [rbx+r11*8-0x100], 0x0a
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVX512BW, Ins cat: AVX512, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 30
|
||||
EVEX Tuple Type: Mem 128
|
||||
EVEX Tuple Type: Full Mem
|
||||
Exception class: EVEX, exception type: E4.nb
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -53491,7 +53491,7 @@
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 512
|
||||
ISA Set: AVX512BW, Ins cat: AVX512, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 30
|
||||
EVEX Tuple Type: Mem 128
|
||||
EVEX Tuple Type: Full Mem
|
||||
Exception class: EVEX, exception type: E4.nb
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -53510,7 +53510,7 @@
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 512
|
||||
ISA Set: AVX512BW, Ins cat: AVX512, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 30
|
||||
EVEX Tuple Type: Mem 128
|
||||
EVEX Tuple Type: Full Mem
|
||||
Exception class: EVEX, exception type: E4.nb
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -53526,11 +53526,11 @@
|
||||
Segment: 3, Base: 3,
|
||||
Operand: 3, Acc: R-, Type: Immediate, Size: 1, RawSize: 1, Encoding: I
|
||||
|
||||
0000000000004925 62b13d407174db040a VPSLLW zmm24, zmmword ptr [rbx+r11*8+0x40], 0x0a
|
||||
0000000000004925 62b13d407174db040a VPSLLW zmm24, zmmword ptr [rbx+r11*8+0x100], 0x0a
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 512
|
||||
ISA Set: AVX512BW, Ins cat: AVX512, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 30
|
||||
EVEX Tuple Type: Mem 128
|
||||
EVEX Tuple Type: Full Mem
|
||||
Exception class: EVEX, exception type: E4.nb
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -53546,11 +53546,11 @@
|
||||
Segment: 3, Base: 3, Index: 11 * 8, Displacement: 0x0000000000000004,
|
||||
Operand: 3, Acc: R-, Type: Immediate, Size: 1, RawSize: 1, Encoding: I
|
||||
|
||||
000000000000492E 62b13d407174dbfc0a VPSLLW zmm24, zmmword ptr [rbx+r11*8-0x40], 0x0a
|
||||
000000000000492E 62b13d407174dbfc0a VPSLLW zmm24, zmmword ptr [rbx+r11*8-0x100], 0x0a
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 512
|
||||
ISA Set: AVX512BW, Ins cat: AVX512, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 30
|
||||
EVEX Tuple Type: Mem 128
|
||||
EVEX Tuple Type: Full Mem
|
||||
Exception class: EVEX, exception type: E4.nb
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -55571,7 +55571,7 @@
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512BW, Ins cat: AVX512, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 30
|
||||
EVEX Tuple Type: Mem 128
|
||||
EVEX Tuple Type: Full Mem
|
||||
Exception class: EVEX, exception type: E4.nb
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -55591,7 +55591,7 @@
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512BW, Ins cat: AVX512, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 30
|
||||
EVEX Tuple Type: Mem 128
|
||||
EVEX Tuple Type: Full Mem
|
||||
Exception class: EVEX, exception type: E4.nb
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -55611,7 +55611,7 @@
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512BW, Ins cat: AVX512, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 30
|
||||
EVEX Tuple Type: Mem 128
|
||||
EVEX Tuple Type: Full Mem
|
||||
Exception class: EVEX, exception type: E4.nb
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -55648,7 +55648,7 @@
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVX512BW, Ins cat: AVX512, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 30
|
||||
EVEX Tuple Type: Mem 128
|
||||
EVEX Tuple Type: Full Mem
|
||||
Exception class: EVEX, exception type: E4.nb
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -55664,11 +55664,11 @@
|
||||
Segment: 3, Base: 3,
|
||||
Operand: 3, Acc: R-, Type: Immediate, Size: 1, RawSize: 1, Encoding: I
|
||||
|
||||
0000000000004C02 62b115287164db080a VPSRAW ymm13, ymmword ptr [rbx+r11*8+0x80], 0x0a
|
||||
0000000000004C02 62b115287164db080a VPSRAW ymm13, ymmword ptr [rbx+r11*8+0x100], 0x0a
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVX512BW, Ins cat: AVX512, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 30
|
||||
EVEX Tuple Type: Mem 128
|
||||
EVEX Tuple Type: Full Mem
|
||||
Exception class: EVEX, exception type: E4.nb
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -55684,11 +55684,11 @@
|
||||
Segment: 3, Base: 3, Index: 11 * 8, Displacement: 0x0000000000000008,
|
||||
Operand: 3, Acc: R-, Type: Immediate, Size: 1, RawSize: 1, Encoding: I
|
||||
|
||||
0000000000004C0B 62b115287164dbf80a VPSRAW ymm13, ymmword ptr [rbx+r11*8-0x80], 0x0a
|
||||
0000000000004C0B 62b115287164dbf80a VPSRAW ymm13, ymmword ptr [rbx+r11*8-0x100], 0x0a
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVX512BW, Ins cat: AVX512, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 30
|
||||
EVEX Tuple Type: Mem 128
|
||||
EVEX Tuple Type: Full Mem
|
||||
Exception class: EVEX, exception type: E4.nb
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -55708,7 +55708,7 @@
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 512
|
||||
ISA Set: AVX512BW, Ins cat: AVX512, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 30
|
||||
EVEX Tuple Type: Mem 128
|
||||
EVEX Tuple Type: Full Mem
|
||||
Exception class: EVEX, exception type: E4.nb
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -55727,7 +55727,7 @@
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 512
|
||||
ISA Set: AVX512BW, Ins cat: AVX512, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 30
|
||||
EVEX Tuple Type: Mem 128
|
||||
EVEX Tuple Type: Full Mem
|
||||
Exception class: EVEX, exception type: E4.nb
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -55743,11 +55743,11 @@
|
||||
Segment: 3, Base: 3,
|
||||
Operand: 3, Acc: R-, Type: Immediate, Size: 1, RawSize: 1, Encoding: I
|
||||
|
||||
0000000000004C22 62b13d407164db040a VPSRAW zmm24, zmmword ptr [rbx+r11*8+0x40], 0x0a
|
||||
0000000000004C22 62b13d407164db040a VPSRAW zmm24, zmmword ptr [rbx+r11*8+0x100], 0x0a
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 512
|
||||
ISA Set: AVX512BW, Ins cat: AVX512, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 30
|
||||
EVEX Tuple Type: Mem 128
|
||||
EVEX Tuple Type: Full Mem
|
||||
Exception class: EVEX, exception type: E4.nb
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -55763,11 +55763,11 @@
|
||||
Segment: 3, Base: 3, Index: 11 * 8, Displacement: 0x0000000000000004,
|
||||
Operand: 3, Acc: R-, Type: Immediate, Size: 1, RawSize: 1, Encoding: I
|
||||
|
||||
0000000000004C2B 62b13d407164dbfc0a VPSRAW zmm24, zmmword ptr [rbx+r11*8-0x40], 0x0a
|
||||
0000000000004C2B 62b13d407164dbfc0a VPSRAW zmm24, zmmword ptr [rbx+r11*8-0x100], 0x0a
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 512
|
||||
ISA Set: AVX512BW, Ins cat: AVX512, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 30
|
||||
EVEX Tuple Type: Mem 128
|
||||
EVEX Tuple Type: Full Mem
|
||||
Exception class: EVEX, exception type: E4.nb
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -58011,7 +58011,7 @@
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512BW, Ins cat: AVX512, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 30
|
||||
EVEX Tuple Type: Mem 128
|
||||
EVEX Tuple Type: Full Mem
|
||||
Exception class: EVEX, exception type: E4.nb
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -58031,7 +58031,7 @@
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512BW, Ins cat: AVX512, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 30
|
||||
EVEX Tuple Type: Mem 128
|
||||
EVEX Tuple Type: Full Mem
|
||||
Exception class: EVEX, exception type: E4.nb
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -58051,7 +58051,7 @@
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512BW, Ins cat: AVX512, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 30
|
||||
EVEX Tuple Type: Mem 128
|
||||
EVEX Tuple Type: Full Mem
|
||||
Exception class: EVEX, exception type: E4.nb
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -58088,7 +58088,7 @@
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVX512BW, Ins cat: AVX512, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 30
|
||||
EVEX Tuple Type: Mem 128
|
||||
EVEX Tuple Type: Full Mem
|
||||
Exception class: EVEX, exception type: E4.nb
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -58104,11 +58104,11 @@
|
||||
Segment: 3, Base: 3,
|
||||
Operand: 3, Acc: R-, Type: Immediate, Size: 1, RawSize: 1, Encoding: I
|
||||
|
||||
0000000000004F5C 62b115287154db080a VPSRLW ymm13, ymmword ptr [rbx+r11*8+0x80], 0x0a
|
||||
0000000000004F5C 62b115287154db080a VPSRLW ymm13, ymmword ptr [rbx+r11*8+0x100], 0x0a
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVX512BW, Ins cat: AVX512, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 30
|
||||
EVEX Tuple Type: Mem 128
|
||||
EVEX Tuple Type: Full Mem
|
||||
Exception class: EVEX, exception type: E4.nb
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -58124,11 +58124,11 @@
|
||||
Segment: 3, Base: 3, Index: 11 * 8, Displacement: 0x0000000000000008,
|
||||
Operand: 3, Acc: R-, Type: Immediate, Size: 1, RawSize: 1, Encoding: I
|
||||
|
||||
0000000000004F65 62b115287154dbf80a VPSRLW ymm13, ymmword ptr [rbx+r11*8-0x80], 0x0a
|
||||
0000000000004F65 62b115287154dbf80a VPSRLW ymm13, ymmword ptr [rbx+r11*8-0x100], 0x0a
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVX512BW, Ins cat: AVX512, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 30
|
||||
EVEX Tuple Type: Mem 128
|
||||
EVEX Tuple Type: Full Mem
|
||||
Exception class: EVEX, exception type: E4.nb
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -58148,7 +58148,7 @@
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 512
|
||||
ISA Set: AVX512BW, Ins cat: AVX512, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 30
|
||||
EVEX Tuple Type: Mem 128
|
||||
EVEX Tuple Type: Full Mem
|
||||
Exception class: EVEX, exception type: E4.nb
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -58167,7 +58167,7 @@
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 512
|
||||
ISA Set: AVX512BW, Ins cat: AVX512, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 30
|
||||
EVEX Tuple Type: Mem 128
|
||||
EVEX Tuple Type: Full Mem
|
||||
Exception class: EVEX, exception type: E4.nb
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -58183,11 +58183,11 @@
|
||||
Segment: 3, Base: 3,
|
||||
Operand: 3, Acc: R-, Type: Immediate, Size: 1, RawSize: 1, Encoding: I
|
||||
|
||||
0000000000004F7C 62b13d407154db040a VPSRLW zmm24, zmmword ptr [rbx+r11*8+0x40], 0x0a
|
||||
0000000000004F7C 62b13d407154db040a VPSRLW zmm24, zmmword ptr [rbx+r11*8+0x100], 0x0a
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 512
|
||||
ISA Set: AVX512BW, Ins cat: AVX512, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 30
|
||||
EVEX Tuple Type: Mem 128
|
||||
EVEX Tuple Type: Full Mem
|
||||
Exception class: EVEX, exception type: E4.nb
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -58203,11 +58203,11 @@
|
||||
Segment: 3, Base: 3, Index: 11 * 8, Displacement: 0x0000000000000004,
|
||||
Operand: 3, Acc: R-, Type: Immediate, Size: 1, RawSize: 1, Encoding: I
|
||||
|
||||
0000000000004F85 62b13d407154dbfc0a VPSRLW zmm24, zmmword ptr [rbx+r11*8-0x40], 0x0a
|
||||
0000000000004F85 62b13d407154dbfc0a VPSRLW zmm24, zmmword ptr [rbx+r11*8-0x100], 0x0a
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 512
|
||||
ISA Set: AVX512BW, Ins cat: AVX512, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 30
|
||||
EVEX Tuple Type: Mem 128
|
||||
EVEX Tuple Type: Full Mem
|
||||
Exception class: EVEX, exception type: E4.nb
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
|
||||
@ -9693,7 +9693,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -9711,7 +9711,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -9730,7 +9730,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -9746,11 +9746,11 @@
|
||||
Segment: 3, Base: 3,
|
||||
Decorator: Broadcast 8 bytes element 2 times
|
||||
|
||||
0000000000000CD6 62b1fd087954db10 VCVTPD2UQQ xmm2, xmmword ptr [rbx+r11*8+0x80]
|
||||
0000000000000CD6 62b1fd087954db10 VCVTPD2UQQ xmm2, xmmword ptr [rbx+r11*8+0x100]
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -9765,11 +9765,11 @@
|
||||
Operand: 2, Acc: R-, Type: Memory, Size: 16, RawSize: 16, Encoding: M, Compressed displacement: yes,
|
||||
Segment: 3, Base: 3, Index: 11 * 8, Displacement: 0x0000000000000010,
|
||||
|
||||
0000000000000CDE 62b1fd087954dbf0 VCVTPD2UQQ xmm2, xmmword ptr [rbx+r11*8-0x80]
|
||||
0000000000000CDE 62b1fd087954dbf0 VCVTPD2UQQ xmm2, xmmword ptr [rbx+r11*8-0x100]
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -9788,7 +9788,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -9807,7 +9807,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -9827,7 +9827,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -9844,11 +9844,11 @@
|
||||
Segment: 3, Base: 3,
|
||||
Decorator: Broadcast 8 bytes element 2 times
|
||||
|
||||
0000000000000CF8 62b1fd0d7954db10 VCVTPD2UQQ xmm2{k5}, xmmword ptr [rbx+r11*8+0x80]
|
||||
0000000000000CF8 62b1fd0d7954db10 VCVTPD2UQQ xmm2{k5}, xmmword ptr [rbx+r11*8+0x100]
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -9864,11 +9864,11 @@
|
||||
Operand: 2, Acc: R-, Type: Memory, Size: 16, RawSize: 16, Encoding: M, Compressed displacement: yes,
|
||||
Segment: 3, Base: 3, Index: 11 * 8, Displacement: 0x0000000000000010,
|
||||
|
||||
0000000000000D00 62b1fd0d7954dbf0 VCVTPD2UQQ xmm2{k5}, xmmword ptr [rbx+r11*8-0x80]
|
||||
0000000000000D00 62b1fd0d7954dbf0 VCVTPD2UQQ xmm2{k5}, xmmword ptr [rbx+r11*8-0x100]
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -9888,7 +9888,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -9907,7 +9907,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -9927,7 +9927,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -9944,11 +9944,11 @@
|
||||
Segment: 3, Base: 3,
|
||||
Decorator: Broadcast 8 bytes element 2 times
|
||||
|
||||
0000000000000D1A 62b1fd887954db10 VCVTPD2UQQ xmm2, xmmword ptr [rbx+r11*8+0x80]
|
||||
0000000000000D1A 62b1fd887954db10 VCVTPD2UQQ xmm2, xmmword ptr [rbx+r11*8+0x100]
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -9964,11 +9964,11 @@
|
||||
Operand: 2, Acc: R-, Type: Memory, Size: 16, RawSize: 16, Encoding: M, Compressed displacement: yes,
|
||||
Segment: 3, Base: 3, Index: 11 * 8, Displacement: 0x0000000000000010,
|
||||
|
||||
0000000000000D22 62b1fd887954dbf0 VCVTPD2UQQ xmm2, xmmword ptr [rbx+r11*8-0x80]
|
||||
0000000000000D22 62b1fd887954dbf0 VCVTPD2UQQ xmm2, xmmword ptr [rbx+r11*8-0x100]
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -9988,7 +9988,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -10008,7 +10008,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -10029,7 +10029,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -10047,11 +10047,11 @@
|
||||
Segment: 3, Base: 3,
|
||||
Decorator: Broadcast 8 bytes element 2 times
|
||||
|
||||
0000000000000D3C 62b1fd8d7954db10 VCVTPD2UQQ xmm2{k5}{z}, xmmword ptr [rbx+r11*8+0x80]
|
||||
0000000000000D3C 62b1fd8d7954db10 VCVTPD2UQQ xmm2{k5}{z}, xmmword ptr [rbx+r11*8+0x100]
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -10068,11 +10068,11 @@
|
||||
Operand: 2, Acc: R-, Type: Memory, Size: 16, RawSize: 16, Encoding: M, Compressed displacement: yes,
|
||||
Segment: 3, Base: 3, Index: 11 * 8, Displacement: 0x0000000000000010,
|
||||
|
||||
0000000000000D44 62b1fd8d7954dbf0 VCVTPD2UQQ xmm2{k5}{z}, xmmword ptr [rbx+r11*8-0x80]
|
||||
0000000000000D44 62b1fd8d7954dbf0 VCVTPD2UQQ xmm2{k5}{z}, xmmword ptr [rbx+r11*8-0x100]
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -10093,7 +10093,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -10111,7 +10111,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -10130,7 +10130,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -10146,11 +10146,11 @@
|
||||
Segment: 3, Base: 3,
|
||||
Decorator: Broadcast 8 bytes element 4 times
|
||||
|
||||
0000000000000D5E 62a1fd287944db08 VCVTPD2UQQ ymm16, ymmword ptr [rbx+r11*8+0x80]
|
||||
0000000000000D5E 62a1fd287944db08 VCVTPD2UQQ ymm16, ymmword ptr [rbx+r11*8+0x100]
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -10165,11 +10165,11 @@
|
||||
Operand: 2, Acc: R-, Type: Memory, Size: 32, RawSize: 32, Encoding: M, Compressed displacement: yes,
|
||||
Segment: 3, Base: 3, Index: 11 * 8, Displacement: 0x0000000000000008,
|
||||
|
||||
0000000000000D66 62a1fd287944dbf8 VCVTPD2UQQ ymm16, ymmword ptr [rbx+r11*8-0x80]
|
||||
0000000000000D66 62a1fd287944dbf8 VCVTPD2UQQ ymm16, ymmword ptr [rbx+r11*8-0x100]
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -10188,7 +10188,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -10207,7 +10207,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -10227,7 +10227,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -10244,11 +10244,11 @@
|
||||
Segment: 3, Base: 3,
|
||||
Decorator: Broadcast 8 bytes element 4 times
|
||||
|
||||
0000000000000D80 62a1fd2d7944db08 VCVTPD2UQQ ymm16{k5}, ymmword ptr [rbx+r11*8+0x80]
|
||||
0000000000000D80 62a1fd2d7944db08 VCVTPD2UQQ ymm16{k5}, ymmword ptr [rbx+r11*8+0x100]
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -10264,11 +10264,11 @@
|
||||
Operand: 2, Acc: R-, Type: Memory, Size: 32, RawSize: 32, Encoding: M, Compressed displacement: yes,
|
||||
Segment: 3, Base: 3, Index: 11 * 8, Displacement: 0x0000000000000008,
|
||||
|
||||
0000000000000D88 62a1fd2d7944dbf8 VCVTPD2UQQ ymm16{k5}, ymmword ptr [rbx+r11*8-0x80]
|
||||
0000000000000D88 62a1fd2d7944dbf8 VCVTPD2UQQ ymm16{k5}, ymmword ptr [rbx+r11*8-0x100]
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -10288,7 +10288,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -10307,7 +10307,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -10327,7 +10327,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -10344,11 +10344,11 @@
|
||||
Segment: 3, Base: 3,
|
||||
Decorator: Broadcast 8 bytes element 4 times
|
||||
|
||||
0000000000000DA2 62a1fda87944db08 VCVTPD2UQQ ymm16, ymmword ptr [rbx+r11*8+0x80]
|
||||
0000000000000DA2 62a1fda87944db08 VCVTPD2UQQ ymm16, ymmword ptr [rbx+r11*8+0x100]
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -10364,11 +10364,11 @@
|
||||
Operand: 2, Acc: R-, Type: Memory, Size: 32, RawSize: 32, Encoding: M, Compressed displacement: yes,
|
||||
Segment: 3, Base: 3, Index: 11 * 8, Displacement: 0x0000000000000008,
|
||||
|
||||
0000000000000DAA 62a1fda87944dbf8 VCVTPD2UQQ ymm16, ymmword ptr [rbx+r11*8-0x80]
|
||||
0000000000000DAA 62a1fda87944dbf8 VCVTPD2UQQ ymm16, ymmword ptr [rbx+r11*8-0x100]
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -10388,7 +10388,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -10408,7 +10408,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -10429,7 +10429,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -10447,11 +10447,11 @@
|
||||
Segment: 3, Base: 3,
|
||||
Decorator: Broadcast 8 bytes element 4 times
|
||||
|
||||
0000000000000DC4 62a1fdad7944db08 VCVTPD2UQQ ymm16{k5}{z}, ymmword ptr [rbx+r11*8+0x80]
|
||||
0000000000000DC4 62a1fdad7944db08 VCVTPD2UQQ ymm16{k5}{z}, ymmword ptr [rbx+r11*8+0x100]
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -10468,11 +10468,11 @@
|
||||
Operand: 2, Acc: R-, Type: Memory, Size: 32, RawSize: 32, Encoding: M, Compressed displacement: yes,
|
||||
Segment: 3, Base: 3, Index: 11 * 8, Displacement: 0x0000000000000008,
|
||||
|
||||
0000000000000DCC 62a1fdad7944dbf8 VCVTPD2UQQ ymm16{k5}{z}, ymmword ptr [rbx+r11*8-0x80]
|
||||
0000000000000DCC 62a1fdad7944dbf8 VCVTPD2UQQ ymm16{k5}{z}, ymmword ptr [rbx+r11*8-0x100]
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -10493,7 +10493,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 512
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -10511,7 +10511,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 512
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -10529,7 +10529,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 512
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -10548,7 +10548,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 512
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -10564,11 +10564,11 @@
|
||||
Segment: 3, Base: 3,
|
||||
Decorator: Broadcast 8 bytes element 8 times
|
||||
|
||||
0000000000000DEC 6221fd487944db04 VCVTPD2UQQ zmm24, zmmword ptr [rbx+r11*8+0x80]
|
||||
0000000000000DEC 6221fd487944db04 VCVTPD2UQQ zmm24, zmmword ptr [rbx+r11*8+0x100]
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 512
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -10583,11 +10583,11 @@
|
||||
Operand: 2, Acc: R-, Type: Memory, Size: 64, RawSize: 64, Encoding: M, Compressed displacement: yes,
|
||||
Segment: 3, Base: 3, Index: 11 * 8, Displacement: 0x0000000000000004,
|
||||
|
||||
0000000000000DF4 6221fd487944dbfc VCVTPD2UQQ zmm24, zmmword ptr [rbx+r11*8-0x80]
|
||||
0000000000000DF4 6221fd487944dbfc VCVTPD2UQQ zmm24, zmmword ptr [rbx+r11*8-0x100]
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 512
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -10606,7 +10606,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 512
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -10625,7 +10625,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 512
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -10644,7 +10644,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 512
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -10664,7 +10664,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 512
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -10681,11 +10681,11 @@
|
||||
Segment: 3, Base: 3,
|
||||
Decorator: Broadcast 8 bytes element 8 times
|
||||
|
||||
0000000000000E14 6221fd4d7944db04 VCVTPD2UQQ zmm24{k5}, zmmword ptr [rbx+r11*8+0x80]
|
||||
0000000000000E14 6221fd4d7944db04 VCVTPD2UQQ zmm24{k5}, zmmword ptr [rbx+r11*8+0x100]
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 512
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -10701,11 +10701,11 @@
|
||||
Operand: 2, Acc: R-, Type: Memory, Size: 64, RawSize: 64, Encoding: M, Compressed displacement: yes,
|
||||
Segment: 3, Base: 3, Index: 11 * 8, Displacement: 0x0000000000000004,
|
||||
|
||||
0000000000000E1C 6221fd4d7944dbfc VCVTPD2UQQ zmm24{k5}, zmmword ptr [rbx+r11*8-0x80]
|
||||
0000000000000E1C 6221fd4d7944dbfc VCVTPD2UQQ zmm24{k5}, zmmword ptr [rbx+r11*8-0x100]
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 512
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -10725,7 +10725,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 512
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -10744,7 +10744,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 512
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -10763,7 +10763,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 512
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -10783,7 +10783,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 512
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -10800,11 +10800,11 @@
|
||||
Segment: 3, Base: 3,
|
||||
Decorator: Broadcast 8 bytes element 8 times
|
||||
|
||||
0000000000000E3C 6221fdc87944db04 VCVTPD2UQQ zmm24, zmmword ptr [rbx+r11*8+0x80]
|
||||
0000000000000E3C 6221fdc87944db04 VCVTPD2UQQ zmm24, zmmword ptr [rbx+r11*8+0x100]
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 512
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -10820,11 +10820,11 @@
|
||||
Operand: 2, Acc: R-, Type: Memory, Size: 64, RawSize: 64, Encoding: M, Compressed displacement: yes,
|
||||
Segment: 3, Base: 3, Index: 11 * 8, Displacement: 0x0000000000000004,
|
||||
|
||||
0000000000000E44 6221fdc87944dbfc VCVTPD2UQQ zmm24, zmmword ptr [rbx+r11*8-0x80]
|
||||
0000000000000E44 6221fdc87944dbfc VCVTPD2UQQ zmm24, zmmword ptr [rbx+r11*8-0x100]
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 512
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -10844,7 +10844,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 512
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -10864,7 +10864,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 512
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -10884,7 +10884,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 512
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -10905,7 +10905,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 512
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -10923,11 +10923,11 @@
|
||||
Segment: 3, Base: 3,
|
||||
Decorator: Broadcast 8 bytes element 8 times
|
||||
|
||||
0000000000000E64 6221fdcd7944db04 VCVTPD2UQQ zmm24{k5}{z}, zmmword ptr [rbx+r11*8+0x80]
|
||||
0000000000000E64 6221fdcd7944db04 VCVTPD2UQQ zmm24{k5}{z}, zmmword ptr [rbx+r11*8+0x100]
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 512
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -10944,11 +10944,11 @@
|
||||
Operand: 2, Acc: R-, Type: Memory, Size: 64, RawSize: 64, Encoding: M, Compressed displacement: yes,
|
||||
Segment: 3, Base: 3, Index: 11 * 8, Displacement: 0x0000000000000004,
|
||||
|
||||
0000000000000E6C 6221fdcd7944dbfc VCVTPD2UQQ zmm24{k5}{z}, zmmword ptr [rbx+r11*8-0x80]
|
||||
0000000000000E6C 6221fdcd7944dbfc VCVTPD2UQQ zmm24{k5}{z}, zmmword ptr [rbx+r11*8-0x100]
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 512
|
||||
ISA Set: AVX512DQ, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 17
|
||||
EVEX Tuple Type: Half
|
||||
EVEX Tuple Type: Full
|
||||
Exception class: EVEX, exception type: E2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
0000000000000000 62f2fd45c68ccb00100000 VGATHERPF0DPD zmmword ptr [rbx+ymm17*8+0x1000]{k5}
|
||||
0000000000000000 62f2fd45c68ccb00100000 VGATHERPF0DPD qword ptr [rbx+ymm17*8+0x1000]{k5}
|
||||
DSIZE: 64, ASIZE: 64, VLEN: -
|
||||
ISA Set: AVX512PF, Ins cat: GATHER, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 26
|
||||
@ -18,7 +18,7 @@
|
||||
Decorator: Mask k5
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 8, RawSize: 8, Encoding: A, RegType: Mask, RegSize: 8, RegId: 5, RegCount: 1
|
||||
|
||||
000000000000000B 62b27d45c68cdb00100000 VGATHERPF0DPS zmmword ptr [rbx+zmm27*8+0x1000]{k5}
|
||||
000000000000000B 62b27d45c68cdb00100000 VGATHERPF0DPS dword ptr [rbx+zmm27*8+0x1000]{k5}
|
||||
DSIZE: 32, ASIZE: 64, VLEN: -
|
||||
ISA Set: AVX512PF, Ins cat: GATHER, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 26
|
||||
@ -38,7 +38,7 @@
|
||||
Decorator: Mask k5
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 8, RawSize: 8, Encoding: A, RegType: Mask, RegSize: 8, RegId: 5, RegCount: 1
|
||||
|
||||
0000000000000016 62b2fd45c78cdb00100000 VGATHERPF0QPD zmmword ptr [rbx+zmm27*8+0x1000]{k5}
|
||||
0000000000000016 62b2fd45c78cdb00100000 VGATHERPF0QPD qword ptr [rbx+zmm27*8+0x1000]{k5}
|
||||
DSIZE: 64, ASIZE: 64, VLEN: -
|
||||
ISA Set: AVX512PF, Ins cat: GATHER, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 26
|
||||
@ -58,7 +58,7 @@
|
||||
Decorator: Mask k5
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 8, RawSize: 8, Encoding: A, RegType: Mask, RegSize: 8, RegId: 5, RegCount: 1
|
||||
|
||||
0000000000000021 62b27d45c78cdb00100000 VGATHERPF0QPS ymmword ptr [rbx+zmm27*8+0x1000]{k5}
|
||||
0000000000000021 62b27d45c78cdb00100000 VGATHERPF0QPS dword ptr [rbx+zmm27*8+0x1000]{k5}
|
||||
DSIZE: 32, ASIZE: 64, VLEN: -
|
||||
ISA Set: AVX512PF, Ins cat: GATHER, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 26
|
||||
@ -78,7 +78,7 @@
|
||||
Decorator: Mask k5
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 8, RawSize: 8, Encoding: A, RegType: Mask, RegSize: 8, RegId: 5, RegCount: 1
|
||||
|
||||
000000000000002C 62f2fd45c694cb00100000 VGATHERPF1DPD zmmword ptr [rbx+ymm17*8+0x1000]{k5}
|
||||
000000000000002C 62f2fd45c694cb00100000 VGATHERPF1DPD qword ptr [rbx+ymm17*8+0x1000]{k5}
|
||||
DSIZE: 64, ASIZE: 64, VLEN: -
|
||||
ISA Set: AVX512PF, Ins cat: GATHER, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 26
|
||||
@ -98,7 +98,7 @@
|
||||
Decorator: Mask k5
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 8, RawSize: 8, Encoding: A, RegType: Mask, RegSize: 8, RegId: 5, RegCount: 1
|
||||
|
||||
0000000000000037 62b27d45c694db00100000 VGATHERPF1DPS zmmword ptr [rbx+zmm27*8+0x1000]{k5}
|
||||
0000000000000037 62b27d45c694db00100000 VGATHERPF1DPS dword ptr [rbx+zmm27*8+0x1000]{k5}
|
||||
DSIZE: 32, ASIZE: 64, VLEN: -
|
||||
ISA Set: AVX512PF, Ins cat: GATHER, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 26
|
||||
@ -118,7 +118,7 @@
|
||||
Decorator: Mask k5
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 8, RawSize: 8, Encoding: A, RegType: Mask, RegSize: 8, RegId: 5, RegCount: 1
|
||||
|
||||
0000000000000042 62b2fd45c794db00100000 VGATHERPF1QPD zmmword ptr [rbx+zmm27*8+0x1000]{k5}
|
||||
0000000000000042 62b2fd45c794db00100000 VGATHERPF1QPD qword ptr [rbx+zmm27*8+0x1000]{k5}
|
||||
DSIZE: 64, ASIZE: 64, VLEN: -
|
||||
ISA Set: AVX512PF, Ins cat: GATHER, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 26
|
||||
@ -138,7 +138,7 @@
|
||||
Decorator: Mask k5
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 8, RawSize: 8, Encoding: A, RegType: Mask, RegSize: 8, RegId: 5, RegCount: 1
|
||||
|
||||
000000000000004D 62b27d45c794db00100000 VGATHERPF1QPS ymmword ptr [rbx+zmm27*8+0x1000]{k5}
|
||||
000000000000004D 62b27d45c794db00100000 VGATHERPF1QPS dword ptr [rbx+zmm27*8+0x1000]{k5}
|
||||
DSIZE: 32, ASIZE: 64, VLEN: -
|
||||
ISA Set: AVX512PF, Ins cat: GATHER, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 26
|
||||
@ -158,7 +158,7 @@
|
||||
Decorator: Mask k5
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 8, RawSize: 8, Encoding: A, RegType: Mask, RegSize: 8, RegId: 5, RegCount: 1
|
||||
|
||||
0000000000000058 62f2fd45c6accb00100000 VSCATTERPF0DPD zmmword ptr [rbx+ymm17*8+0x1000]{k5}
|
||||
0000000000000058 62f2fd45c6accb00100000 VSCATTERPF0DPD qword ptr [rbx+ymm17*8+0x1000]{k5}
|
||||
DSIZE: 64, ASIZE: 64, VLEN: -
|
||||
ISA Set: AVX512PF, Ins cat: SCATTER, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 26
|
||||
@ -178,7 +178,7 @@
|
||||
Decorator: Mask k5
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 8, RawSize: 8, Encoding: A, RegType: Mask, RegSize: 8, RegId: 5, RegCount: 1
|
||||
|
||||
0000000000000063 62b27d45c6acdb00100000 VSCATTERPF0DPS zmmword ptr [rbx+zmm27*8+0x1000]{k5}
|
||||
0000000000000063 62b27d45c6acdb00100000 VSCATTERPF0DPS dword ptr [rbx+zmm27*8+0x1000]{k5}
|
||||
DSIZE: 32, ASIZE: 64, VLEN: -
|
||||
ISA Set: AVX512PF, Ins cat: SCATTER, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 26
|
||||
@ -198,7 +198,7 @@
|
||||
Decorator: Mask k5
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 8, RawSize: 8, Encoding: A, RegType: Mask, RegSize: 8, RegId: 5, RegCount: 1
|
||||
|
||||
000000000000006E 62b2fd45c7acdb00100000 VSCATTERPF0QPD zmmword ptr [rbx+zmm27*8+0x1000]{k5}
|
||||
000000000000006E 62b2fd45c7acdb00100000 VSCATTERPF0QPD qword ptr [rbx+zmm27*8+0x1000]{k5}
|
||||
DSIZE: 64, ASIZE: 64, VLEN: -
|
||||
ISA Set: AVX512PF, Ins cat: SCATTER, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 26
|
||||
@ -218,7 +218,7 @@
|
||||
Decorator: Mask k5
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 8, RawSize: 8, Encoding: A, RegType: Mask, RegSize: 8, RegId: 5, RegCount: 1
|
||||
|
||||
0000000000000079 62b27d45c7acdb00100000 VSCATTERPF0QPS ymmword ptr [rbx+zmm27*8+0x1000]{k5}
|
||||
0000000000000079 62b27d45c7acdb00100000 VSCATTERPF0QPS dword ptr [rbx+zmm27*8+0x1000]{k5}
|
||||
DSIZE: 32, ASIZE: 64, VLEN: -
|
||||
ISA Set: AVX512PF, Ins cat: SCATTER, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 26
|
||||
@ -238,7 +238,7 @@
|
||||
Decorator: Mask k5
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 8, RawSize: 8, Encoding: A, RegType: Mask, RegSize: 8, RegId: 5, RegCount: 1
|
||||
|
||||
0000000000000084 62f2fd45c6b4cb00100000 VSCATTERPF1DPD zmmword ptr [rbx+ymm17*8+0x1000]{k5}
|
||||
0000000000000084 62f2fd45c6b4cb00100000 VSCATTERPF1DPD qword ptr [rbx+ymm17*8+0x1000]{k5}
|
||||
DSIZE: 64, ASIZE: 64, VLEN: -
|
||||
ISA Set: AVX512PF, Ins cat: SCATTER, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 26
|
||||
@ -258,7 +258,7 @@
|
||||
Decorator: Mask k5
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 8, RawSize: 8, Encoding: A, RegType: Mask, RegSize: 8, RegId: 5, RegCount: 1
|
||||
|
||||
000000000000008F 62b27d45c6b4db00100000 VSCATTERPF1DPS zmmword ptr [rbx+zmm27*8+0x1000]{k5}
|
||||
000000000000008F 62b27d45c6b4db00100000 VSCATTERPF1DPS dword ptr [rbx+zmm27*8+0x1000]{k5}
|
||||
DSIZE: 32, ASIZE: 64, VLEN: -
|
||||
ISA Set: AVX512PF, Ins cat: SCATTER, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 26
|
||||
@ -278,7 +278,7 @@
|
||||
Decorator: Mask k5
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 8, RawSize: 8, Encoding: A, RegType: Mask, RegSize: 8, RegId: 5, RegCount: 1
|
||||
|
||||
000000000000009A 62b2fd45c7b4db00100000 VSCATTERPF1QPD zmmword ptr [rbx+zmm27*8+0x1000]{k5}
|
||||
000000000000009A 62b2fd45c7b4db00100000 VSCATTERPF1QPD qword ptr [rbx+zmm27*8+0x1000]{k5}
|
||||
DSIZE: 64, ASIZE: 64, VLEN: -
|
||||
ISA Set: AVX512PF, Ins cat: SCATTER, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 26
|
||||
@ -298,7 +298,7 @@
|
||||
Decorator: Mask k5
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 8, RawSize: 8, Encoding: A, RegType: Mask, RegSize: 8, RegId: 5, RegCount: 1
|
||||
|
||||
00000000000000A5 62b27d45c7b4db00100000 VSCATTERPF1QPS ymmword ptr [rbx+zmm27*8+0x1000]{k5}
|
||||
00000000000000A5 62b27d45c7b4db00100000 VSCATTERPF1QPS dword ptr [rbx+zmm27*8+0x1000]{k5}
|
||||
DSIZE: 32, ASIZE: 64, VLEN: -
|
||||
ISA Set: AVX512PF, Ins cat: SCATTER, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 26
|
||||
|
||||
@ -2,7 +2,7 @@
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512VBMI2, Ins cat: AVX512VBMI, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 6
|
||||
EVEX Tuple Type: Tuple 1 Scalar
|
||||
EVEX Tuple Type: Tuple 1 scalar, 8 bit
|
||||
Exception class: EVEX, exception type: E4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -20,7 +20,7 @@
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVX512VBMI2, Ins cat: AVX512VBMI, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 6
|
||||
EVEX Tuple Type: Tuple 1 Scalar
|
||||
EVEX Tuple Type: Tuple 1 scalar, 8 bit
|
||||
Exception class: EVEX, exception type: E4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -38,7 +38,7 @@
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 512
|
||||
ISA Set: AVX512VBMI2, Ins cat: AVX512VBMI, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 6
|
||||
EVEX Tuple Type: Tuple 1 Scalar
|
||||
EVEX Tuple Type: Tuple 1 scalar, 8 bit
|
||||
Exception class: EVEX, exception type: E4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -56,7 +56,7 @@
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512VBMI2, Ins cat: AVX512VBMI, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 6
|
||||
EVEX Tuple Type: Tuple 1 Scalar
|
||||
EVEX Tuple Type: Tuple 1 scalar, 8 bit
|
||||
Exception class: EVEX, exception type: E4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -75,7 +75,7 @@
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVX512VBMI2, Ins cat: AVX512VBMI, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 6
|
||||
EVEX Tuple Type: Tuple 1 Scalar
|
||||
EVEX Tuple Type: Tuple 1 scalar, 8 bit
|
||||
Exception class: EVEX, exception type: E4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -94,7 +94,7 @@
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 512
|
||||
ISA Set: AVX512VBMI2, Ins cat: AVX512VBMI, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 6
|
||||
EVEX Tuple Type: Tuple 1 Scalar
|
||||
EVEX Tuple Type: Tuple 1 scalar, 8 bit
|
||||
Exception class: EVEX, exception type: E4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -109,11 +109,11 @@
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 8, RawSize: 8, Encoding: A, RegType: Mask, RegSize: 8, RegId: 0, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Register, Size: 64, RawSize: 64, Encoding: R, RegType: Vector, RegSize: 64, RegId: 24, RegCount: 1
|
||||
|
||||
0000000000000024 62b27d086354db40 VPCOMPRESSB xmmword ptr [rbx+r11*8+0x100], xmm2
|
||||
0000000000000024 62b27d086354db40 VPCOMPRESSB xmmword ptr [rbx+r11*8+0x40], xmm2
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512VBMI2, Ins cat: AVX512VBMI, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 6
|
||||
EVEX Tuple Type: Tuple 1 Scalar
|
||||
EVEX Tuple Type: Tuple 1 scalar, 8 bit
|
||||
Exception class: EVEX, exception type: E4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -128,11 +128,11 @@
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 8, RawSize: 8, Encoding: A, RegType: Mask, RegSize: 8, RegId: 0, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 2, RegCount: 1
|
||||
|
||||
000000000000002C 62a27d286344db40 VPCOMPRESSB ymmword ptr [rbx+r11*8+0x100], ymm16
|
||||
000000000000002C 62a27d286344db40 VPCOMPRESSB ymmword ptr [rbx+r11*8+0x40], ymm16
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVX512VBMI2, Ins cat: AVX512VBMI, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 6
|
||||
EVEX Tuple Type: Tuple 1 Scalar
|
||||
EVEX Tuple Type: Tuple 1 scalar, 8 bit
|
||||
Exception class: EVEX, exception type: E4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -147,11 +147,11 @@
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 8, RawSize: 8, Encoding: A, RegType: Mask, RegSize: 8, RegId: 0, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Register, Size: 32, RawSize: 32, Encoding: R, RegType: Vector, RegSize: 32, RegId: 16, RegCount: 1
|
||||
|
||||
0000000000000034 62227d486344db40 VPCOMPRESSB zmmword ptr [rbx+r11*8+0x100], zmm24
|
||||
0000000000000034 62227d486344db40 VPCOMPRESSB zmmword ptr [rbx+r11*8+0x40], zmm24
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 512
|
||||
ISA Set: AVX512VBMI2, Ins cat: AVX512VBMI, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 6
|
||||
EVEX Tuple Type: Tuple 1 Scalar
|
||||
EVEX Tuple Type: Tuple 1 scalar, 8 bit
|
||||
Exception class: EVEX, exception type: E4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -166,11 +166,11 @@
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 8, RawSize: 8, Encoding: A, RegType: Mask, RegSize: 8, RegId: 0, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Register, Size: 64, RawSize: 64, Encoding: R, RegType: Vector, RegSize: 64, RegId: 24, RegCount: 1
|
||||
|
||||
000000000000003C 62b27d086354dbc0 VPCOMPRESSB xmmword ptr [rbx+r11*8-0x100], xmm2
|
||||
000000000000003C 62b27d086354dbc0 VPCOMPRESSB xmmword ptr [rbx+r11*8-0x40], xmm2
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512VBMI2, Ins cat: AVX512VBMI, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 6
|
||||
EVEX Tuple Type: Tuple 1 Scalar
|
||||
EVEX Tuple Type: Tuple 1 scalar, 8 bit
|
||||
Exception class: EVEX, exception type: E4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -185,11 +185,11 @@
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 8, RawSize: 8, Encoding: A, RegType: Mask, RegSize: 8, RegId: 0, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 2, RegCount: 1
|
||||
|
||||
0000000000000044 62a27d286344dbc0 VPCOMPRESSB ymmword ptr [rbx+r11*8-0x100], ymm16
|
||||
0000000000000044 62a27d286344dbc0 VPCOMPRESSB ymmword ptr [rbx+r11*8-0x40], ymm16
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVX512VBMI2, Ins cat: AVX512VBMI, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 6
|
||||
EVEX Tuple Type: Tuple 1 Scalar
|
||||
EVEX Tuple Type: Tuple 1 scalar, 8 bit
|
||||
Exception class: EVEX, exception type: E4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -204,11 +204,11 @@
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 8, RawSize: 8, Encoding: A, RegType: Mask, RegSize: 8, RegId: 0, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Register, Size: 32, RawSize: 32, Encoding: R, RegType: Vector, RegSize: 32, RegId: 16, RegCount: 1
|
||||
|
||||
000000000000004C 62227d486344dbc0 VPCOMPRESSB zmmword ptr [rbx+r11*8-0x100], zmm24
|
||||
000000000000004C 62227d486344dbc0 VPCOMPRESSB zmmword ptr [rbx+r11*8-0x40], zmm24
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 512
|
||||
ISA Set: AVX512VBMI2, Ins cat: AVX512VBMI, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 6
|
||||
EVEX Tuple Type: Tuple 1 Scalar
|
||||
EVEX Tuple Type: Tuple 1 scalar, 8 bit
|
||||
Exception class: EVEX, exception type: E4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -227,7 +227,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512VBMI2, Ins cat: AVX512VBMI, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 6
|
||||
EVEX Tuple Type: Tuple 1 Scalar
|
||||
EVEX Tuple Type: Tuple 1 scalar, 16 bit
|
||||
Exception class: EVEX, exception type: E4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -245,7 +245,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVX512VBMI2, Ins cat: AVX512VBMI, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 6
|
||||
EVEX Tuple Type: Tuple 1 Scalar
|
||||
EVEX Tuple Type: Tuple 1 scalar, 16 bit
|
||||
Exception class: EVEX, exception type: E4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -263,7 +263,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 512
|
||||
ISA Set: AVX512VBMI2, Ins cat: AVX512VBMI, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 6
|
||||
EVEX Tuple Type: Tuple 1 Scalar
|
||||
EVEX Tuple Type: Tuple 1 scalar, 16 bit
|
||||
Exception class: EVEX, exception type: E4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -281,7 +281,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512VBMI2, Ins cat: AVX512VBMI, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 6
|
||||
EVEX Tuple Type: Tuple 1 Scalar
|
||||
EVEX Tuple Type: Tuple 1 scalar, 16 bit
|
||||
Exception class: EVEX, exception type: E4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -300,7 +300,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVX512VBMI2, Ins cat: AVX512VBMI, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 6
|
||||
EVEX Tuple Type: Tuple 1 Scalar
|
||||
EVEX Tuple Type: Tuple 1 scalar, 16 bit
|
||||
Exception class: EVEX, exception type: E4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -319,7 +319,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 512
|
||||
ISA Set: AVX512VBMI2, Ins cat: AVX512VBMI, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 6
|
||||
EVEX Tuple Type: Tuple 1 Scalar
|
||||
EVEX Tuple Type: Tuple 1 scalar, 16 bit
|
||||
Exception class: EVEX, exception type: E4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -334,11 +334,11 @@
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 8, RawSize: 8, Encoding: A, RegType: Mask, RegSize: 8, RegId: 0, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Register, Size: 64, RawSize: 64, Encoding: R, RegType: Vector, RegSize: 64, RegId: 24, RegCount: 1
|
||||
|
||||
0000000000000078 62b2fd086354db20 VPCOMPRESSW xmmword ptr [rbx+r11*8+0x100], xmm2
|
||||
0000000000000078 62b2fd086354db20 VPCOMPRESSW xmmword ptr [rbx+r11*8+0x40], xmm2
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512VBMI2, Ins cat: AVX512VBMI, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 6
|
||||
EVEX Tuple Type: Tuple 1 Scalar
|
||||
EVEX Tuple Type: Tuple 1 scalar, 16 bit
|
||||
Exception class: EVEX, exception type: E4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -353,11 +353,11 @@
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 8, RawSize: 8, Encoding: A, RegType: Mask, RegSize: 8, RegId: 0, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 2, RegCount: 1
|
||||
|
||||
0000000000000080 62a2fd286344db20 VPCOMPRESSW ymmword ptr [rbx+r11*8+0x100], ymm16
|
||||
0000000000000080 62a2fd286344db20 VPCOMPRESSW ymmword ptr [rbx+r11*8+0x40], ymm16
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVX512VBMI2, Ins cat: AVX512VBMI, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 6
|
||||
EVEX Tuple Type: Tuple 1 Scalar
|
||||
EVEX Tuple Type: Tuple 1 scalar, 16 bit
|
||||
Exception class: EVEX, exception type: E4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -372,11 +372,11 @@
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 8, RawSize: 8, Encoding: A, RegType: Mask, RegSize: 8, RegId: 0, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Register, Size: 32, RawSize: 32, Encoding: R, RegType: Vector, RegSize: 32, RegId: 16, RegCount: 1
|
||||
|
||||
0000000000000088 6222fd486344db20 VPCOMPRESSW zmmword ptr [rbx+r11*8+0x100], zmm24
|
||||
0000000000000088 6222fd486344db20 VPCOMPRESSW zmmword ptr [rbx+r11*8+0x40], zmm24
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 512
|
||||
ISA Set: AVX512VBMI2, Ins cat: AVX512VBMI, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 6
|
||||
EVEX Tuple Type: Tuple 1 Scalar
|
||||
EVEX Tuple Type: Tuple 1 scalar, 16 bit
|
||||
Exception class: EVEX, exception type: E4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -391,11 +391,11 @@
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 8, RawSize: 8, Encoding: A, RegType: Mask, RegSize: 8, RegId: 0, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Register, Size: 64, RawSize: 64, Encoding: R, RegType: Vector, RegSize: 64, RegId: 24, RegCount: 1
|
||||
|
||||
0000000000000090 62b2fd086354dbe0 VPCOMPRESSW xmmword ptr [rbx+r11*8-0x100], xmm2
|
||||
0000000000000090 62b2fd086354dbe0 VPCOMPRESSW xmmword ptr [rbx+r11*8-0x40], xmm2
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512VBMI2, Ins cat: AVX512VBMI, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 6
|
||||
EVEX Tuple Type: Tuple 1 Scalar
|
||||
EVEX Tuple Type: Tuple 1 scalar, 16 bit
|
||||
Exception class: EVEX, exception type: E4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -410,11 +410,11 @@
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 8, RawSize: 8, Encoding: A, RegType: Mask, RegSize: 8, RegId: 0, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 2, RegCount: 1
|
||||
|
||||
0000000000000098 62a2fd286344dbe0 VPCOMPRESSW ymmword ptr [rbx+r11*8-0x100], ymm16
|
||||
0000000000000098 62a2fd286344dbe0 VPCOMPRESSW ymmword ptr [rbx+r11*8-0x40], ymm16
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVX512VBMI2, Ins cat: AVX512VBMI, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 6
|
||||
EVEX Tuple Type: Tuple 1 Scalar
|
||||
EVEX Tuple Type: Tuple 1 scalar, 16 bit
|
||||
Exception class: EVEX, exception type: E4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -429,11 +429,11 @@
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 8, RawSize: 8, Encoding: A, RegType: Mask, RegSize: 8, RegId: 0, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Register, Size: 32, RawSize: 32, Encoding: R, RegType: Vector, RegSize: 32, RegId: 16, RegCount: 1
|
||||
|
||||
00000000000000A0 6222fd486344dbe0 VPCOMPRESSW zmmword ptr [rbx+r11*8-0x100], zmm24
|
||||
00000000000000A0 6222fd486344dbe0 VPCOMPRESSW zmmword ptr [rbx+r11*8-0x40], zmm24
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 512
|
||||
ISA Set: AVX512VBMI2, Ins cat: AVX512VBMI, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 6
|
||||
EVEX Tuple Type: Tuple 1 Scalar
|
||||
EVEX Tuple Type: Tuple 1 scalar, 16 bit
|
||||
Exception class: EVEX, exception type: E4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -3440,7 +3440,7 @@
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512VBMI2, Ins cat: AVX512VBMI, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 6
|
||||
EVEX Tuple Type: Tuple 1 Scalar
|
||||
EVEX Tuple Type: Tuple 1 scalar, 8 bit
|
||||
Exception class: EVEX, exception type: E4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -3458,7 +3458,7 @@
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512VBMI2, Ins cat: AVX512VBMI, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 6
|
||||
EVEX Tuple Type: Tuple 1 Scalar
|
||||
EVEX Tuple Type: Tuple 1 scalar, 8 bit
|
||||
Exception class: EVEX, exception type: E4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -3477,7 +3477,7 @@
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512VBMI2, Ins cat: AVX512VBMI, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 6
|
||||
EVEX Tuple Type: Tuple 1 Scalar
|
||||
EVEX Tuple Type: Tuple 1 scalar, 8 bit
|
||||
Exception class: EVEX, exception type: E4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -3496,7 +3496,7 @@
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512VBMI2, Ins cat: AVX512VBMI, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 6
|
||||
EVEX Tuple Type: Tuple 1 Scalar
|
||||
EVEX Tuple Type: Tuple 1 scalar, 8 bit
|
||||
Exception class: EVEX, exception type: E4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -3516,7 +3516,7 @@
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVX512VBMI2, Ins cat: AVX512VBMI, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 6
|
||||
EVEX Tuple Type: Tuple 1 Scalar
|
||||
EVEX Tuple Type: Tuple 1 scalar, 8 bit
|
||||
Exception class: EVEX, exception type: E4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -3534,7 +3534,7 @@
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVX512VBMI2, Ins cat: AVX512VBMI, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 6
|
||||
EVEX Tuple Type: Tuple 1 Scalar
|
||||
EVEX Tuple Type: Tuple 1 scalar, 8 bit
|
||||
Exception class: EVEX, exception type: E4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -3553,7 +3553,7 @@
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVX512VBMI2, Ins cat: AVX512VBMI, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 6
|
||||
EVEX Tuple Type: Tuple 1 Scalar
|
||||
EVEX Tuple Type: Tuple 1 scalar, 8 bit
|
||||
Exception class: EVEX, exception type: E4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -3572,7 +3572,7 @@
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVX512VBMI2, Ins cat: AVX512VBMI, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 6
|
||||
EVEX Tuple Type: Tuple 1 Scalar
|
||||
EVEX Tuple Type: Tuple 1 scalar, 8 bit
|
||||
Exception class: EVEX, exception type: E4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -3592,7 +3592,7 @@
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 512
|
||||
ISA Set: AVX512VBMI2, Ins cat: AVX512VBMI, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 6
|
||||
EVEX Tuple Type: Tuple 1 Scalar
|
||||
EVEX Tuple Type: Tuple 1 scalar, 8 bit
|
||||
Exception class: EVEX, exception type: E4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -3610,7 +3610,7 @@
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 512
|
||||
ISA Set: AVX512VBMI2, Ins cat: AVX512VBMI, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 6
|
||||
EVEX Tuple Type: Tuple 1 Scalar
|
||||
EVEX Tuple Type: Tuple 1 scalar, 8 bit
|
||||
Exception class: EVEX, exception type: E4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -3629,7 +3629,7 @@
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 512
|
||||
ISA Set: AVX512VBMI2, Ins cat: AVX512VBMI, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 6
|
||||
EVEX Tuple Type: Tuple 1 Scalar
|
||||
EVEX Tuple Type: Tuple 1 scalar, 8 bit
|
||||
Exception class: EVEX, exception type: E4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -3648,7 +3648,7 @@
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 512
|
||||
ISA Set: AVX512VBMI2, Ins cat: AVX512VBMI, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 6
|
||||
EVEX Tuple Type: Tuple 1 Scalar
|
||||
EVEX Tuple Type: Tuple 1 scalar, 8 bit
|
||||
Exception class: EVEX, exception type: E4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -3668,7 +3668,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512VBMI2, Ins cat: AVX512VBMI, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 6
|
||||
EVEX Tuple Type: Tuple 1 Scalar
|
||||
EVEX Tuple Type: Tuple 1 scalar, 16 bit
|
||||
Exception class: EVEX, exception type: E4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -3686,7 +3686,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512VBMI2, Ins cat: AVX512VBMI, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 6
|
||||
EVEX Tuple Type: Tuple 1 Scalar
|
||||
EVEX Tuple Type: Tuple 1 scalar, 16 bit
|
||||
Exception class: EVEX, exception type: E4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -3705,7 +3705,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512VBMI2, Ins cat: AVX512VBMI, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 6
|
||||
EVEX Tuple Type: Tuple 1 Scalar
|
||||
EVEX Tuple Type: Tuple 1 scalar, 16 bit
|
||||
Exception class: EVEX, exception type: E4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -3724,7 +3724,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512VBMI2, Ins cat: AVX512VBMI, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 6
|
||||
EVEX Tuple Type: Tuple 1 Scalar
|
||||
EVEX Tuple Type: Tuple 1 scalar, 16 bit
|
||||
Exception class: EVEX, exception type: E4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -3744,7 +3744,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVX512VBMI2, Ins cat: AVX512VBMI, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 6
|
||||
EVEX Tuple Type: Tuple 1 Scalar
|
||||
EVEX Tuple Type: Tuple 1 scalar, 16 bit
|
||||
Exception class: EVEX, exception type: E4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -3762,7 +3762,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVX512VBMI2, Ins cat: AVX512VBMI, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 6
|
||||
EVEX Tuple Type: Tuple 1 Scalar
|
||||
EVEX Tuple Type: Tuple 1 scalar, 16 bit
|
||||
Exception class: EVEX, exception type: E4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -3781,7 +3781,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVX512VBMI2, Ins cat: AVX512VBMI, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 6
|
||||
EVEX Tuple Type: Tuple 1 Scalar
|
||||
EVEX Tuple Type: Tuple 1 scalar, 16 bit
|
||||
Exception class: EVEX, exception type: E4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -3800,7 +3800,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 256
|
||||
ISA Set: AVX512VBMI2, Ins cat: AVX512VBMI, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 6
|
||||
EVEX Tuple Type: Tuple 1 Scalar
|
||||
EVEX Tuple Type: Tuple 1 scalar, 16 bit
|
||||
Exception class: EVEX, exception type: E4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -3820,7 +3820,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 512
|
||||
ISA Set: AVX512VBMI2, Ins cat: AVX512VBMI, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 6
|
||||
EVEX Tuple Type: Tuple 1 Scalar
|
||||
EVEX Tuple Type: Tuple 1 scalar, 16 bit
|
||||
Exception class: EVEX, exception type: E4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -3838,7 +3838,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 512
|
||||
ISA Set: AVX512VBMI2, Ins cat: AVX512VBMI, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 6
|
||||
EVEX Tuple Type: Tuple 1 Scalar
|
||||
EVEX Tuple Type: Tuple 1 scalar, 16 bit
|
||||
Exception class: EVEX, exception type: E4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -3857,7 +3857,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 512
|
||||
ISA Set: AVX512VBMI2, Ins cat: AVX512VBMI, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 6
|
||||
EVEX Tuple Type: Tuple 1 Scalar
|
||||
EVEX Tuple Type: Tuple 1 scalar, 16 bit
|
||||
Exception class: EVEX, exception type: E4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
@ -3876,7 +3876,7 @@
|
||||
DSIZE: 64, ASIZE: 64, VLEN: 512
|
||||
ISA Set: AVX512VBMI2, Ins cat: AVX512VBMI, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 6
|
||||
EVEX Tuple Type: Tuple 1 Scalar
|
||||
EVEX Tuple Type: Tuple 1 scalar, 16 bit
|
||||
Exception class: EVEX, exception type: E4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
|
||||
@ -473,7 +473,7 @@
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 8, RawSize: 8, Encoding: R, RegType: General Purpose, RegSize: 8, RegId: 0, RegCount: 1
|
||||
Operand: 2, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: Flags, RegSize: 8, RegId: 0, RegCount: 1
|
||||
|
||||
0000000000000054 480500000010 ADD rax, 0x10000000
|
||||
0000000000000054 480500000010 ADD rax, 0x0000000010000000
|
||||
DSIZE: 64, ASIZE: 64, VLEN: -
|
||||
ISA Set: I86, Ins cat: ARITH, CET tracked: no
|
||||
FLAGS access
|
||||
@ -965,7 +965,7 @@
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 8, RawSize: 8, Encoding: R, RegType: General Purpose, RegSize: 8, RegId: 0, RegCount: 1
|
||||
Operand: 2, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: Flags, RegSize: 8, RegId: 0, RegCount: 1
|
||||
|
||||
00000000000000AE 482d00000010 SUB rax, 0x10000000
|
||||
00000000000000AE 482d00000010 SUB rax, 0x0000000010000000
|
||||
DSIZE: 64, ASIZE: 64, VLEN: -
|
||||
ISA Set: I86, Ins cat: ARITH, CET tracked: no
|
||||
FLAGS access
|
||||
@ -1457,7 +1457,7 @@
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 8, RawSize: 8, Encoding: R, RegType: General Purpose, RegSize: 8, RegId: 0, RegCount: 1
|
||||
Operand: 2, Acc: RW, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: Flags, RegSize: 8, RegId: 0, RegCount: 1
|
||||
|
||||
0000000000000108 481500000010 ADC rax, 0x10000000
|
||||
0000000000000108 481500000010 ADC rax, 0x0000000010000000
|
||||
DSIZE: 64, ASIZE: 64, VLEN: -
|
||||
ISA Set: I86, Ins cat: ARITH, CET tracked: no
|
||||
FLAGS access
|
||||
@ -1949,7 +1949,7 @@
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 8, RawSize: 8, Encoding: R, RegType: General Purpose, RegSize: 8, RegId: 0, RegCount: 1
|
||||
Operand: 2, Acc: RW, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: Flags, RegSize: 8, RegId: 0, RegCount: 1
|
||||
|
||||
0000000000000162 481d00000010 SBB rax, 0x10000000
|
||||
0000000000000162 481d00000010 SBB rax, 0x0000000010000000
|
||||
DSIZE: 64, ASIZE: 64, VLEN: -
|
||||
ISA Set: I86, Ins cat: ARITH, CET tracked: no
|
||||
FLAGS access
|
||||
@ -2441,7 +2441,7 @@
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 8, RawSize: 8, Encoding: R, RegType: General Purpose, RegSize: 8, RegId: 0, RegCount: 1
|
||||
Operand: 2, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: Flags, RegSize: 8, RegId: 0, RegCount: 1
|
||||
|
||||
00000000000001BC 482500000010 AND rax, 0x10000000
|
||||
00000000000001BC 482500000010 AND rax, 0x0000000010000000
|
||||
DSIZE: 64, ASIZE: 64, VLEN: -
|
||||
ISA Set: I86, Ins cat: LOGIC, CET tracked: no
|
||||
FLAGS access
|
||||
@ -2933,7 +2933,7 @@
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 8, RawSize: 8, Encoding: R, RegType: General Purpose, RegSize: 8, RegId: 0, RegCount: 1
|
||||
Operand: 2, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: Flags, RegSize: 8, RegId: 0, RegCount: 1
|
||||
|
||||
0000000000000216 480d00000010 OR rax, 0x10000000
|
||||
0000000000000216 480d00000010 OR rax, 0x0000000010000000
|
||||
DSIZE: 64, ASIZE: 64, VLEN: -
|
||||
ISA Set: I86, Ins cat: LOGIC, CET tracked: no
|
||||
FLAGS access
|
||||
@ -3425,7 +3425,7 @@
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 8, RawSize: 8, Encoding: R, RegType: General Purpose, RegSize: 8, RegId: 0, RegCount: 1
|
||||
Operand: 2, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: Flags, RegSize: 8, RegId: 0, RegCount: 1
|
||||
|
||||
0000000000000270 483500000010 XOR rax, 0x10000000
|
||||
0000000000000270 483500000010 XOR rax, 0x0000000010000000
|
||||
DSIZE: 64, ASIZE: 64, VLEN: -
|
||||
ISA Set: I86, Ins cat: LOGIC, CET tracked: no
|
||||
FLAGS access
|
||||
@ -3917,7 +3917,7 @@
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 8, RawSize: 8, Encoding: R, RegType: General Purpose, RegSize: 8, RegId: 0, RegCount: 1
|
||||
Operand: 2, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: Flags, RegSize: 8, RegId: 0, RegCount: 1
|
||||
|
||||
00000000000002CA 483d00000010 CMP rax, 0x10000000
|
||||
00000000000002CA 483d00000010 CMP rax, 0x0000000010000000
|
||||
DSIZE: 64, ASIZE: 64, VLEN: -
|
||||
ISA Set: I86, Ins cat: ARITH, CET tracked: no
|
||||
FLAGS access
|
||||
@ -3951,7 +3951,7 @@
|
||||
Operand: 1, Acc: R-, Type: Immediate, Size: 4, RawSize: 4, Encoding: I
|
||||
Operand: 2, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: Flags, RegSize: 4, RegId: 0, RegCount: 1
|
||||
|
||||
00000000000002D5 48a901000000 TEST rax, 0x00000001
|
||||
00000000000002D5 48a901000000 TEST rax, 0x0000000000000001
|
||||
DSIZE: 64, ASIZE: 64, VLEN: -
|
||||
ISA Set: I86, Ins cat: LOGIC, CET tracked: no
|
||||
FLAGS access
|
||||
@ -4056,7 +4056,7 @@
|
||||
Operand: 1, Acc: R-, Type: Immediate, Size: 4, RawSize: 4, Encoding: I
|
||||
Operand: 2, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: Flags, RegSize: 4, RegId: 0, RegCount: 1
|
||||
|
||||
00000000000002EF 48f70301000000 TEST qword ptr [rbx], 0x00000001
|
||||
00000000000002EF 48f70301000000 TEST qword ptr [rbx], 0x0000000000000001
|
||||
DSIZE: 64, ASIZE: 64, VLEN: -
|
||||
ISA Set: I86, Ins cat: LOGIC, CET tracked: no
|
||||
FLAGS access
|
||||
@ -8157,7 +8157,7 @@
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 1, RawSize: 1, Encoding: S, RegType: General Purpose, RegSize: 1, RegId: 1, RegCount: 1
|
||||
Operand: 2, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: Flags, RegSize: 8, RegId: 0, RegCount: 1
|
||||
|
||||
00000000000005C8 666bc164 IMUL ax, cx, 0x64
|
||||
00000000000005C8 666bc164 IMUL ax, cx, 0x0064
|
||||
DSIZE: 16, ASIZE: 64, VLEN: -
|
||||
ISA Set: I86, Ins cat: ARITH, CET tracked: no
|
||||
FLAGS access
|
||||
@ -8175,7 +8175,7 @@
|
||||
Operand: 2, Acc: R-, Type: Immediate, Size: 2, RawSize: 1, Encoding: I
|
||||
Operand: 3, Acc: -W, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: Flags, RegSize: 2, RegId: 0, RegCount: 1
|
||||
|
||||
00000000000005CC 666b0364 IMUL ax, word ptr [rbx], 0x64
|
||||
00000000000005CC 666b0364 IMUL ax, word ptr [rbx], 0x0064
|
||||
DSIZE: 16, ASIZE: 64, VLEN: -
|
||||
ISA Set: I86, Ins cat: ARITH, CET tracked: no
|
||||
FLAGS access
|
||||
@ -8194,7 +8194,7 @@
|
||||
Operand: 2, Acc: R-, Type: Immediate, Size: 2, RawSize: 1, Encoding: I
|
||||
Operand: 3, Acc: -W, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: Flags, RegSize: 2, RegId: 0, RegCount: 1
|
||||
|
||||
00000000000005D0 6bc164 IMUL eax, ecx, 0x64
|
||||
00000000000005D0 6bc164 IMUL eax, ecx, 0x00000064
|
||||
DSIZE: 32, ASIZE: 64, VLEN: -
|
||||
ISA Set: I86, Ins cat: ARITH, CET tracked: no
|
||||
FLAGS access
|
||||
@ -8212,7 +8212,7 @@
|
||||
Operand: 2, Acc: R-, Type: Immediate, Size: 4, RawSize: 1, Encoding: I
|
||||
Operand: 3, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: Flags, RegSize: 4, RegId: 0, RegCount: 1
|
||||
|
||||
00000000000005D3 6b0364 IMUL eax, dword ptr [rbx], 0x64
|
||||
00000000000005D3 6b0364 IMUL eax, dword ptr [rbx], 0x00000064
|
||||
DSIZE: 32, ASIZE: 64, VLEN: -
|
||||
ISA Set: I86, Ins cat: ARITH, CET tracked: no
|
||||
FLAGS access
|
||||
@ -8231,7 +8231,7 @@
|
||||
Operand: 2, Acc: R-, Type: Immediate, Size: 4, RawSize: 1, Encoding: I
|
||||
Operand: 3, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: Flags, RegSize: 4, RegId: 0, RegCount: 1
|
||||
|
||||
00000000000005D6 486bc164 IMUL rax, rcx, 0x64
|
||||
00000000000005D6 486bc164 IMUL rax, rcx, 0x0000000000000064
|
||||
DSIZE: 64, ASIZE: 64, VLEN: -
|
||||
ISA Set: I86, Ins cat: ARITH, CET tracked: no
|
||||
FLAGS access
|
||||
@ -8249,7 +8249,7 @@
|
||||
Operand: 2, Acc: R-, Type: Immediate, Size: 8, RawSize: 1, Encoding: I
|
||||
Operand: 3, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: Flags, RegSize: 8, RegId: 0, RegCount: 1
|
||||
|
||||
00000000000005DA 486b0364 IMUL rax, qword ptr [rbx], 0x64
|
||||
00000000000005DA 486b0364 IMUL rax, qword ptr [rbx], 0x0000000000000064
|
||||
DSIZE: 64, ASIZE: 64, VLEN: -
|
||||
ISA Set: I86, Ins cat: ARITH, CET tracked: no
|
||||
FLAGS access
|
||||
@ -8935,7 +8935,7 @@
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: General Purpose, RegSize: 2, RegId: 0, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: Flags, RegSize: 2, RegId: 0, RegCount: 1
|
||||
|
||||
0000000000000615 f04883870010000001 LOCK ADD qword ptr [rdi+0x1000], 0x01
|
||||
0000000000000615 f04883870010000001 LOCK ADD qword ptr [rdi+0x1000], 0x0000000000000001
|
||||
DSIZE: 64, ASIZE: 64, VLEN: -
|
||||
ISA Set: I86, Ins cat: ARITH, CET tracked: no
|
||||
FLAGS access
|
||||
@ -8953,7 +8953,7 @@
|
||||
Operand: 1, Acc: R-, Type: Immediate, Size: 8, RawSize: 1, Encoding: I
|
||||
Operand: 2, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: Flags, RegSize: 8, RegId: 0, RegCount: 1
|
||||
|
||||
000000000000061E f2f0830001 XACQUIRE LOCK ADD dword ptr [rax], 0x01
|
||||
000000000000061E f2f0830001 XACQUIRE LOCK ADD dword ptr [rax], 0x00000001
|
||||
DSIZE: 32, ASIZE: 64, VLEN: -
|
||||
ISA Set: I86, Ins cat: ARITH, CET tracked: no
|
||||
FLAGS access
|
||||
@ -8971,7 +8971,7 @@
|
||||
Operand: 1, Acc: R-, Type: Immediate, Size: 4, RawSize: 1, Encoding: I
|
||||
Operand: 2, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: Flags, RegSize: 4, RegId: 0, RegCount: 1
|
||||
|
||||
0000000000000623 f3f04883acfe00f0ffff02 XRELEASE LOCK SUB qword ptr [rsi+rdi*8-0x1000], 0x02
|
||||
0000000000000623 f3f04883acfe00f0ffff02 XRELEASE LOCK SUB qword ptr [rsi+rdi*8-0x1000], 0x0000000000000002
|
||||
DSIZE: 64, ASIZE: 64, VLEN: -
|
||||
ISA Set: I86, Ins cat: ARITH, CET tracked: no
|
||||
FLAGS access
|
||||
|
||||
@ -655,7 +655,7 @@
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: yes, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: R-, Type: Immediate, Size: 4, RawSize: 2, Encoding: I
|
||||
Operand: 0, Acc: R-, Type: Immediate, Size: 2, RawSize: 2, Encoding: I
|
||||
Operand: 1, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: IP, RegSize: 4, RegId: 0, RegCount: 1
|
||||
Operand: 2, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: General Purpose, RegSize: 4, RegId: 4, RegCount: 1
|
||||
Operand: 3, Acc: R-, Type: Memory, Size: 4, RawSize: 4, Encoding: S, Stack: yes,
|
||||
@ -692,7 +692,7 @@
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: R-, Type: Immediate, Size: 4, RawSize: 2, Encoding: I
|
||||
Operand: 0, Acc: R-, Type: Immediate, Size: 2, RawSize: 2, Encoding: I
|
||||
Operand: 1, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: Segment, RegSize: 4, RegId: 1, RegCount: 1
|
||||
Operand: 2, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: IP, RegSize: 4, RegId: 0, RegCount: 1
|
||||
Operand: 3, Acc: R-, Type: Memory, Size: 8, RawSize: 8, Encoding: S, Stack: yes,
|
||||
|
||||
@ -447,7 +447,7 @@
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: yes, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: R-, Type: Immediate, Size: 8, RawSize: 2, Encoding: I
|
||||
Operand: 0, Acc: R-, Type: Immediate, Size: 2, RawSize: 2, Encoding: I
|
||||
Operand: 1, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: IP, RegSize: 8, RegId: 0, RegCount: 1
|
||||
Operand: 2, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: General Purpose, RegSize: 8, RegId: 4, RegCount: 1
|
||||
Operand: 3, Acc: R-, Type: Memory, Size: 8, RawSize: 8, Encoding: S, Stack: yes,
|
||||
@ -484,7 +484,7 @@
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: R-, Type: Immediate, Size: 4, RawSize: 2, Encoding: I
|
||||
Operand: 0, Acc: R-, Type: Immediate, Size: 2, RawSize: 2, Encoding: I
|
||||
Operand: 1, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: Segment, RegSize: 4, RegId: 1, RegCount: 1
|
||||
Operand: 2, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: IP, RegSize: 4, RegId: 0, RegCount: 1
|
||||
Operand: 3, Acc: R-, Type: Memory, Size: 8, RawSize: 8, Encoding: S, Stack: yes,
|
||||
@ -542,8 +542,8 @@
|
||||
Entire register
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: no, V8086: no, Prot: no, Compat: no, Long: yes
|
||||
SMM: no, SGX: no, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
|
||||
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
|
||||
SMM: yes, SGX: no, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
|
||||
@ -1834,7 +1834,7 @@
|
||||
Operand: 1, Acc: RW, Type: Register, Size: 10, RawSize: 10, Encoding: M, RegType: FP, RegSize: 10, RegId: 7, RegCount: 1
|
||||
Operand: 2, Acc: -W, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: System, RegSize: 2, RegId: 2, RegCount: 1
|
||||
|
||||
00000000000000D8 ddd7 FST st0, st7
|
||||
00000000000000D8 ddd7 FST st7, st0
|
||||
DSIZE: 32, ASIZE: 64, VLEN: -
|
||||
ISA Set: X87, Ins cat: X87_ALU, CET tracked: no
|
||||
FPU flags access
|
||||
@ -1847,11 +1847,11 @@
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 10, RawSize: 10, Encoding: S, RegType: FP, RegSize: 10, RegId: 0, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 10, RawSize: 10, Encoding: M, RegType: FP, RegSize: 10, RegId: 7, RegCount: 1
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 10, RawSize: 10, Encoding: M, RegType: FP, RegSize: 10, RegId: 7, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 10, RawSize: 10, Encoding: S, RegType: FP, RegSize: 10, RegId: 0, RegCount: 1
|
||||
Operand: 2, Acc: -W, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: System, RegSize: 2, RegId: 2, RegCount: 1
|
||||
|
||||
00000000000000DA dddf FSTP st0, st7
|
||||
00000000000000DA dddf FSTP st7, st0
|
||||
DSIZE: 32, ASIZE: 64, VLEN: -
|
||||
ISA Set: X87, Ins cat: X87_ALU, CET tracked: no
|
||||
FPU flags access
|
||||
@ -1864,8 +1864,8 @@
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 10, RawSize: 10, Encoding: S, RegType: FP, RegSize: 10, RegId: 0, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 10, RawSize: 10, Encoding: M, RegType: FP, RegSize: 10, RegId: 7, RegCount: 1
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 10, RawSize: 10, Encoding: M, RegType: FP, RegSize: 10, RegId: 7, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 10, RawSize: 10, Encoding: S, RegType: FP, RegSize: 10, RegId: 0, RegCount: 1
|
||||
Operand: 2, Acc: -W, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: System, RegSize: 2, RegId: 2, RegCount: 1
|
||||
|
||||
00000000000000DC dde7 FUCOM st0, st7
|
||||
@ -2357,7 +2357,7 @@
|
||||
Operand: 1, Acc: RW, Type: Register, Size: 10, RawSize: 10, Encoding: M, RegType: FP, RegSize: 10, RegId: 7, RegCount: 1
|
||||
Operand: 2, Acc: -W, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: System, RegSize: 2, RegId: 2, RegCount: 1
|
||||
|
||||
0000000000000114 dddf FSTP st0, st7
|
||||
0000000000000114 dddf FSTP st7, st0
|
||||
DSIZE: 32, ASIZE: 64, VLEN: -
|
||||
ISA Set: X87, Ins cat: X87_ALU, CET tracked: no
|
||||
FPU flags access
|
||||
@ -2370,11 +2370,11 @@
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 10, RawSize: 10, Encoding: S, RegType: FP, RegSize: 10, RegId: 0, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 10, RawSize: 10, Encoding: M, RegType: FP, RegSize: 10, RegId: 7, RegCount: 1
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 10, RawSize: 10, Encoding: M, RegType: FP, RegSize: 10, RegId: 7, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 10, RawSize: 10, Encoding: S, RegType: FP, RegSize: 10, RegId: 0, RegCount: 1
|
||||
Operand: 2, Acc: -W, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: System, RegSize: 2, RegId: 2, RegCount: 1
|
||||
|
||||
0000000000000116 dddf FSTP st0, st7
|
||||
0000000000000116 dddf FSTP st7, st0
|
||||
DSIZE: 32, ASIZE: 64, VLEN: -
|
||||
ISA Set: X87, Ins cat: X87_ALU, CET tracked: no
|
||||
FPU flags access
|
||||
@ -2387,8 +2387,8 @@
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 10, RawSize: 10, Encoding: S, RegType: FP, RegSize: 10, RegId: 0, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 10, RawSize: 10, Encoding: M, RegType: FP, RegSize: 10, RegId: 7, RegCount: 1
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 10, RawSize: 10, Encoding: M, RegType: FP, RegSize: 10, RegId: 7, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 10, RawSize: 10, Encoding: S, RegType: FP, RegSize: 10, RegId: 0, RegCount: 1
|
||||
Operand: 2, Acc: -W, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: System, RegSize: 2, RegId: 2, RegCount: 1
|
||||
|
||||
0000000000000118 dfe0 FNSTSW ax
|
||||
|
||||
@ -58,7 +58,7 @@
|
||||
Operand: 1, Acc: R-, Type: Memory, Size: 4, RawSize: 4, Encoding: S, Stack: yes,
|
||||
Segment: 2, Base: 4,
|
||||
|
||||
0000000000000006 6a7f PUSH 0x7f
|
||||
0000000000000006 6a7f PUSH 0x007f
|
||||
DSIZE: 16, ASIZE: 16, VLEN: -
|
||||
ISA Set: I86, Ins cat: PUSH, CET tracked: no
|
||||
Valid modes
|
||||
|
||||
@ -58,7 +58,7 @@
|
||||
Operand: 1, Acc: R-, Type: Memory, Size: 4, RawSize: 4, Encoding: S, Stack: yes,
|
||||
Segment: 2, Base: 4,
|
||||
|
||||
0000000000000006 666a7f PUSH 0x7f
|
||||
0000000000000006 666a7f PUSH 0x007f
|
||||
DSIZE: 16, ASIZE: 32, VLEN: -
|
||||
ISA Set: I86, Ins cat: PUSH, CET tracked: no
|
||||
Valid modes
|
||||
@ -401,7 +401,7 @@
|
||||
Operand: 1, Acc: R-, Type: Memory, Size: 4, RawSize: 4, Encoding: S, Stack: yes,
|
||||
Segment: 2, Base: 4,
|
||||
|
||||
0000000000000039 60 PUSHA
|
||||
0000000000000039 60 PUSHAD
|
||||
DSIZE: 32, ASIZE: 32, VLEN: -
|
||||
ISA Set: I386, Ins cat: PUSH, CET tracked: no
|
||||
Valid modes
|
||||
@ -412,11 +412,11 @@
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: R-, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: General Purpose, RegSize: 4, RegId: 0, RegCount: 1
|
||||
Operand: 0, Acc: R-, Type: Bank, Size: -1, RawSize: -1, Encoding: S
|
||||
Operand: 1, Acc: -W, Type: Memory, Size: 32, RawSize: 32, Encoding: S, Stack: yes,
|
||||
Segment: 2, Base: 4,
|
||||
|
||||
000000000000003A 61 POPA
|
||||
000000000000003A 61 POPAD
|
||||
DSIZE: 32, ASIZE: 32, VLEN: -
|
||||
ISA Set: I386, Ins cat: POP, CET tracked: no
|
||||
Valid modes
|
||||
@ -427,11 +427,11 @@
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: General Purpose, RegSize: 4, RegId: 0, RegCount: 1
|
||||
Operand: 0, Acc: -W, Type: Bank, Size: -1, RawSize: -1, Encoding: S
|
||||
Operand: 1, Acc: R-, Type: Memory, Size: 32, RawSize: 32, Encoding: S, Stack: yes,
|
||||
Segment: 2, Base: 4,
|
||||
|
||||
000000000000003B 60 PUSHA
|
||||
000000000000003B 60 PUSHAD
|
||||
DSIZE: 32, ASIZE: 32, VLEN: -
|
||||
ISA Set: I386, Ins cat: PUSH, CET tracked: no
|
||||
Valid modes
|
||||
@ -442,11 +442,11 @@
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: R-, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: General Purpose, RegSize: 4, RegId: 0, RegCount: 1
|
||||
Operand: 0, Acc: R-, Type: Bank, Size: -1, RawSize: -1, Encoding: S
|
||||
Operand: 1, Acc: -W, Type: Memory, Size: 32, RawSize: 32, Encoding: S, Stack: yes,
|
||||
Segment: 2, Base: 4,
|
||||
|
||||
000000000000003C 61 POPA
|
||||
000000000000003C 61 POPAD
|
||||
DSIZE: 32, ASIZE: 32, VLEN: -
|
||||
ISA Set: I386, Ins cat: POP, CET tracked: no
|
||||
Valid modes
|
||||
@ -457,7 +457,7 @@
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: General Purpose, RegSize: 4, RegId: 0, RegCount: 1
|
||||
Operand: 0, Acc: -W, Type: Bank, Size: -1, RawSize: -1, Encoding: S
|
||||
Operand: 1, Acc: R-, Type: Memory, Size: 32, RawSize: 32, Encoding: S, Stack: yes,
|
||||
Segment: 2, Base: 4,
|
||||
|
||||
|
||||
@ -58,7 +58,7 @@
|
||||
Operand: 1, Acc: R-, Type: Memory, Size: 8, RawSize: 8, Encoding: S, Stack: yes,
|
||||
Segment: 2, Base: 4,
|
||||
|
||||
0000000000000006 666a7f PUSH 0x7f
|
||||
0000000000000006 666a7f PUSH 0x007f
|
||||
DSIZE: 16, ASIZE: 64, VLEN: -
|
||||
ISA Set: I86, Ins cat: PUSH, CET tracked: no
|
||||
Valid modes
|
||||
@ -73,7 +73,7 @@
|
||||
Operand: 1, Acc: -W, Type: Memory, Size: 2, RawSize: 2, Encoding: S, Stack: yes,
|
||||
Segment: 2, Base: 4,
|
||||
|
||||
0000000000000009 68ff7f0000 PUSH 0x00007fff
|
||||
0000000000000009 68ff7f0000 PUSH 0x0000000000007fff
|
||||
DSIZE: 64, ASIZE: 64, VLEN: -
|
||||
ISA Set: I86, Ins cat: PUSH, CET tracked: no
|
||||
Valid modes
|
||||
@ -88,7 +88,7 @@
|
||||
Operand: 1, Acc: -W, Type: Memory, Size: 8, RawSize: 8, Encoding: S, Stack: yes,
|
||||
Segment: 2, Base: 4,
|
||||
|
||||
000000000000000E 68ffffff7f PUSH 0x7fffffff
|
||||
000000000000000E 68ffffff7f PUSH 0x000000007fffffff
|
||||
DSIZE: 64, ASIZE: 64, VLEN: -
|
||||
ISA Set: I86, Ins cat: PUSH, CET tracked: no
|
||||
Valid modes
|
||||
|
||||
@ -11,7 +11,7 @@
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: R-, Type: Offset, Size: 4, RawSize: 4, Encoding: D
|
||||
Operand: 1, Acc: RW, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: IP, RegSize: 4, RegId: 0, RegCount: 1
|
||||
Operand: 1, Acc: RW, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: IP, RegSize: 8, RegId: 0, RegCount: 1
|
||||
Operand: 2, Acc: --, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: General Purpose, RegSize: 4, RegId: 0, RegCount: 1
|
||||
|
||||
0000000000000006 0f01d6 XTEST
|
||||
|
||||
@ -1905,7 +1905,7 @@
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 7, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: M, RegType: Vector, RegSize: 16, RegId: 13, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 8, RawSize: 8, Encoding: M, RegType: Vector, RegSize: 16, RegId: 13, RegCount: 1
|
||||
|
||||
0000000000000246 f2410fe6fd CVTPD2DQ xmm7, xmm13
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
@ -4275,7 +4275,7 @@
|
||||
Operand: 1, Acc: R-, Type: Memory, Size: 16, RawSize: 16, Encoding: M,
|
||||
Segment: 3, Base: 3,
|
||||
|
||||
00000000000004A7 f30fe63b CVTDQ2PD xmm7, xmmword ptr [rbx]
|
||||
00000000000004A7 f30fe63b CVTDQ2PD xmm7, qword ptr [rbx]
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
ISA Set: SSE2, Ins cat: CONVERT, CET tracked: no
|
||||
CPUID leaf: 0x00000001, reg: edx, bit: 26
|
||||
@ -4289,7 +4289,7 @@
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 7, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Memory, Size: 16, RawSize: 16, Encoding: M,
|
||||
Operand: 1, Acc: R-, Type: Memory, Size: 8, RawSize: 8, Encoding: M,
|
||||
Segment: 3, Base: 3,
|
||||
|
||||
00000000000004AB f20fe63b CVTPD2DQ xmm7, xmmword ptr [rbx]
|
||||
|
||||
@ -112,18 +112,30 @@
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
|
||||
000000000000000B 0f05 LOADALL
|
||||
000000000000000B 0f05 SYSCALL
|
||||
DSIZE: 32, ASIZE: 32, VLEN: -
|
||||
ISA Set: I486REAL, Ins cat: UNDOC, CET tracked: no
|
||||
ISA Set: AMD, Ins cat: SYSCALL, CET tracked: no
|
||||
CPUID leaf: 0x80000001, reg: ecx, bit: 11
|
||||
FLAGS access
|
||||
Entire register
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
|
||||
SMM: yes, SGX: yes, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
|
||||
SMM: yes, SGX: no, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: R-, Type: Bank, Size: -1, RawSize: -1, Encoding: S
|
||||
Operand: 0, Acc: R-, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: Model Specific, RegSize: 8, RegId: -1073741695, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: Model Specific, RegSize: 8, RegId: -1073741694, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: Model Specific, RegSize: 8, RegId: -1073741692, RegCount: 1
|
||||
Operand: 3, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: Segment, RegSize: 4, RegId: 2, RegCount: 1
|
||||
Operand: 4, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: General Purpose, RegSize: 8, RegId: 1, RegCount: 1
|
||||
Operand: 5, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: General Purpose, RegSize: 8, RegId: 11, RegCount: 1
|
||||
Operand: 6, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: Segment, RegSize: 4, RegId: 1, RegCount: 1
|
||||
Operand: 7, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: IP, RegSize: 4, RegId: 0, RegCount: 1
|
||||
Operand: 8, Acc: RW, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: Flags, RegSize: 4, RegId: 0, RegCount: 1
|
||||
Operand: 9, Acc: RW, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: SSP, RegSize: 4, RegId: 0, RegCount: 1
|
||||
|
||||
000000000000000D 90 NOP
|
||||
DSIZE: 32, ASIZE: 32, VLEN: -
|
||||
@ -221,18 +233,28 @@
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
|
||||
0000000000000015 0f07 LOADALLD
|
||||
0000000000000015 0f07 SYSRET
|
||||
DSIZE: 32, ASIZE: 32, VLEN: -
|
||||
ISA Set: I486REAL, Ins cat: UNDOC, CET tracked: no
|
||||
ISA Set: AMD, Ins cat: SYSRET, CET tracked: no
|
||||
CPUID leaf: 0x80000001, reg: ecx, bit: 11
|
||||
FLAGS access
|
||||
Entire register
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
R0: yes, R1: no, R2: no, R3: no
|
||||
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
|
||||
SMM: yes, SGX: yes, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
|
||||
SMM: yes, SGX: no, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: R-, Type: Bank, Size: -1, RawSize: -1, Encoding: S
|
||||
Operand: 0, Acc: R-, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: Model Specific, RegSize: 8, RegId: -1073741695, RegCount: 1
|
||||
Operand: 1, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: Segment, RegSize: 4, RegId: 2, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: General Purpose, RegSize: 4, RegId: 1, RegCount: 1
|
||||
Operand: 3, Acc: R-, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: General Purpose, RegSize: 8, RegId: 11, RegCount: 1
|
||||
Operand: 4, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: Segment, RegSize: 4, RegId: 1, RegCount: 1
|
||||
Operand: 5, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: IP, RegSize: 4, RegId: 0, RegCount: 1
|
||||
Operand: 6, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: Flags, RegSize: 4, RegId: 0, RegCount: 1
|
||||
Operand: 7, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: SSP, RegSize: 4, RegId: 0, RegCount: 1
|
||||
|
||||
0000000000000017 90 NOP
|
||||
DSIZE: 32, ASIZE: 32, VLEN: -
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
0000000000000000 f2f0654b8184f7ffffff7fbdbdbdbd XACQUIRE LOCK ADD qword ptr gs:[r15+r14*8+0x7fffffff], 0xbdbdbdbd
|
||||
0000000000000000 f2f0654b8184f7ffffff7fbdbdbdbd XACQUIRE LOCK ADD qword ptr gs:[r15+r14*8+0x7fffffff], 0xffffffffbdbdbdbd
|
||||
DSIZE: 64, ASIZE: 64, VLEN: -
|
||||
ISA Set: I86, Ins cat: ARITH, CET tracked: no
|
||||
FLAGS access
|
||||
@ -113,7 +113,7 @@
|
||||
BND: no, BHINT: no, DNT: no
|
||||
|
||||
0000000000000017 66 db 0x66 (0x80000003)
|
||||
0000000000000018 f2f0654b8184f7ffffff7fbdbdbdbd XACQUIRE LOCK ADD qword ptr gs:[r15+r14*8+0x7fffffff], 0xbdbdbdbd
|
||||
0000000000000018 f2f0654b8184f7ffffff7fbdbdbdbd XACQUIRE LOCK ADD qword ptr gs:[r15+r14*8+0x7fffffff], 0xffffffffbdbdbdbd
|
||||
DSIZE: 64, ASIZE: 64, VLEN: -
|
||||
ISA Set: I86, Ins cat: ARITH, CET tracked: no
|
||||
FLAGS access
|
||||
|
||||
@ -239,7 +239,7 @@
|
||||
Operand: 2, Acc: RW, Type: Register, Size: 1, RawSize: 1, Encoding: S, RegType: General Purpose, RegSize: 1, RegId: 4, RegCount: 1
|
||||
Operand: 3, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: Flags, RegSize: 4, RegId: 0, RegCount: 1
|
||||
|
||||
0000000000000014 60 PUSHA
|
||||
0000000000000014 60 PUSHAD
|
||||
DSIZE: 32, ASIZE: 32, VLEN: -
|
||||
ISA Set: I386, Ins cat: PUSH, CET tracked: no
|
||||
Valid modes
|
||||
@ -250,11 +250,11 @@
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: R-, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: General Purpose, RegSize: 4, RegId: 0, RegCount: 1
|
||||
Operand: 0, Acc: R-, Type: Bank, Size: -1, RawSize: -1, Encoding: S
|
||||
Operand: 1, Acc: -W, Type: Memory, Size: 32, RawSize: 32, Encoding: S, Stack: yes,
|
||||
Segment: 2, Base: 4,
|
||||
|
||||
0000000000000015 61 POPA
|
||||
0000000000000015 61 POPAD
|
||||
DSIZE: 32, ASIZE: 32, VLEN: -
|
||||
ISA Set: I386, Ins cat: POP, CET tracked: no
|
||||
Valid modes
|
||||
@ -265,7 +265,7 @@
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: General Purpose, RegSize: 4, RegId: 0, RegCount: 1
|
||||
Operand: 0, Acc: -W, Type: Bank, Size: -1, RawSize: -1, Encoding: S
|
||||
Operand: 1, Acc: R-, Type: Memory, Size: 32, RawSize: 32, Encoding: S, Stack: yes,
|
||||
Segment: 2, Base: 4,
|
||||
|
||||
|
||||
@ -62,8 +62,8 @@
|
||||
Entire register
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: no, V8086: no, Prot: no, Compat: no, Long: yes
|
||||
SMM: no, SGX: no, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
|
||||
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
|
||||
SMM: yes, SGX: no, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
@ -87,8 +87,8 @@
|
||||
Entire register
|
||||
Valid modes
|
||||
R0: yes, R1: no, R2: no, R3: no
|
||||
Real: no, V8086: no, Prot: no, Compat: no, Long: yes
|
||||
SMM: no, SGX: no, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
|
||||
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
|
||||
SMM: yes, SGX: no, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
|
||||
1
bddisasm_test/special/regressions_32
Normal file
1
bddisasm_test/special/regressions_32
Normal file
@ -0,0 +1 @@
|
||||
f``faa&<26><><EFBFBD>&&<07>f<0F><><EFBFBD><05>'Nm<4E><6D>:<10>
|
||||
19
bddisasm_test/special/regressions_32.asm
Normal file
19
bddisasm_test/special/regressions_32.asm
Normal file
@ -0,0 +1,19 @@
|
||||
bits 32
|
||||
|
||||
db 0x66
|
||||
pusha
|
||||
pushad
|
||||
db 0x66
|
||||
popa
|
||||
popad
|
||||
|
||||
db 0x26, 0x82, 0xc0, 0xe4 ; add al, 0xe4
|
||||
db 0x26, 0x0f, 0x05 ; syscall - even though SDM states it's invalid, it works in 32 bit
|
||||
db 0x26, 0x0f, 0x07 ; sysret - even though SDM states it's invalid, it works in 32 bit
|
||||
|
||||
db 0xf3, 0x66, 0x0f, 0xc7, 0xf8 ; rdpid eax - reg is 32 bit in 16/32 bit mode, 64 bit in 64 bit mode
|
||||
|
||||
db 0xf3, 0x0f, 0x1b, 0x05, 0xa4, 0x27, 0x4e, 0x6d ; bndmk bnd0, [0x6d4e27a4] - Works on 32, #UD in 64 bit mode if RIP relative.
|
||||
|
||||
db 0xc4, 0xe1, 0x3a, 0x10, 0xca ; vmovss xmm1, xmm0, xmm2 - bit 3 of vex.vvvv is ingored in 32 bit mode.
|
||||
|
||||
173
bddisasm_test/special/regressions_32.result
Normal file
173
bddisasm_test/special/regressions_32.result
Normal file
@ -0,0 +1,173 @@
|
||||
0000000000000000 6660 PUSHA
|
||||
DSIZE: 16, ASIZE: 32, VLEN: -
|
||||
ISA Set: I386, Ins cat: PUSH, CET tracked: no
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: no
|
||||
SMM: yes, SGX: yes, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: R-, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: General Purpose, RegSize: 2, RegId: 0, RegCount: 1
|
||||
Operand: 1, Acc: -W, Type: Memory, Size: 16, RawSize: 16, Encoding: S, Stack: yes,
|
||||
Segment: 2, Base: 4,
|
||||
|
||||
0000000000000002 60 PUSHAD
|
||||
DSIZE: 32, ASIZE: 32, VLEN: -
|
||||
ISA Set: I386, Ins cat: PUSH, CET tracked: no
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: no
|
||||
SMM: yes, SGX: yes, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: R-, Type: Bank, Size: -1, RawSize: -1, Encoding: S
|
||||
Operand: 1, Acc: -W, Type: Memory, Size: 32, RawSize: 32, Encoding: S, Stack: yes,
|
||||
Segment: 2, Base: 4,
|
||||
|
||||
0000000000000003 6661 POPA
|
||||
DSIZE: 16, ASIZE: 32, VLEN: -
|
||||
ISA Set: I386, Ins cat: POP, CET tracked: no
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: no
|
||||
SMM: yes, SGX: yes, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: General Purpose, RegSize: 2, RegId: 0, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Memory, Size: 16, RawSize: 16, Encoding: S, Stack: yes,
|
||||
Segment: 2, Base: 4,
|
||||
|
||||
0000000000000005 61 POPAD
|
||||
DSIZE: 32, ASIZE: 32, VLEN: -
|
||||
ISA Set: I386, Ins cat: POP, CET tracked: no
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: no
|
||||
SMM: yes, SGX: yes, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Bank, Size: -1, RawSize: -1, Encoding: S
|
||||
Operand: 1, Acc: R-, Type: Memory, Size: 32, RawSize: 32, Encoding: S, Stack: yes,
|
||||
Segment: 2, Base: 4,
|
||||
|
||||
0000000000000006 2682c0e4 ADD al, 0xe4
|
||||
DSIZE: 32, ASIZE: 32, VLEN: -
|
||||
ISA Set: I86, Ins cat: ARITH, CET tracked: no
|
||||
FLAGS access
|
||||
CF: m, PF: m, AF: m, ZF: m, SF: m, OF: m,
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: no
|
||||
SMM: yes, SGX: yes, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: yes
|
||||
HLE: yes, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: RW, Type: Register, Size: 1, RawSize: 1, Encoding: M, RegType: General Purpose, RegSize: 1, RegId: 0, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Immediate, Size: 1, RawSize: 1, Encoding: I
|
||||
Operand: 2, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: Flags, RegSize: 4, RegId: 0, RegCount: 1
|
||||
|
||||
000000000000000A 260f05 SYSCALL
|
||||
DSIZE: 32, ASIZE: 32, VLEN: -
|
||||
ISA Set: AMD, Ins cat: SYSCALL, CET tracked: no
|
||||
CPUID leaf: 0x80000001, reg: ecx, bit: 11
|
||||
FLAGS access
|
||||
Entire register
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
|
||||
SMM: yes, SGX: no, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: R-, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: Model Specific, RegSize: 8, RegId: -1073741695, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: Model Specific, RegSize: 8, RegId: -1073741694, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: Model Specific, RegSize: 8, RegId: -1073741692, RegCount: 1
|
||||
Operand: 3, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: Segment, RegSize: 4, RegId: 2, RegCount: 1
|
||||
Operand: 4, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: General Purpose, RegSize: 8, RegId: 1, RegCount: 1
|
||||
Operand: 5, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: General Purpose, RegSize: 8, RegId: 11, RegCount: 1
|
||||
Operand: 6, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: Segment, RegSize: 4, RegId: 1, RegCount: 1
|
||||
Operand: 7, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: IP, RegSize: 4, RegId: 0, RegCount: 1
|
||||
Operand: 8, Acc: RW, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: Flags, RegSize: 4, RegId: 0, RegCount: 1
|
||||
Operand: 9, Acc: RW, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: SSP, RegSize: 4, RegId: 0, RegCount: 1
|
||||
|
||||
000000000000000D 260f07 SYSRET
|
||||
DSIZE: 32, ASIZE: 32, VLEN: -
|
||||
ISA Set: AMD, Ins cat: SYSRET, CET tracked: no
|
||||
CPUID leaf: 0x80000001, reg: ecx, bit: 11
|
||||
FLAGS access
|
||||
Entire register
|
||||
Valid modes
|
||||
R0: yes, R1: no, R2: no, R3: no
|
||||
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
|
||||
SMM: yes, SGX: no, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: R-, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: Model Specific, RegSize: 8, RegId: -1073741695, RegCount: 1
|
||||
Operand: 1, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: Segment, RegSize: 4, RegId: 2, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: General Purpose, RegSize: 4, RegId: 1, RegCount: 1
|
||||
Operand: 3, Acc: R-, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: General Purpose, RegSize: 8, RegId: 11, RegCount: 1
|
||||
Operand: 4, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: Segment, RegSize: 4, RegId: 1, RegCount: 1
|
||||
Operand: 5, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: IP, RegSize: 4, RegId: 0, RegCount: 1
|
||||
Operand: 6, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: Flags, RegSize: 4, RegId: 0, RegCount: 1
|
||||
Operand: 7, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: SSP, RegSize: 4, RegId: 0, RegCount: 1
|
||||
|
||||
0000000000000010 f3660fc7f8 RDPID eax
|
||||
DSIZE: 16, ASIZE: 32, VLEN: -
|
||||
ISA Set: RDPID, Ins cat: RDPID, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 22
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
|
||||
SMM: yes, SGX: yes, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: M, RegType: General Purpose, RegSize: 4, RegId: 0, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: Model Specific, RegSize: 8, RegId: -1073741565, RegCount: 1
|
||||
|
||||
0000000000000015 f30f1b05a4274e6d BNDMK bnd0, dword ptr [0x6d4e27a4]
|
||||
DSIZE: 32, ASIZE: 32, VLEN: -
|
||||
ISA Set: MPX, Ins cat: MPX, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 14
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
|
||||
SMM: yes, SGX: yes, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 8, RawSize: 8, Encoding: R, RegType: Bound, RegSize: 8, RegId: 0, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Memory, Size: 4, RawSize: 4, Encoding: M,
|
||||
Segment: 3, Displacement: 0x000000006d4e27a4,
|
||||
|
||||
000000000000001D c4e13a10ca VMOVSS xmm1, xmm0, xmm2
|
||||
DSIZE: 32, ASIZE: 32, VLEN: 128
|
||||
ISA Set: AVX, Ins cat: DATAXFER, CET tracked: no
|
||||
CPUID leaf: 0x00000001, reg: ecx, bit: 28
|
||||
Exception class: SSE/VEX, exception type: 5
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
|
||||
SMM: yes, SGX: yes, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 1, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: V, RegType: Vector, RegSize: 16, RegId: 0, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Register, Size: 4, RawSize: 4, Encoding: M, RegType: Vector, RegSize: 16, RegId: 2, RegCount: 1
|
||||
|
||||
BIN
bddisasm_test/special/regressions_64
Normal file
BIN
bddisasm_test/special/regressions_64
Normal file
Binary file not shown.
13
bddisasm_test/special/regressions_64.asm
Normal file
13
bddisasm_test/special/regressions_64.asm
Normal file
@ -0,0 +1,13 @@
|
||||
bits 64
|
||||
|
||||
db 0x66, 0x26, 0xc7, 0xf8, 0xff, 0x7f ; xbegin 0x800000000002d877
|
||||
db 0x26, 0xc7, 0xf8, 0x00, 0x00, 0x00, 0x00 ; xbegin 0x8000000000025b1a
|
||||
db 0x66, 0x0f, 0x01, 0xd9 ; vmmcall
|
||||
db 0x67, 0x48, 0x0f, 0x1a, 0x44, 0x25, 0x7f ; bndldx bnd0, [rbp+0x7f]
|
||||
db 0x26, 0x48, 0x0f, 0xae, 0x04, 0x48 ; fxsave64 [rax+rcx*2]
|
||||
db 0x26, 0x48, 0x0f, 0xae, 0x0c, 0x48 ; fxrstor64 [rax+rcx*2]
|
||||
db 0x26, 0xc4, 0xe3, 0x71, 0x48, 0xc2, 0x30 ; vpermil2ps xmm0, xmm1, xmm2, xmm3, 0x0
|
||||
db 0x26, 0xc4, 0xe3, 0x71, 0x49, 0xc2, 0x30 ; vpermil2pd xmm0, xmm1, xmm2, xmm3, 0x0
|
||||
db 0xc4, 0xe3, 0x69, 0x4a, 0xcb, 0x08 ; vblendvps xmm1, xmm2, xmm3, xmm0
|
||||
db 0xc4, 0xe3, 0x69, 0x68, 0xcb, 0x08 ; vfmaddps xmm1, xmm2, xmm3, xmm0
|
||||
db 0x62, 0xf2, 0x7d, 0x09, 0xa0, 0x04, 0x40 ; vpscatterdd dword ptr [rax+xmm0*2], k1, xmm0
|
||||
187
bddisasm_test/special/regressions_64.result
Normal file
187
bddisasm_test/special/regressions_64.result
Normal file
@ -0,0 +1,187 @@
|
||||
0000000000000000 6626c7f8ff7f XBEGIN 0x8005
|
||||
DSIZE: 16, ASIZE: 64, VLEN: -
|
||||
ISA Set: TSX, Ins cat: COND_BR, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 11
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
|
||||
SMM: yes, SGX: yes, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: R-, Type: Offset, Size: 2, RawSize: 2, Encoding: D
|
||||
Operand: 1, Acc: RW, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: IP, RegSize: 8, RegId: 0, RegCount: 1
|
||||
Operand: 2, Acc: --, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: General Purpose, RegSize: 4, RegId: 0, RegCount: 1
|
||||
|
||||
0000000000000006 26c7f800000000 XBEGIN 0xd
|
||||
DSIZE: 32, ASIZE: 64, VLEN: -
|
||||
ISA Set: TSX, Ins cat: COND_BR, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 11
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
|
||||
SMM: yes, SGX: yes, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: R-, Type: Offset, Size: 4, RawSize: 4, Encoding: D
|
||||
Operand: 1, Acc: RW, Type: Register, Size: 8, RawSize: 8, Encoding: S, RegType: IP, RegSize: 8, RegId: 0, RegCount: 1
|
||||
Operand: 2, Acc: --, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: General Purpose, RegSize: 4, RegId: 0, RegCount: 1
|
||||
|
||||
000000000000000D 660f01d9 VMMCALL
|
||||
DSIZE: 32, ASIZE: 64, VLEN: -
|
||||
ISA Set: SVM, Ins cat: SYSTEM, CET tracked: no
|
||||
CPUID leaf: 0x80000001, reg: ecx, bit: 2
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
|
||||
SMM: yes, SGX: yes, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
|
||||
0000000000000011 67480f1a44257f BNDLDX bnd0, [rbp+0x7f]
|
||||
DSIZE: 64, ASIZE: 64, VLEN: -
|
||||
ISA Set: MPX, Ins cat: MPX, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 14
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
|
||||
SMM: yes, SGX: yes, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Bound, RegSize: 16, RegId: 0, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Memory, Size: 0, RawSize: 0, Encoding: M, Address Generator: yes, MIB Addressing: yes,
|
||||
Base: 5, Displacement: 0x000000000000007f,
|
||||
|
||||
0000000000000018 26480fae0448 FXSAVE64 [rax+rcx*2]
|
||||
DSIZE: 64, ASIZE: 64, VLEN: -
|
||||
ISA Set: FXSAVE, Ins cat: SSE, CET tracked: no
|
||||
CPUID leaf: 0x00000001, reg: edx, bit: 24
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
|
||||
SMM: yes, SGX: yes, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Memory, Size: 512, RawSize: 512, Encoding: M,
|
||||
Segment: 3, Base: 0, Index: 1 * 2,
|
||||
Operand: 1, Acc: R-, Type: Bank, Size: -1, RawSize: -1, Encoding: S
|
||||
|
||||
000000000000001E 26480fae0c48 FXRSTOR64 [rax+rcx*2]
|
||||
DSIZE: 64, ASIZE: 64, VLEN: -
|
||||
ISA Set: FXSAVE, Ins cat: SSE, CET tracked: no
|
||||
CPUID leaf: 0x00000001, reg: edx, bit: 24
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
|
||||
SMM: yes, SGX: yes, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: R-, Type: Memory, Size: 512, RawSize: 512, Encoding: M,
|
||||
Segment: 3, Base: 0, Index: 1 * 2,
|
||||
Operand: 1, Acc: -W, Type: Bank, Size: -1, RawSize: -1, Encoding: S
|
||||
|
||||
0000000000000024 26c4e37148c230 VPERMIL2PS xmm0, xmm1, xmm2, xmm3, 0x00
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
ISA Set: XOP, Ins cat: XOP, CET tracked: no
|
||||
CPUID leaf: 0x80000001, reg: ecx, bit: 11
|
||||
Exception class: SSE/VEX, exception type: 4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
|
||||
SMM: yes, SGX: yes, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 0, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: V, RegType: Vector, RegSize: 16, RegId: 1, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: M, RegType: Vector, RegSize: 16, RegId: 2, RegCount: 1
|
||||
Operand: 3, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: L, RegType: Vector, RegSize: 16, RegId: 3, RegCount: 1
|
||||
Operand: 4, Acc: R-, Type: Immediate, Size: 1, RawSize: 1, Encoding: L
|
||||
|
||||
000000000000002B 26c4e37149c230 VPERMIL2PD xmm0, xmm1, xmm2, xmm3, 0x00
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
ISA Set: XOP, Ins cat: XOP, CET tracked: no
|
||||
CPUID leaf: 0x80000001, reg: ecx, bit: 11
|
||||
Exception class: SSE/VEX, exception type: 4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
|
||||
SMM: yes, SGX: yes, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 0, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: V, RegType: Vector, RegSize: 16, RegId: 1, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: M, RegType: Vector, RegSize: 16, RegId: 2, RegCount: 1
|
||||
Operand: 3, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: L, RegType: Vector, RegSize: 16, RegId: 3, RegCount: 1
|
||||
Operand: 4, Acc: R-, Type: Immediate, Size: 1, RawSize: 1, Encoding: L
|
||||
|
||||
0000000000000032 c4e3694acb08 VBLENDVPS xmm1, xmm2, xmm3, xmm0
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX, Ins cat: AVX, CET tracked: no
|
||||
CPUID leaf: 0x00000001, reg: ecx, bit: 28
|
||||
Exception class: SSE/VEX, exception type: 4
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
|
||||
SMM: yes, SGX: yes, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 1, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: V, RegType: Vector, RegSize: 16, RegId: 2, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: M, RegType: Vector, RegSize: 16, RegId: 3, RegCount: 1
|
||||
Operand: 3, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: L, RegType: Vector, RegSize: 16, RegId: 0, RegCount: 1
|
||||
|
||||
0000000000000038 c4e36968cb08 VFMADDPS xmm1, xmm2, xmm3, xmm0
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
ISA Set: FMA4, Ins cat: FMA4, CET tracked: no
|
||||
CPUID leaf: 0x80000001, reg: ecx, bit: 16
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
|
||||
SMM: yes, SGX: yes, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 1, RegCount: 1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: V, RegType: Vector, RegSize: 16, RegId: 2, RegCount: 1
|
||||
Operand: 2, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: M, RegType: Vector, RegSize: 16, RegId: 3, RegCount: 1
|
||||
Operand: 3, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: L, RegType: Vector, RegSize: 16, RegId: 0, RegCount: 1
|
||||
|
||||
000000000000003E 62f27d09a00440 VPSCATTERDD dword ptr [rax+xmm0*2]{k1}, xmm0
|
||||
DSIZE: 32, ASIZE: 64, VLEN: 128
|
||||
ISA Set: AVX512F, Ins cat: SCATTER, CET tracked: no
|
||||
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ebx, bit: 16
|
||||
EVEX Tuple Type: Tuple 1 Scalar
|
||||
Exception class: EVEX, exception type: E12
|
||||
Valid modes
|
||||
R0: yes, R1: yes, R2: yes, R3: yes
|
||||
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
|
||||
SMM: yes, SGX: yes, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
|
||||
Valid prefixes
|
||||
REP: no, REPcc: no, LOCK: no
|
||||
HLE: no, XACQUIRE only: no, XRELEASE only: no
|
||||
BND: no, BHINT: no, DNT: no
|
||||
Operand: 0, Acc: -W, Type: Memory, Size: 16, RawSize: 16, Encoding: M, VSIB Addressing: yes,
|
||||
Segment: 3, Base: 0, Index: 0 * 2,
|
||||
VSIB index size: 4, VSIB element size: 4, VSIB element count: 4
|
||||
Decorator: Mask k1
|
||||
Operand: 1, Acc: R-, Type: Register, Size: 8, RawSize: 8, Encoding: A, RegType: Mask, RegSize: 8, RegId: 1, RegCount: 1
|
||||
Operand: 2, Acc: RW, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 0, RegCount: 1
|
||||
|
||||
@ -9,7 +9,7 @@ Emulating: 0x0000000000200000 LEA rbp, [rel 0x200000]
|
||||
R8 = 0x0000000000000000 R9 = 0x0000000000000000 R10 = 0x0000000000000000 R11 = 0x0000000000000000
|
||||
R12 = 0x0000000000000000 R13 = 0x0000000000000000 R14 = 0x0000000000000000 R15 = 0x0000000000000000
|
||||
RIP = 0x0000000000200007 RFLAGS = 0x0000000000000202
|
||||
Emulating: 0x0000000000200007 SUB rbp, 0x01
|
||||
Emulating: 0x0000000000200007 SUB rbp, 0x0000000000000001
|
||||
RAX = 0x0000000000000000 RCX = 0x0000000000000000 RDX = 0x0000000000000000 RBX = 0x0000000000000000
|
||||
RSP = 0x0000000000101000 RBP = 0x00000000001fffff RSI = 0x0000000000000000 RDI = 0x0000000000000000
|
||||
R8 = 0x0000000000000000 R9 = 0x0000000000000000 R10 = 0x0000000000000000 R11 = 0x0000000000000000
|
||||
|
||||
@ -3,7 +3,7 @@
|
||||
R8 = 0x0000000000000000 R9 = 0x0000000000000000 R10 = 0x0000000000000000 R11 = 0x0000000000000000
|
||||
R12 = 0x0000000000000000 R13 = 0x0000000000000000 R14 = 0x0000000000000000 R15 = 0x0000000000000000
|
||||
RIP = 0x0000000000200000 RFLAGS = 0x0000000000000202
|
||||
Emulating: 0x0000000000200000 MOV rax, 0xfffffff0
|
||||
Emulating: 0x0000000000200000 MOV rax, 0xfffffffffffffff0
|
||||
RAX = 0xfffffffffffffff0 RCX = 0x0000000000000000 RDX = 0x0000000000000000 RBX = 0x0000000000000000
|
||||
RSP = 0x0000000000101000 RBP = 0x0000000000000000 RSI = 0x0000000000000000 RDI = 0x0000000000000000
|
||||
R8 = 0x0000000000000000 R9 = 0x0000000000000000 R10 = 0x0000000000000000 R11 = 0x0000000000000000
|
||||
|
||||
@ -9,7 +9,7 @@ Emulating: 0x0000000000200000 MOV eax, 0xffffffff
|
||||
R8 = 0x0000000000000000 R9 = 0x0000000000000000 R10 = 0x0000000000000000 R11 = 0x0000000000000000
|
||||
R12 = 0x0000000000000000 R13 = 0x0000000000000000 R14 = 0x0000000000000000 R15 = 0x0000000000000000
|
||||
RIP = 0x0000000000200005 RFLAGS = 0x0000000000000202
|
||||
Emulating: 0x0000000000200005 ADD eax, 0x01
|
||||
Emulating: 0x0000000000200005 ADD eax, 0x00000001
|
||||
RAX = 0x0000000000000000 RCX = 0x0000000000000000 RDX = 0x0000000000000000 RBX = 0x0000000000000000
|
||||
RSP = 0x0000000000101000 RBP = 0x0000000000000000 RSI = 0x0000000000000000 RDI = 0x0000000000000000
|
||||
R8 = 0x0000000000000000 R9 = 0x0000000000000000 R10 = 0x0000000000000000 R11 = 0x0000000000000000
|
||||
|
||||
@ -9,7 +9,7 @@ Emulating: 0x0000000000200000 MOV eax, 0xffffffff
|
||||
R8 = 0x0000000000000000 R9 = 0x0000000000000000 R10 = 0x0000000000000000 R11 = 0x0000000000000000
|
||||
R12 = 0x0000000000000000 R13 = 0x0000000000000000 R14 = 0x0000000000000000 R15 = 0x0000000000000000
|
||||
RIP = 0x0000000000200005 RFLAGS = 0x0000000000000202
|
||||
Emulating: 0x0000000000200005 ADD eax, 0x01
|
||||
Emulating: 0x0000000000200005 ADD eax, 0x00000001
|
||||
RAX = 0x0000000000000000 RCX = 0x0000000000000000 RDX = 0x0000000000000000 RBX = 0x0000000000000000
|
||||
RSP = 0x0000000000101000 RBP = 0x0000000000000000 RSI = 0x0000000000000000 RDI = 0x0000000000000000
|
||||
R8 = 0x0000000000000000 R9 = 0x0000000000000000 R10 = 0x0000000000000000 R11 = 0x0000000000000000
|
||||
|
||||
@ -15,7 +15,7 @@ Emulating: 0x0000000000200002 MOV eax, 0xffffffff
|
||||
R8 = 0x0000000000000000 R9 = 0x0000000000000000 R10 = 0x0000000000000000 R11 = 0x0000000000000000
|
||||
R12 = 0x0000000000000000 R13 = 0x0000000000000000 R14 = 0x0000000000000000 R15 = 0x0000000000000000
|
||||
RIP = 0x0000000000200007 RFLAGS = 0x0000000000000246
|
||||
Emulating: 0x0000000000200007 ADD eax, 0x01
|
||||
Emulating: 0x0000000000200007 ADD eax, 0x00000001
|
||||
RAX = 0x0000000000000000 RCX = 0x0000000000000000 RDX = 0x0000000000000000 RBX = 0x0000000000000000
|
||||
RSP = 0x0000000000101000 RBP = 0x0000000000000000 RSI = 0x0000000000000000 RDI = 0x0000000000000000
|
||||
R8 = 0x0000000000000000 R9 = 0x0000000000000000 R10 = 0x0000000000000000 R11 = 0x0000000000000000
|
||||
@ -33,13 +33,13 @@ Emulating: 0x000000000020000c MOV eax, 0xffffffff
|
||||
R8 = 0x0000000000000000 R9 = 0x0000000000000000 R10 = 0x0000000000000000 R11 = 0x0000000000000000
|
||||
R12 = 0x0000000000000000 R13 = 0x0000000000000000 R14 = 0x0000000000000000 R15 = 0x0000000000000000
|
||||
RIP = 0x0000000000200011 RFLAGS = 0x0000000000000246
|
||||
Emulating: 0x0000000000200011 ADD eax, 0x01
|
||||
Emulating: 0x0000000000200011 ADD eax, 0x00000001
|
||||
RAX = 0x0000000000000000 RCX = 0x0000000000000000 RDX = 0x0000000000000000 RBX = 0x0000000000000000
|
||||
RSP = 0x0000000000101000 RBP = 0x0000000000000000 RSI = 0x0000000000000000 RDI = 0x0000000000000000
|
||||
R8 = 0x0000000000000000 R9 = 0x0000000000000000 R10 = 0x0000000000000000 R11 = 0x0000000000000000
|
||||
R12 = 0x0000000000000000 R13 = 0x0000000000000000 R14 = 0x0000000000000000 R15 = 0x0000000000000000
|
||||
RIP = 0x0000000000200014 RFLAGS = 0x0000000000000247
|
||||
Emulating: 0x0000000000200014 ADC eax, 0x00
|
||||
Emulating: 0x0000000000200014 ADC eax, 0x00000000
|
||||
RAX = 0x0000000000000001 RCX = 0x0000000000000000 RDX = 0x0000000000000000 RBX = 0x0000000000000000
|
||||
RSP = 0x0000000000101000 RBP = 0x0000000000000000 RSI = 0x0000000000000000 RDI = 0x0000000000000000
|
||||
R8 = 0x0000000000000000 R9 = 0x0000000000000000 R10 = 0x0000000000000000 R11 = 0x0000000000000000
|
||||
@ -51,13 +51,13 @@ Emulating: 0x0000000000200017 XOR eax, eax
|
||||
R8 = 0x0000000000000000 R9 = 0x0000000000000000 R10 = 0x0000000000000000 R11 = 0x0000000000000000
|
||||
R12 = 0x0000000000000000 R13 = 0x0000000000000000 R14 = 0x0000000000000000 R15 = 0x0000000000000000
|
||||
RIP = 0x0000000000200019 RFLAGS = 0x0000000000000246
|
||||
Emulating: 0x0000000000200019 SUB eax, 0x01
|
||||
Emulating: 0x0000000000200019 SUB eax, 0x00000001
|
||||
RAX = 0x00000000ffffffff RCX = 0x0000000000000000 RDX = 0x0000000000000000 RBX = 0x0000000000000000
|
||||
RSP = 0x0000000000101000 RBP = 0x0000000000000000 RSI = 0x0000000000000000 RDI = 0x0000000000000000
|
||||
R8 = 0x0000000000000000 R9 = 0x0000000000000000 R10 = 0x0000000000000000 R11 = 0x0000000000000000
|
||||
R12 = 0x0000000000000000 R13 = 0x0000000000000000 R14 = 0x0000000000000000 R15 = 0x0000000000000000
|
||||
RIP = 0x000000000020001c RFLAGS = 0x0000000000000286
|
||||
Emulating: 0x000000000020001c SBB eax, 0x00
|
||||
Emulating: 0x000000000020001c SBB eax, 0x00000000
|
||||
RAX = 0x00000000ffffffff RCX = 0x0000000000000000 RDX = 0x0000000000000000 RBX = 0x0000000000000000
|
||||
RSP = 0x0000000000101000 RBP = 0x0000000000000000 RSI = 0x0000000000000000 RDI = 0x0000000000000000
|
||||
R8 = 0x0000000000000000 R9 = 0x0000000000000000 R10 = 0x0000000000000000 R11 = 0x0000000000000000
|
||||
|
||||
@ -15,7 +15,7 @@ Emulating: 0x0000000000200002 FXSAVE [rsp]
|
||||
R8 = 0x0000000000000000 R9 = 0x0000000000000000 R10 = 0x0000000000000000 R11 = 0x0000000000000000
|
||||
R12 = 0x0000000000000000 R13 = 0x0000000000000000 R14 = 0x0000000000000000 R15 = 0x0000000000000000
|
||||
RIP = 0x0000000000200006 RFLAGS = 0x0000000000000202
|
||||
Emulating: 0x0000000000200006 ADD rsp, 0x08
|
||||
Emulating: 0x0000000000200006 ADD rsp, 0x0000000000000008
|
||||
RAX = 0x0000000000000000 RCX = 0x0000000000000000 RDX = 0x0000000000000000 RBX = 0x0000000000000000
|
||||
RSP = 0x0000000000101008 RBP = 0x0000000000000000 RSI = 0x0000000000000000 RDI = 0x0000000000000000
|
||||
R8 = 0x0000000000000000 R9 = 0x0000000000000000 R10 = 0x0000000000000000 R11 = 0x0000000000000000
|
||||
|
||||
@ -15,7 +15,7 @@ Emulating: 0x0000000000200002 MOV al, 0x12
|
||||
R8 = 0x0000000000000000 R9 = 0x0000000000000000 R10 = 0x0000000000000000 R11 = 0x0000000000000000
|
||||
R12 = 0x0000000000000000 R13 = 0x0000000000000000 R14 = 0x0000000000000000 R15 = 0x0000000000000000
|
||||
RIP = 0x0000000000200004 RFLAGS = 0x0000000000000202
|
||||
Emulating: 0x0000000000200004 MOV rcx, 0xffffffff
|
||||
Emulating: 0x0000000000200004 MOV rcx, 0xffffffffffffffff
|
||||
RAX = 0x000000000000bd12 RCX = 0xffffffffffffffff RDX = 0x0000000000000000 RBX = 0x0000000000000000
|
||||
RSP = 0x0000000000101000 RBP = 0x0000000000000000 RSI = 0x0000000000000000 RDI = 0x0000000000000000
|
||||
R8 = 0x0000000000000000 R9 = 0x0000000000000000 R10 = 0x0000000000000000 R11 = 0x0000000000000000
|
||||
@ -75,7 +75,7 @@ Emulating: 0x0000000000200027 XCHG eax, ebx
|
||||
R8 = 0x0000000000000000 R9 = 0x0000000000000000 R10 = 0x0000000000000000 R11 = 0x0000000000000000
|
||||
R12 = 0x0000000000000000 R13 = 0x0000000000000000 R14 = 0x0000000000000000 R15 = 0x0000000000000000
|
||||
RIP = 0x0000000000200028 RFLAGS = 0x0000000000000202
|
||||
Emulating: 0x0000000000200028 MOV qword ptr [rsp], 0xffffffff
|
||||
Emulating: 0x0000000000200028 MOV qword ptr [rsp], 0xffffffffffffffff
|
||||
RAX = 0x0000000009abcdef RCX = 0x000000000000ffff RDX = 0x0000000000000000 RBX = 0x0000000012345678
|
||||
RSP = 0x0000000000101000 RBP = 0x0000000000000000 RSI = 0x0000000000000000 RDI = 0x0000000000000000
|
||||
R8 = 0x0000000000000000 R9 = 0x0000000000000000 R10 = 0x0000000000000000 R11 = 0x0000000000000000
|
||||
|
||||
@ -45,13 +45,13 @@ Emulating: 0x0000000000200012 MOVSD
|
||||
R8 = 0x0000000000000000 R9 = 0x0000000000000000 R10 = 0x0000000000000000 R11 = 0x0000000000000000
|
||||
R12 = 0x0000000000000000 R13 = 0x0000000000000000 R14 = 0x0000000000000000 R15 = 0x0000000000000000
|
||||
RIP = 0x0000000000200013 RFLAGS = 0x0000000000000202
|
||||
Emulating: 0x0000000000200013 SUB rsi, 0x08
|
||||
Emulating: 0x0000000000200013 SUB rsi, 0x0000000000000008
|
||||
RAX = 0x0000000000000000 RCX = 0x0000000000000000 RDX = 0x0000000000000000 RBX = 0x0000000000000000
|
||||
RSP = 0x0000000000101000 RBP = 0x0000000000000000 RSI = 0x000000000020005f RDI = 0x0000000000200087
|
||||
R8 = 0x0000000000000000 R9 = 0x0000000000000000 R10 = 0x0000000000000000 R11 = 0x0000000000000000
|
||||
R12 = 0x0000000000000000 R13 = 0x0000000000000000 R14 = 0x0000000000000000 R15 = 0x0000000000000000
|
||||
RIP = 0x0000000000200017 RFLAGS = 0x0000000000000206
|
||||
Emulating: 0x0000000000200017 SUB rdi, 0x08
|
||||
Emulating: 0x0000000000200017 SUB rdi, 0x0000000000000008
|
||||
RAX = 0x0000000000000000 RCX = 0x0000000000000000 RDX = 0x0000000000000000 RBX = 0x0000000000000000
|
||||
RSP = 0x0000000000101000 RBP = 0x0000000000000000 RSI = 0x000000000020005f RDI = 0x000000000020007f
|
||||
R8 = 0x0000000000000000 R9 = 0x0000000000000000 R10 = 0x0000000000000000 R11 = 0x0000000000000000
|
||||
|
||||
@ -48,6 +48,24 @@ def test_dir(dir):
|
||||
for f in glob.glob('%s\\*.temp' % dir):
|
||||
os.remove(f)
|
||||
|
||||
def regenerate(dir):
|
||||
for f in glob.glob('%s\\*' % dir):
|
||||
if -1 == f.find('.'):
|
||||
if 0 < f.find('_16'):
|
||||
mod = '-b16'
|
||||
elif 0 < f.find('_32'):
|
||||
mod = '-b32'
|
||||
else:
|
||||
mod = '-b64'
|
||||
if 0 < f.find('_r0'):
|
||||
mod += ' -k'
|
||||
|
||||
print(' * Regenerating test case %s...' % f)
|
||||
os.system('disasm -exi -shemu %s -f %s >%s.result' % (mod, f, f))
|
||||
|
||||
for f in glob.glob('%s\\*_decoded.bin' % dir):
|
||||
os.remove(f)
|
||||
|
||||
for dn in glob.glob("*"):
|
||||
if not os.path.isdir(dn):
|
||||
continue
|
||||
|
||||
@ -292,7 +292,6 @@ const char* category_to_string(
|
||||
case ND_CAT_SYSTEM: return "SYSTEM";
|
||||
case ND_CAT_UD: return "UD";
|
||||
case ND_CAT_UNCOND_BR: return "UNCOND_BR";
|
||||
case ND_CAT_UNDOC: return "UNDOC";
|
||||
case ND_CAT_UNKNOWN: return "UNKNOWN";
|
||||
case ND_CAT_VAES: return "VAES";
|
||||
case ND_CAT_VFMA: return "VFMA";
|
||||
|
||||
@ -332,8 +332,6 @@ std::string ins_class_to_str(const ND_INS_CLASS cls)
|
||||
case ND_INS_LLDT: return "lldt";
|
||||
case ND_INS_LLWPCB: return "llwpcb";
|
||||
case ND_INS_LMSW: return "lmsw";
|
||||
case ND_INS_LOADALL: return "loadall";
|
||||
case ND_INS_LOADALLD: return "loadalld";
|
||||
case ND_INS_LODS: return "lods";
|
||||
case ND_INS_LOOP: return "loop";
|
||||
case ND_INS_LOOPNZ: return "loopnz";
|
||||
@ -1121,8 +1119,6 @@ std::string ins_class_to_str(const ND_INS_CLASS cls)
|
||||
case ND_INS_VPERMI2W: return "vpermi2w";
|
||||
case ND_INS_VPERMILPD: return "vpermilpd";
|
||||
case ND_INS_VPERMILPS: return "vpermilps";
|
||||
case ND_INS_VPERMILzz2PD: return "vpermilzz2pd";
|
||||
case ND_INS_VPERMILzz2PS: return "vpermilzz2ps";
|
||||
case ND_INS_VPERMPD: return "vpermpd";
|
||||
case ND_INS_VPERMPS: return "vpermps";
|
||||
case ND_INS_VPERMQ: return "vpermq";
|
||||
@ -1562,7 +1558,6 @@ std::string ins_cat_to_str(ND_INS_CATEGORY category)
|
||||
case ND_CAT_SYSTEM: return "system";
|
||||
case ND_CAT_UD: return "ud";
|
||||
case ND_CAT_UNCOND_BR: return "uncond_br";
|
||||
case ND_CAT_UNDOC: return "undoc";
|
||||
case ND_CAT_UNKNOWN: return "unknown";
|
||||
case ND_CAT_VAES: return "vaes";
|
||||
case ND_CAT_VFMA: return "vfma";
|
||||
|
||||
@ -176,6 +176,8 @@ typedef uint32_t ND_REG_SIZE;
|
||||
#define ND_FLAG_NO_RIP_REL 0x02000000 // The instruction doesn't work with RIP relative addressing.
|
||||
#define ND_FLAG_NO66 0x04000000 // The 0x66 prefix is not accepted by the instruction.
|
||||
#define ND_FLAG_SIBMEM 0x08000000 // sibmem addressing is used (Intel AMX instructions).
|
||||
#define ND_FLAG_I67 0x10000000 // Ignore the 0x67 prefix in 64 bit mode (Intel MPX instructions).
|
||||
#define ND_FLAG_IER 0x20000000 // Ignore EVEX embedded rounding.
|
||||
|
||||
|
||||
//
|
||||
|
||||
@ -245,7 +245,9 @@ typedef enum _ND_INS_CLASS
|
||||
ND_INS_FXAM,
|
||||
ND_INS_FXCH,
|
||||
ND_INS_FXRSTOR,
|
||||
ND_INS_FXRSTOR64,
|
||||
ND_INS_FXSAVE,
|
||||
ND_INS_FXSAVE64,
|
||||
ND_INS_FXTRACT,
|
||||
ND_INS_FYL2X,
|
||||
ND_INS_FYL2XP1,
|
||||
@ -319,8 +321,6 @@ typedef enum _ND_INS_CLASS
|
||||
ND_INS_LLDT,
|
||||
ND_INS_LLWPCB,
|
||||
ND_INS_LMSW,
|
||||
ND_INS_LOADALL,
|
||||
ND_INS_LOADALLD,
|
||||
ND_INS_LODS,
|
||||
ND_INS_LOOP,
|
||||
ND_INS_LOOPNZ,
|
||||
@ -357,6 +357,7 @@ typedef enum _ND_INS_CLASS
|
||||
ND_INS_MOVDQ2Q,
|
||||
ND_INS_MOVDQA,
|
||||
ND_INS_MOVDQU,
|
||||
ND_INS_MOVHLPS,
|
||||
ND_INS_MOVHPD,
|
||||
ND_INS_MOVHPS,
|
||||
ND_INS_MOVLHPS,
|
||||
@ -461,6 +462,7 @@ typedef enum _ND_INS_CLASS
|
||||
ND_INS_PFMUL,
|
||||
ND_INS_PFNACC,
|
||||
ND_INS_PFPNACC,
|
||||
ND_INS_PFRCP,
|
||||
ND_INS_PFRCPIT1,
|
||||
ND_INS_PFRCPIT2,
|
||||
ND_INS_PFRCPV,
|
||||
@ -519,6 +521,7 @@ typedef enum _ND_INS_CLASS
|
||||
ND_INS_PMULUDQ,
|
||||
ND_INS_POP,
|
||||
ND_INS_POPA,
|
||||
ND_INS_POPAD,
|
||||
ND_INS_POPCNT,
|
||||
ND_INS_POPF,
|
||||
ND_INS_POR,
|
||||
@ -572,6 +575,7 @@ typedef enum _ND_INS_CLASS
|
||||
ND_INS_PUNPCKLWD,
|
||||
ND_INS_PUSH,
|
||||
ND_INS_PUSHA,
|
||||
ND_INS_PUSHAD,
|
||||
ND_INS_PUSHF,
|
||||
ND_INS_PVALIDATE,
|
||||
ND_INS_PXOR,
|
||||
@ -1106,10 +1110,10 @@ typedef enum _ND_INS_CLASS
|
||||
ND_INS_VPERMI2PS,
|
||||
ND_INS_VPERMI2Q,
|
||||
ND_INS_VPERMI2W,
|
||||
ND_INS_VPERMIL2PD,
|
||||
ND_INS_VPERMIL2PS,
|
||||
ND_INS_VPERMILPD,
|
||||
ND_INS_VPERMILPS,
|
||||
ND_INS_VPERMILzz2PD,
|
||||
ND_INS_VPERMILzz2PS,
|
||||
ND_INS_VPERMPD,
|
||||
ND_INS_VPERMPS,
|
||||
ND_INS_VPERMQ,
|
||||
@ -1272,6 +1276,7 @@ typedef enum _ND_INS_CLASS
|
||||
ND_INS_VPSHAQ,
|
||||
ND_INS_VPSHAW,
|
||||
ND_INS_VPSHLB,
|
||||
ND_INS_VPSHLD,
|
||||
ND_INS_VPSHLDD,
|
||||
ND_INS_VPSHLDQ,
|
||||
ND_INS_VPSHLDVD,
|
||||
@ -1279,6 +1284,7 @@ typedef enum _ND_INS_CLASS
|
||||
ND_INS_VPSHLDVW,
|
||||
ND_INS_VPSHLDW,
|
||||
ND_INS_VPSHLQ,
|
||||
ND_INS_VPSHLW,
|
||||
ND_INS_VPSHRDD,
|
||||
ND_INS_VPSHRDQ,
|
||||
ND_INS_VPSHRDVD,
|
||||
@ -1664,7 +1670,6 @@ typedef enum _ND_INS_TYPE
|
||||
ND_CAT_SYSTEM,
|
||||
ND_CAT_UD,
|
||||
ND_CAT_UNCOND_BR,
|
||||
ND_CAT_UNDOC,
|
||||
ND_CAT_UNKNOWN,
|
||||
ND_CAT_VAES,
|
||||
ND_CAT_VFMA,
|
||||
|
||||
@ -6,7 +6,7 @@
|
||||
#define _DISASM_VER_H_
|
||||
|
||||
#define DISASM_VERSION_MAJOR 1
|
||||
#define DISASM_VERSION_MINOR 25
|
||||
#define DISASM_VERSION_REVISION 2
|
||||
#define DISASM_VERSION_MINOR 26
|
||||
#define DISASM_VERSION_REVISION 0
|
||||
|
||||
#endif // _DISASM_VER_H_
|
||||
|
||||
@ -43,6 +43,8 @@ valid_attributes = {
|
||||
'PREFIX', # Prefix.
|
||||
'SERIAL', # Instruction is serializing.
|
||||
'SIBMEM', # Instruction uses sibmem addressing (AMX instructions).
|
||||
'I67', # Ignore the address size override (0x67) prefix in 64 bit mode.
|
||||
'IER', # Ignore embedded rounding for the instruction.
|
||||
}
|
||||
|
||||
#
|
||||
@ -126,6 +128,7 @@ valid_optype = [
|
||||
'rT', # The reg field inside modrm encodes a TMM register (AMX extension).
|
||||
'mT', # The rm field inside modrm encodes a TMM register (AMX extension).
|
||||
'vT', # The v field inside vex encodes a TMM register (AMX extension).
|
||||
'm2zI', # Bits [1,0] of the immediate byte which selects the fourth register.
|
||||
]
|
||||
|
||||
# Operand sizes.
|
||||
@ -236,6 +239,7 @@ valid_impops = {# register size
|
||||
'aDI' : ('rDI', 'asz'), # DI, EDI, or RDI register, depending on address size.
|
||||
'R11' : ('rR11', 'q'), # R11 register.
|
||||
'rIP' : ('rIP', 'v'), # IP, EIP or RIP, depending on op size.
|
||||
'yIP' : ('rIP', 'yf'), # EIP in 16/32 bit mode, or RIP in 64 bit mode.
|
||||
'1' : ('1', 'b'), # Constant 1.
|
||||
'XMM0' : ('XMM0', 'dq'), # XMM0 register.
|
||||
'ST(0)' : ('ST(0)', 'ft'), # ST(0) register.
|
||||
|
||||
@ -40,6 +40,8 @@ flags = {
|
||||
'CETT' : 'ND_FLAG_CETT',
|
||||
'SERIAL' : 'ND_FLAG_SERIAL',
|
||||
'SIBMEM' : 'ND_FLAG_SIBMEM',
|
||||
'I67' : 'ND_FLAG_I67',
|
||||
'IER' : 'ND_FLAG_IER',
|
||||
}
|
||||
|
||||
prefixes_map = {
|
||||
@ -140,6 +142,9 @@ optype = {
|
||||
'SHS0' : 'ND_OPT_MEM_SHS0',
|
||||
'SHSP' : 'ND_OPT_MEM_SHSP',
|
||||
|
||||
# Special immediates.
|
||||
'm2zI' : 'ND_OPT_Im2z',
|
||||
|
||||
# System registers, MSRs, XCRs, etc.
|
||||
'GDTR' : 'ND_OPT_SYS_GDTR',
|
||||
'IDTR' : 'ND_OPT_SYS_IDTR',
|
||||
|
||||
@ -51,6 +51,7 @@ CLZERO nil rAX [ 0x0F 0x01 /0
|
||||
RDPRU nil EAX,EDX,ECX,Fv [ 0x0F 0x01 /0xFD] s:RDPRU, t:MISC, w:W|W|R|W, f:CF=m|PF=0|AF=0|ZF=0|SF=0|OF=0
|
||||
VMRUN nil rAX [ 0x0F 0x01 /0xD8] s:SVM, t:SYSTEM, w:R, m:VMXROOT
|
||||
VMMCALL nil nil [ 0x0F 0x01 /0xD9] s:SVM, t:SYSTEM, m:VMX
|
||||
VMMCALL nil nil [ 0x66 0x0F 0x01 /0xD9] s:SVM, t:SYSTEM, m:VMX
|
||||
VMGEXIT nil nil [ 0xF3 0x0F 0x01 /0xD9] s:SVM, t:SYSTEM, m:VMX
|
||||
VMGEXIT nil nil [ 0xF2 0x0F 0x01 /0xD9] s:SVM, t:SYSTEM, m:VMX
|
||||
VMLOAD nil rAX [ 0x0F 0x01 /0xDA] s:SVM, t:SYSTEM, w:R, m:VMXROOT
|
||||
@ -70,14 +71,14 @@ LAR Gv,Mw Fv [ 0x0F 0x02 /r
|
||||
LAR Gv,Rz Fv [ 0x0F 0x02 /r:reg] s:I286PROT, t:SYSTEM, w:CW|R|W, f:ZF=m, m:NOREAL
|
||||
LSL Gv,Mw Fv [ 0x0F 0x03 /r:mem] s:I286PROT, t:SYSTEM, w:RW|R|W, f:ZF=m, m:NOREAL
|
||||
LSL Gv,Rz Fv [ 0x0F 0x03 /r:reg] s:I286PROT, t:SYSTEM, w:RW|R|W, f:ZF=m, m:NOREAL
|
||||
LOADALL nil BANK [ 0x0F 0x05] s:I486REAL, t:UNDOC, w:R
|
||||
SYSCALL nil STAR,LSTAR,FMASK,SS,RCX,R11,CS,rIP,Fv,SSP [ o64 0x0F 0x05] s:AMD, t:SYSCALL, w:R|R|R|W|W|W|W|W|RW|RW, a:F64, i:FSC, m:O64|NOSGX
|
||||
#LOADALL nil BANK [ 0x0F 0x05] s:I486REAL, t:UNDOC, w:R
|
||||
SYSCALL nil STAR,LSTAR,FMASK,SS,RCX,R11,CS,rIP,Fv,SSP [ 0x0F 0x05] s:AMD, t:SYSCALL, w:R|R|R|W|W|W|W|W|RW|RW, a:F64, i:FSC, m:NOSGX
|
||||
CLTS nil CR0 [ 0x0F 0x06] s:I286REAL, t:SYSTEM, w:W, m:KERNEL|NOV86
|
||||
LOADALLD nil BANK [ 0x0F 0x07] s:I486REAL, t:UNDOC, w:R
|
||||
SYSRET nil STAR,SS,rCX,R11,CS,rIP,Fv,SSP [ o64 0x0F 0x07] s:AMD, t:SYSRET, w:R|W|R|R|W|W|W|W, i:FSC, m:KERNEL|O64
|
||||
#LOADALLD nil BANK [ 0x0F 0x07] s:I486REAL, t:UNDOC, w:R
|
||||
SYSRET nil STAR,SS,rCX,R11,CS,rIP,Fv,SSP [ 0x0F 0x07] s:AMD, t:SYSRET, w:R|W|R|R|W|W|W|W, i:FSC, m:KERNEL
|
||||
INVD nil nil [ 0x0F 0x08] s:I486REAL, t:SYSTEM, a:SERIAL, m:KERNEL|NOV86
|
||||
WBINVD nil nil [ NP 0x0F 0x09] s:I486REAL, t:SYSTEM, a:SERIAL, m:KERNEL|NOV86
|
||||
WBNOINVD nil nil [ 0xF3 0x0F 0x09] s:WBNOINVD, t:WBNOINVD, m:KERNEL|NOV86
|
||||
WBINVD nil nil [ 0x0F 0x09] s:I486REAL, t:SYSTEM, a:SERIAL, m:KERNEL|NOV86
|
||||
WBNOINVD nil nil [ a0xF3 0x0F 0x09] s:WBNOINVD, t:WBNOINVD, m:KERNEL|NOV86
|
||||
CL1INVMB nil nil [ 0x0F 0x0A] s:SCC, t:SYSTEM
|
||||
UD2 nil nil [ 0x0F 0x0B] s:PPRO, t:MISC
|
||||
PREFETCHE Mb nil [ 0x0F 0x0D /0:mem] s:PREFETCH_NOP, t:PREFETCH, w:R
|
||||
@ -108,7 +109,7 @@ MOVUPS Wps,Vps nil [ NP 0x0F 0x11 /r
|
||||
MOVUPD Wpd,Vpd nil [ 0x66 0x0F 0x11 /r] s:SSE2, t:DATAXFER, w:W|R, e:4
|
||||
MOVSS Wss,Vss nil [ 0xF3 0x0F 0x11 /r] s:SSE, t:DATAXFER, w:W|R, e:5
|
||||
MOVSD Wsd,Vsd nil [ 0xF2 0x0F 0x11 /r] s:SSE2, t:DATAXFER, w:W|R, e:5
|
||||
MOVLPS Vq,Wq nil [ NP 0x0F 0x12 /r] s:SSE, t:DATAXFER, w:W|R, e:5
|
||||
MOVHLPS Vq,Wq nil [ NP 0x0F 0x12 /r] s:SSE, t:DATAXFER, w:W|R, e:5
|
||||
MOVLPD Vsd,Mq nil [ 0x66 0x0F 0x12 /r:mem] s:SSE2, t:DATAXFER, w:W|R, e:5
|
||||
MOVSLDUP Vx,Wx nil [ 0xF3 0x0F 0x12 /r] s:SSE3, t:DATAXFER, w:W|R, e:4
|
||||
MOVDDUP Vdq,Wq nil [ 0xF2 0x0F 0x12 /r] s:SSE3, t:DATAXFER, w:W|R, e:5
|
||||
@ -141,18 +142,18 @@ NOP Ev nil [ 0x0F 0x19 /r
|
||||
# MPX instructions. According to the SDM, MPX instructions have 64 bit op & address size in 64 bit mode, no matter
|
||||
# if 0x66 or 0x67 prefixes are used. 16 bit addressing cause #UD. However, these checks are not handled here (note
|
||||
# that Xed doesn't do those checks either).
|
||||
BNDLDX rBl,Mmib nil [ 0x0F 0x1A /r:mem mib] s:MPX, t:MPX, w:W|R, a:AG|NOA16|NORIPREL
|
||||
BNDLDX rBl,Mmib nil [ 0x0F 0x1A /r:mem mib] s:MPX, t:MPX, w:W|R, a:AG|NOA16|NORIPREL|I67
|
||||
NOP Gv,Ev nil [ 0x0F 0x1A /r:reg] s:PPRO, t:WIDENOP, w:R|R
|
||||
BNDMOV rBl,mBl nil [ 0x66 0x0F 0x1A /r] s:MPX, t:MPX, w:W|R, a:NOA16
|
||||
BNDCL rBl,Ey nil [ 0xF3 0x0F 0x1A /r] s:MPX, t:MPX, w:R|R, a:AG|F64
|
||||
BNDCU rBl,Ey nil [ 0xF2 0x0F 0x1A /r] s:MPX, t:MPX, w:R|R, a:AG|F64
|
||||
BNDMOV rBl,mBl nil [ 0x66 0x0F 0x1A /r] s:MPX, t:MPX, w:W|R, a:NOA16|I67
|
||||
BNDCL rBl,Ey nil [ 0xF3 0x0F 0x1A /r] s:MPX, t:MPX, w:R|R, a:AG|F64|I67
|
||||
BNDCU rBl,Ey nil [ 0xF2 0x0F 0x1A /r] s:MPX, t:MPX, w:R|R, a:AG|F64|I67
|
||||
|
||||
BNDSTX Mmib,rBl nil [ 0x0F 0x1B /r:mem mib] s:MPX, t:MPX, w:W|R, a:AG|NOA16|NORIPREL
|
||||
BNDSTX Mmib,rBl nil [ 0x0F 0x1B /r:mem mib] s:MPX, t:MPX, w:W|R, a:AG|NOA16|NORIPREL|I67
|
||||
NOP Gv,Ev nil [ 0x0F 0x1B /r:reg] s:PPRO, t:WIDENOP, w:R|R
|
||||
BNDMOV mBl,rBl nil [ 0x66 0x0F 0x1B /r] s:MPX, t:MPX, w:W|R, a:NOA16
|
||||
BNDMK rBl,My nil [ 0xF3 0x0F 0x1B /r:mem] s:MPX, t:MPX, w:W|R, a:F64|NOA16|NORIPREL
|
||||
BNDMOV mBl,rBl nil [ 0x66 0x0F 0x1B /r] s:MPX, t:MPX, w:W|R, a:NOA16|I67
|
||||
BNDMK rBl,My nil [ 0xF3 0x0F 0x1B /r:mem] s:MPX, t:MPX, w:W|R, a:F64|NOA16|NORIPREL|I67
|
||||
NOP Gv,Ev nil [ 0xF3 0x0F 0x1B /r:reg] s:PPRO, t:WIDENOP, w:R|R
|
||||
BNDCN rBl,Ey nil [ 0xF2 0x0F 0x1B /r] s:MPX, t:MPX, w:R|R, a:AG|F64
|
||||
BNDCN rBl,Ey nil [ 0xF2 0x0F 0x1B /r] s:MPX, t:MPX, w:R|R, a:AG|F64|I67
|
||||
|
||||
CLDEMOTE Mb nil [ NP 0x0F 0x1C /0:mem] s:CLDEMOTE, t:CLDEMOTE, w:W
|
||||
NOP Ev,Gv nil [ 0x66 0x0F 0x1C /0:mem] s:PPRO, t:WIDENOP, w:R|R
|
||||
@ -428,7 +429,7 @@ SETNC Eb Fv [ 0x0F 0x93 /r
|
||||
SETZ Eb Fv [ 0x0F 0x94 /r] s:I386, t:BITBYTE, c:SETcc, w:W|R, f:CZ, a:COND
|
||||
SETNZ Eb Fv [ 0x0F 0x95 /r] s:I386, t:BITBYTE, c:SETcc, w:W|R, f:CNZ, a:COND
|
||||
SETBE Eb Fv [ 0x0F 0x96 /r] s:I386, t:BITBYTE, c:SETcc, w:W|R, f:CBE, a:COND
|
||||
SETNB Eb Fv [ 0x0F 0x97 /r] s:I386, t:BITBYTE, c:SETcc, w:W|R, f:CNBE, a:COND
|
||||
SETNBE Eb Fv [ 0x0F 0x97 /r] s:I386, t:BITBYTE, c:SETcc, w:W|R, f:CNBE, a:COND
|
||||
SETS Eb Fv [ 0x0F 0x98 /r] s:I386, t:BITBYTE, c:SETcc, w:W|R, f:CS, a:COND
|
||||
SETNS Eb Fv [ 0x0F 0x99 /r] s:I386, t:BITBYTE, c:SETcc, w:W|R, f:CNS, a:COND
|
||||
SETP Eb Fv [ 0x0F 0x9A /r] s:I386, t:BITBYTE, c:SETcc, w:W|R, f:CP, a:COND
|
||||
@ -465,7 +466,9 @@ SHRD Ev,Gv,Ib Fv [ 0x0F 0xAC /r
|
||||
SHRD Ev,Gv,CL Fv [ 0x0F 0xAD /r] s:I386, t:SHIFT, w:RCW|R|R|W, f:SHIFTD
|
||||
|
||||
FXSAVE Mrx BANK [ NP 0x0F 0xAE /0:mem] s:FXSAVE, t:SSE, w:W|R
|
||||
FXSAVE64 Mrx BANK [ rexw NP 0x0F 0xAE /0:mem] s:FXSAVE, t:SSE, w:W|R
|
||||
FXRSTOR Mrx BANK [ NP 0x0F 0xAE /1:mem] s:FXSAVE, t:SSE, w:R|W
|
||||
FXRSTOR64 Mrx BANK [ rexw NP 0x0F 0xAE /1:mem] s:FXSAVE, t:SSE, w:R|W
|
||||
LDMXCSR Md MXCSR [ NP 0x0F 0xAE /2:mem] s:SSE, t:SSE, w:R|W
|
||||
STMXCSR Md MXCSR [ NP 0x0F 0xAE /3:mem] s:SSE, t:SSE, w:W|R
|
||||
XSAVE M? EDX,EAX,XCR0,BANK [ NP 0x0F 0xAE /4:mem] s:XSAVE, t:XSAVE, c:XSAVE, w:W|R|R|R|R
|
||||
@ -554,7 +557,7 @@ RDRAND Rv Fv [ 0x0F 0xC7 /6
|
||||
RDRAND Rv Fv [ 0x66 0x0F 0xC7 /6:reg] s:RDRAND, t:RDRAND, a:S66, w:W|W, f:CF=m|PF=0|AF=0|ZF=0|SF=0|OF=0
|
||||
RDSEED Rv Fv [ 0x0F 0xC7 /7:reg] s:RDSEED, t:RDSEED, w:W|W, f:CF=m|PF=0|AF=0|ZF=0|SF=0|OF=0
|
||||
RDSEED Rv Fv [ 0x66 0x0F 0xC7 /7:reg] s:RDSEED, t:RDSEED, a:S66, w:W|W, f:CF=m|PF=0|AF=0|ZF=0|SF=0|OF=0
|
||||
RDPID Rv TSCAUX [ 0xF3 0x0F 0xC7 /7:reg] s:RDPID, t:RDPID, w:W|R
|
||||
RDPID Ryf TSCAUX [ 0xF3 0x0F 0xC7 /7:reg] s:RDPID, t:RDPID, w:W|R
|
||||
|
||||
BSWAP Zv nil [ 0x0F 0xC8] s:I486REAL, t:DATAXFER, w:RW
|
||||
BSWAP Zv nil [ 0x0F 0xC9] s:I486REAL, t:DATAXFER, w:RW
|
||||
@ -614,7 +617,7 @@ PMULHUW Vx,Wx nil [ 0x66 0x0F 0xE4 /r
|
||||
PMULHW Pq,Qq nil [ NP 0x0F 0xE5 /r] s:MMX, t:MMX, w:RW|R
|
||||
PMULHW Vx,Wx nil [ 0x66 0x0F 0xE5 /r] s:SSE2, t:SSE, w:RW|R, e:4
|
||||
CVTTPD2DQ Vx,Wpd nil [ 0x66 0x0F 0xE6 /r] s:SSE2, t:CONVERT, w:W|R, e:2
|
||||
CVTDQ2PD Vx,Wpd nil [ 0xF3 0x0F 0xE6 /r] s:SSE2, t:CONVERT, w:W|R, e:5
|
||||
CVTDQ2PD Vx,Wq nil [ 0xF3 0x0F 0xE6 /r] s:SSE2, t:CONVERT, w:W|R, e:5
|
||||
CVTPD2DQ Vx,Wpd nil [ 0xF2 0x0F 0xE6 /r] s:SSE2, t:CONVERT, w:W|R, e:2
|
||||
MOVNTQ Mq,Pq nil [ NP 0x0F 0xE7 /r:mem] s:MMX, t:DATAXFER, w:W|R
|
||||
MOVNTDQ Mx,Vx nil [ 0x66 0x0F 0xE7 /r:mem] s:SSE2, t:DATAXFER, w:W|R, e:1
|
||||
|
||||
@ -10,7 +10,7 @@ PFNACC Pq,Qq nil [0x0F 0x0F /r 0x8A] s:3DNOW,
|
||||
PFPNACC Pq,Qq nil [0x0F 0x0F /r 0x8E] s:3DNOW, t:3DNOW, w:RW|R, a:3DNOW
|
||||
PFCMPGE Pq,Qq nil [0x0F 0x0F /r 0x90] s:3DNOW, t:3DNOW, w:RW|R, a:3DNOW
|
||||
PFMIN Pq,Qq nil [0x0F 0x0F /r 0x94] s:3DNOW, t:3DNOW, w:RW|R, a:3DNOW
|
||||
PFMIN Pq,Qq nil [0x0F 0x0F /r 0x96] s:3DNOW, t:3DNOW, w:RW|R, a:3DNOW
|
||||
PFRCP Pq,Qq nil [0x0F 0x0F /r 0x96] s:3DNOW, t:3DNOW, w:RW|R, a:3DNOW
|
||||
PFRSQRT Pq,Qq nil [0x0F 0x0F /r 0x97] s:3DNOW, t:3DNOW, w:RW|R, a:3DNOW
|
||||
PFSUB Pq,Qq nil [0x0F 0x0F /r 0x9A] s:3DNOW, t:3DNOW, w:RW|R, a:3DNOW
|
||||
PFADD Pq,Qq nil [0x0F 0x0F /r 0x9E] s:3DNOW, t:3DNOW, w:RW|R, a:3DNOW
|
||||
|
||||
@ -110,8 +110,10 @@ POP Zv Kv [ 0x5E] s:I86
|
||||
POP Zv Kv [ 0x5F] s:I86, t:POP, w:W|R, a:D64
|
||||
|
||||
# 0x60 - 0x6F
|
||||
PUSHA nil BANK,Kv8 [ 0x60] s:I386, t:PUSH, w:R|W, m:NO64
|
||||
POPA nil BANK,Kv8 [ 0x61] s:I386, t:POP, w:W|R, m:NO64
|
||||
PUSHA nil BANK,Kv8 [ ds16 0x60] s:I386, t:PUSH, w:R|W, m:NO64
|
||||
PUSHAD nil BANK,Kv8 [ ds32 0x60] s:I386, t:PUSH, w:R|W, m:NO64
|
||||
POPA nil BANK,Kv8 [ ds16 0x61] s:I386, t:POP, w:W|R, m:NO64
|
||||
POPAD nil BANK,Kv8 [ ds32 0x61] s:I386, t:POP, w:W|R, m:NO64
|
||||
BOUND Gv,Ma nil [ 0x62 /r:mem] s:I186, t:INTERRUPT, w:R|R, m:NO64
|
||||
ARPL Ew,Gw Fv [ 0x63 /r] s:I286PROT, t:SYSTEM, w:RW|R|W, f:ZF=m, m:NOREAL|NO64
|
||||
MOVSXD Gv,Ez nil [ o64 0x63 /r] s:LONGMODE, t:DATAXFER, w:W|R, m:O64
|
||||
@ -174,14 +176,14 @@ SUB Ev,Iz Fv [ 0x81 /5 iz] s:I86
|
||||
XOR Ev,Iz Fv [ 0x81 /6 iz] s:I86, t:LOGIC, w:RW|R|W, f:LOGIC, a:OP2SEXO1, p:HLE|LOCK
|
||||
CMP Ev,Iz Fv [ 0x81 /7 iz] s:I86, t:ARITH, w:R|R|W, f:ARITH, a:OP2SEXO1
|
||||
|
||||
ADD Ev,Iz Fv [ 0x82 /0 iz] s:I86, t:ARITH, w:RW|R|W, f:ARITH, a:OP2SEXO1, m:NO64, p:HLE|LOCK
|
||||
OR Ev,Iz Fv [ 0x82 /1 iz] s:I86, t:LOGIC, w:RW|R|W, f:LOGIC, a:OP2SEXO1, m:NO64, p:HLE|LOCK
|
||||
ADC Ev,Iz Fv [ 0x82 /2 iz] s:I86, t:ARITH, w:RW|R|RW, f:ARITHC, a:OP2SEXO1, m:NO64, p:HLE|LOCK
|
||||
SBB Ev,Iz Fv [ 0x82 /3 iz] s:I86, t:ARITH, w:RW|R|RW, f:ARITHC, a:OP2SEXO1, m:NO64, p:HLE|LOCK
|
||||
AND Ev,Iz Fv [ 0x82 /4 iz] s:I86, t:LOGIC, w:RW|R|W, f:LOGIC, a:OP2SEXO1, m:NO64, p:HLE|LOCK
|
||||
SUB Ev,Iz Fv [ 0x82 /5 iz] s:I86, t:ARITH, w:RW|R|W, f:ARITH, a:OP2SEXO1, m:NO64, p:HLE|LOCK
|
||||
XOR Ev,Iz Fv [ 0x82 /6 iz] s:I86, t:LOGIC, w:RW|R|W, f:LOGIC, a:OP2SEXO1, m:NO64, p:HLE|LOCK
|
||||
CMP Ev,Iz Fv [ 0x82 /7 iz] s:I86, t:ARITH, w:R|R|W, f:ARITH, a:OP2SEXO1, m:NO64
|
||||
ADD Eb,Ib Fv [ 0x82 /0 iz] s:I86, t:ARITH, w:RW|R|W, f:ARITH, a:OP2SEXO1, m:NO64, p:HLE|LOCK
|
||||
OR Eb,Ib Fv [ 0x82 /1 iz] s:I86, t:LOGIC, w:RW|R|W, f:LOGIC, a:OP2SEXO1, m:NO64, p:HLE|LOCK
|
||||
ADC Eb,Ib Fv [ 0x82 /2 iz] s:I86, t:ARITH, w:RW|R|RW, f:ARITHC, a:OP2SEXO1, m:NO64, p:HLE|LOCK
|
||||
SBB Eb,Ib Fv [ 0x82 /3 iz] s:I86, t:ARITH, w:RW|R|RW, f:ARITHC, a:OP2SEXO1, m:NO64, p:HLE|LOCK
|
||||
AND Eb,Ib Fv [ 0x82 /4 iz] s:I86, t:LOGIC, w:RW|R|W, f:LOGIC, a:OP2SEXO1, m:NO64, p:HLE|LOCK
|
||||
SUB Eb,Ib Fv [ 0x82 /5 iz] s:I86, t:ARITH, w:RW|R|W, f:ARITH, a:OP2SEXO1, m:NO64, p:HLE|LOCK
|
||||
XOR Eb,Ib Fv [ 0x82 /6 iz] s:I86, t:LOGIC, w:RW|R|W, f:LOGIC, a:OP2SEXO1, m:NO64, p:HLE|LOCK
|
||||
CMP Eb,Ib Fv [ 0x82 /7 iz] s:I86, t:ARITH, w:R|R|W, f:ARITH, a:OP2SEXO1, m:NO64
|
||||
|
||||
ADD Ev,Ib Fv [ 0x83 /0 ib] s:I86, t:ARITH, w:RW|R|W, f:ARITH, a:OP2SEXO1, p:HLE|LOCK
|
||||
OR Ev,Ib Fv [ 0x83 /1 ib] s:I86, t:LOGIC, w:RW|R|W, f:LOGIC, a:OP2SEXO1, p:HLE|LOCK
|
||||
@ -324,17 +326,17 @@ SHL Ev,Ib Fv [ 0xC1 /4 ib] s:I86
|
||||
SHR Ev,Ib Fv [ 0xC1 /5 ib] s:I86, t:SHIFT, w:RW|R|W, f:SHIFT
|
||||
SAL Ev,Ib Fv [ 0xC1 /6 ib] s:I86, t:SHIFT, w:RW|R|W, f:SHIFT
|
||||
SAR Ev,Ib Fv [ 0xC1 /7 ib] s:I86, t:SHIFT, w:RW|R|W, f:SHIFT
|
||||
RETN Iw rIP,sSP,Kv,SHS1 [ 0xC2 iw] s:I86, t:RET, w:R|W|W|R|R, a:F64|OP1SEXDW, p:BND
|
||||
RETN Iw rIP,sSP,Kv,SHS1 [ 0xC2 iw] s:I86, t:RET, w:R|W|W|R|R, a:F64, p:BND
|
||||
RETN nil rIP,Kv,SHS1 [ 0xC3] s:I86, t:RET, w:W|R|R, a:F64, p:BND
|
||||
LES Gz,Mp ES [ 0xC4 /r:mem] s:I86, t:SEGOP, w:W|R|W, m:NO64|NOSGX
|
||||
LDS Gz,Mp DS [ 0xC5 /r:mem] s:I86, t:SEGOP, w:W|R|W, m:NO64|NOSGX
|
||||
MOV Eb,Ib nil [ 0xC6 /0 ib] s:I86, t:DATAXFER, w:W|R, p:XRELEASE|HLEWOL
|
||||
XABORT Ib EAX [ 0xC6 /0xF8 ib] s:TSX, t:UNCOND_BR, w:R|RCW, i:RTM, m:NOTSX
|
||||
MOV Ev,Iz nil [ 0xC7 /0 iz] s:I86, t:DATAXFER, w:W|R, a:OP2SEXO1, p:XRELEASE|HLEWOL
|
||||
XBEGIN Jz rIP,EAX [ 0xC7 /0xF8 cz] s:TSX, t:COND_BR, w:R|RW|CW, i:RTM
|
||||
XBEGIN Jz yIP,EAX [ 0xC7 /0xF8 cz] s:TSX, t:COND_BR, w:R|RW|CW, i:RTM
|
||||
ENTER Iw,Ib rBP,sSP,Kv [ 0xC8 iw ib] s:I186, t:MISC, w:R|R|RW|RW|W
|
||||
LEAVE nil sBP,rBP,rSP,Kv [ 0xC9] s:I186, t:MISC, w:R|RW|RW|R, a:D64
|
||||
RETF Iw CS,rIP,Kv2,SHS2 [ 0xCA iw] s:I86, t:RET, a:OP1SEXDW, w:R|W|W|R|R
|
||||
RETF Iw CS,rIP,Kv2,SHS2 [ 0xCA iw] s:I86, t:RET, w:R|W|W|R|R
|
||||
RETF nil CS,rIP,Kv2,SHS2 [ 0xCB] s:I86, t:RET, w:W|W|R|R
|
||||
INT3 nil CS,rIP,Kv3,Fv,SHS3 [ 0xCC] s:I86, t:INTERRUPT, w:RW|RW|RW|W|W, f:INT, m:NOSGX
|
||||
INT Ib CS,rIP,Kv3,Fv,SHS3 [ 0xCD ib] s:I86, t:INTERRUPT, w:R|RW|RW|RW|W|W, f:INT, m:NOSGX
|
||||
|
||||
@ -39,7 +39,7 @@ VMOVAPD Vn{K}{z},Wn nil [evex m:1 p:1 l:x w:
|
||||
VMOVAPS Wn{K}{z},Vn nil [evex m:1 p:0 l:x w:0 0x29 /r] s:AVX512F, t:DATAXFER, l:fvm, e:E1, w:W|R|R
|
||||
VMOVAPD Wn{K}{z},Vn nil [evex m:1 p:1 l:x w:1 0x29 /r] s:AVX512F, t:DATAXFER, l:fvm, e:E1, w:W|R|R
|
||||
VCVTSI2SS Vdq,Hdq{er},Ey nil [evex m:1 p:2 l:i w:x 0x2A /r] s:AVX512F, t:CONVERT, l:t1s, e:E3, w:W|R|R
|
||||
VCVTSI2SD Vdq,Hdq{er},Ey nil [evex m:1 p:3 l:i w:0 0x2A /r] s:AVX512F, t:CONVERT, l:t1s, e:E10NF, w:W|R|R
|
||||
VCVTSI2SD Vdq,Hdq,Ey nil [evex m:1 p:3 l:i w:0 0x2A /r] s:AVX512F, t:CONVERT, l:t1s, e:E10NF, w:W|R|R, a:IER
|
||||
VCVTSI2SD Vdq,Hdq{er},Ey nil [evex m:1 p:3 l:i w:1 0x2A /r] s:AVX512F, t:CONVERT, l:t1s, e:E3, w:W|R|R
|
||||
VMOVNTPS Mn,Vn nil [evex m:1 p:0 l:x w:0 0x2B /r:mem] s:AVX512F, t:DATAXFER, l:fvm, e:E1NF, w:W|R
|
||||
VMOVNTPD Mn,Vn nil [evex m:1 p:1 l:x w:1 0x2B /r:mem] s:AVX512F, t:DATAXFER, l:fvm, e:E1NF, w:W|R
|
||||
@ -126,9 +126,9 @@ VMOVDQU16 Vn{K}{z},Wn nil [evex m:1 p:3 l:x w:
|
||||
VPSHUFD Vn{K}{z},Wn|B32,Ib nil [evex m:1 p:1 l:x w:0 0x70 /r ib] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:W|R|R|R
|
||||
VPSHUFHW Vn{K}{z},Wn,Ib nil [evex m:1 p:2 l:x w:i 0x70 /r ib] s:AVX512BW, t:AVX512, l:fvm, e:E4NFnb, w:W|R|R|R
|
||||
VPSHUFLW Vn{K}{z},Wn,Ib nil [evex m:1 p:3 l:x w:i 0x70 /r ib] s:AVX512BW, t:AVX512, l:fvm, e:E4NFnb, w:W|R|R|R
|
||||
VPSRLW Hn{K}{z},Wn,Ib nil [evex m:1 p:1 l:x w:i 0x71 /2 ib] s:AVX512BW, t:AVX512, l:m128, e:E4nb, w:W|R|R|R
|
||||
VPSRAW Hn{K}{z},Wn,Ib nil [evex m:1 p:1 l:x w:i 0x71 /4 ib] s:AVX512BW, t:AVX512, l:m128, e:E4nb, w:W|R|R|R
|
||||
VPSLLW Hn{K}{z},Wn,Ib nil [evex m:1 p:1 l:x w:i 0x71 /6 ib] s:AVX512BW, t:AVX512, l:m128, e:E4nb, w:W|R|R|R
|
||||
VPSRLW Hn{K}{z},Wn,Ib nil [evex m:1 p:1 l:x w:i 0x71 /2 ib] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
||||
VPSRAW Hn{K}{z},Wn,Ib nil [evex m:1 p:1 l:x w:i 0x71 /4 ib] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
||||
VPSLLW Hn{K}{z},Wn,Ib nil [evex m:1 p:1 l:x w:i 0x71 /6 ib] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
||||
VPRORD Hn{K}{z},Wn|B32,Ib nil [evex m:1 p:1 l:x w:0 0x72 /0 ib] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
||||
VPRORQ Hn{K}{z},Wn|B64,Ib nil [evex m:1 p:1 l:x w:1 0x72 /0 ib] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
||||
VPROLD Hn{K}{z},Wn|B32,Ib nil [evex m:1 p:1 l:x w:0 0x72 /1 ib] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
||||
@ -153,19 +153,19 @@ VCVTTSD2USI Gy,Wsd{sae} nil [evex m:1 p:3 l:i w:
|
||||
VCVTPS2UDQ Vn{K}{z},Wn|B32{er} nil [evex m:1 p:0 l:x w:0 0x79 /r] s:AVX512F, t:CONVERT, l:fv, e:E2, w:W|R|R
|
||||
VCVTPD2UDQ Vh{K}{z},Wn|B64{er} nil [evex m:1 p:0 l:x w:1 0x79 /r] s:AVX512F, t:CONVERT, l:fv, e:E2, w:W|R|R
|
||||
VCVTPS2UQQ Vn{K}{z},Wh|B32{er} nil [evex m:1 p:1 l:x w:0 0x79 /r] s:AVX512DQ, t:CONVERT, l:hv, e:E3, w:W|R|R
|
||||
VCVTPD2UQQ Vn{K}{z},Wn|B64{er} nil [evex m:1 p:1 l:x w:1 0x79 /r] s:AVX512DQ, t:CONVERT, l:hv, e:E2, w:W|R|R
|
||||
VCVTPD2UQQ Vn{K}{z},Wn|B64{er} nil [evex m:1 p:1 l:x w:1 0x79 /r] s:AVX512DQ, t:CONVERT, l:fv, e:E2, w:W|R|R
|
||||
VCVTSS2USI Gy,Wss{er} nil [evex m:1 p:2 l:i w:x 0x79 /r] s:AVX512F, t:CONVERT, l:t1f, e:E3, w:W|R
|
||||
VCVTSD2USI Gy,Wsd{er} nil [evex m:1 p:3 l:i w:x 0x79 /r] s:AVX512F, t:CONVERT, l:t1f, e:E3, w:W|R
|
||||
VCVTTPS2QQ Vn{K}{z},Wh|B32{sae} nil [evex m:1 p:1 l:x w:0 0x7A /r] s:AVX512DQ, t:CONVERT, l:hv, e:E3, w:W|R|R
|
||||
VCVTTPD2QQ Vn{K}{z},Wn|B64{sae} nil [evex m:1 p:1 l:x w:1 0x7A /r] s:AVX512DQ, t:CONVERT, l:fv, e:E2, w:W|R|R
|
||||
VCVTUDQ2PD Vn{K}{z},Wh|B32 nil [evex m:1 p:2 l:x w:0 0x7A /r] s:AVX512F, t:CONVERT, l:hv, e:E5, w:W|R|R
|
||||
VCVTUDQ2PD Vn{K}{z},Wh|B32 nil [evex m:1 p:2 l:x w:0 0x7A /r] s:AVX512F, t:CONVERT, l:hv, e:E5, w:W|R|R, a:IER
|
||||
VCVTUQQ2PD Vn{K}{z},Wn|B64{er} nil [evex m:1 p:2 l:x w:1 0x7A /r] s:AVX512DQ, t:CONVERT, l:fv, e:E2, w:W|R|R
|
||||
VCVTUDQ2PS Vn{K}{z},Wn|B32{er} nil [evex m:1 p:3 l:x w:0 0x7A /r] s:AVX512F, t:CONVERT, l:fv, e:E2, w:W|R|R
|
||||
VCVTUQQ2PS Vh{K}{z},Wn|B64{er} nil [evex m:1 p:3 l:x w:1 0x7A /r] s:AVX512DQ, t:CONVERT, l:fv, e:E2, w:W|R|R
|
||||
VCVTPS2QQ Vn{K}{z},Wh|B32{er} nil [evex m:1 p:1 l:x w:0 0x7B /r] s:AVX512DQ, t:CONVERT, l:hv, e:E3, w:W|R|R
|
||||
VCVTPD2QQ Vn{K}{z},Wn|B64{er} nil [evex m:1 p:1 l:x w:1 0x7B /r] s:AVX512DQ, t:CONVERT, l:fv, e:E2, w:W|R|R
|
||||
VCVTUSI2SS Vss,Hss{er},Ey nil [evex m:1 p:2 l:i w:x 0x7B /r] s:AVX512F, t:CONVERT, l:t1s, e:E3, w:W|R|R
|
||||
VCVTUSI2SD Vdq,Hdq{er},Ey nil [evex m:1 p:3 l:i w:0 0x7B /r] s:AVX512F, t:CONVERT, l:t1s, e:E10NF, w:W|R|R
|
||||
VCVTUSI2SD Vdq,Hdq,Ey nil [evex m:1 p:3 l:i w:0 0x7B /r] s:AVX512F, t:CONVERT, l:t1s, e:E10NF, w:W|R|R, a:IER
|
||||
VCVTUSI2SD Vdq,Hdq{er},Ey nil [evex m:1 p:3 l:i w:1 0x7B /r] s:AVX512F, t:CONVERT, l:t1s, e:E3, w:W|R|R
|
||||
VMOVD Ey,Vdq nil [evex m:1 p:1 l:0 w:0 0x7E /r] s:AVX512F, t:DATAXFER, l:t1s, e:E9NF, w:W|R
|
||||
VMOVQ Ey,Vdq nil [evex m:1 p:1 l:0 w:1 0x7E /r] s:AVX512F, t:DATAXFER, l:t1s, e:E9NF, w:W|R
|
||||
@ -190,8 +190,8 @@ VCMPPS rKq{K},Hn,Wn|B32{sae},Ib nil [evex m:1 p:0 l:x w:
|
||||
VCMPPD rKq{K},Hn,Wn|B64{sae},Ib nil [evex m:1 p:1 l:x w:1 0xC2 /r ib] s:AVX512F, t:AVX512, l:fv, e:E2, w:W|R|R|R|R
|
||||
VCMPSS rKq{K},Hdq,Wss{sae},Ib nil [evex m:1 p:2 l:x w:0 0xC2 /r ib] s:AVX512F, t:AVX512, l:t1s, e:E3, w:W|R|R|R|R
|
||||
VCMPSD rKq{K},Hdq,Wsd{sae},Ib nil [evex m:1 p:3 l:x w:1 0xC2 /r ib] s:AVX512F, t:AVX512, l:t1s, e:E3, w:W|R|R|R|R
|
||||
VPINSRW Vdq,Hdq,Mw,Ib nil [evex m:1 p:1 l:0 w:i 0xC4 /r:mem ib] s:AVX512BW, t:AVX512, l:t1s, e:E9NF, w:W|R|R|R
|
||||
VPINSRW Vdq,Hdq,Rv,Ib nil [evex m:1 p:1 l:0 w:i 0xC4 /r:reg ib] s:AVX512BW, t:AVX512, l:t1s, e:E9NF, w:W|R|R|R
|
||||
VPINSRW Vdq,Hdq,Mw,Ib nil [evex m:1 p:1 l:0 w:i 0xC4 /r:mem ib] s:AVX512BW, t:AVX512, l:t1s16, e:E9NF, w:W|R|R|R
|
||||
VPINSRW Vdq,Hdq,Rv,Ib nil [evex m:1 p:1 l:0 w:i 0xC4 /r:reg ib] s:AVX512BW, t:AVX512, l:t1s16, e:E9NF, w:W|R|R|R
|
||||
VPEXTRW Gy,Udq,Ib nil [evex m:1 p:1 l:0 w:i 0xC5 /r:reg ib] s:AVX512BW, t:AVX512, l:t1s, e:E9NF, w:W|R|R
|
||||
VSHUFPS Vn{K}{z},Hn,Wn|B32,Ib nil [evex m:1 p:0 l:x w:0 0xC6 /r ib] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:W|R|R|R|R
|
||||
VSHUFPD Vn{K}{z},Hn,Wn|B64,Ib nil [evex m:1 p:1 l:x w:1 0xC6 /r ib] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:W|R|R|R|R
|
||||
@ -223,7 +223,7 @@ VPAVGW Vn{K}{z},Hn,Wn nil [evex m:1 p:1 l:x w:
|
||||
VPMULHUW Vn{K}{z},Hn,Wn nil [evex m:1 p:1 l:x w:i 0xE4 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
||||
VPMULHW Vn{K}{z},Hn,Wn nil [evex m:1 p:1 l:x w:i 0xE5 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
||||
VCVTTPD2DQ Vh{K}{z},Wn|B64{sae} nil [evex m:1 p:1 l:x w:1 0xE6 /r] s:AVX512F, t:CONVERT, l:fv, e:E2, w:W|R|R
|
||||
VCVTDQ2PD Vn{K}{z},Wh|B32 nil [evex m:1 p:2 l:x w:0 0xE6 /r] s:AVX512F, t:CONVERT, l:hv, e:E5, w:W|R|R
|
||||
VCVTDQ2PD Vn{K}{z},Wh|B32 nil [evex m:1 p:2 l:x w:0 0xE6 /r] s:AVX512F, t:CONVERT, l:hv, e:E5, w:W|R|R, a:IER
|
||||
VCVTQQ2PD Vn{K}{z},Wn|B64{er} nil [evex m:1 p:2 l:x w:1 0xE6 /r] s:AVX512DQ, t:CONVERT, l:fv, e:E2, w:W|R|R
|
||||
VCVTPD2DQ Vh{K}{z},Wn|B64{er} nil [evex m:1 p:3 l:x w:1 0xE6 /r] s:AVX512F, t:CONVERT, l:fv, e:E2, w:W|R|R
|
||||
VMOVNTDQ Mn,Vn nil [evex m:1 p:1 l:x w:0 0xE7 /r:mem] s:AVX512F, t:DATAXFER, l:fvm, e:E1NF, w:W|R
|
||||
|
||||
@ -152,10 +152,10 @@ VBROADCASTI32X8 Voq{K}{z},Mqq nil [evex m:2 p:1 l:2 w:
|
||||
VBROADCASTI64X4 Voq{K}{z},Mqq nil [evex m:2 p:1 l:2 w:1 0x5B /r:mem] s:AVX512F, t:BROADCAST, l:t4, e:E6, w:W|R|R
|
||||
|
||||
# 0x60 - 0x6F
|
||||
VPEXPANDB Vn{K}{z},Wn nil [evex m:2 p:1 l:x w:0 0x62 /r] s:AVX512VBMI2, t:AVX512VBMI, l:t1s, e:E4, w:W|R|R
|
||||
VPEXPANDW Vn{K}{z},Wn nil [evex m:2 p:1 l:x w:1 0x62 /r] s:AVX512VBMI2, t:AVX512VBMI, l:t1s, e:E4, w:W|R|R
|
||||
VPCOMPRESSB Wn{K}{z},Vn nil [evex m:2 p:1 l:x w:0 0x63 /r] s:AVX512VBMI2, t:AVX512VBMI, l:t1s, a:NOMZ, e:E4, w:W|R|R
|
||||
VPCOMPRESSW Wn{K}{z},Vn nil [evex m:2 p:1 l:x w:1 0x63 /r] s:AVX512VBMI2, t:AVX512VBMI, l:t1s, a:NOMZ, e:E4, w:W|R|R
|
||||
VPEXPANDB Vn{K}{z},Wn nil [evex m:2 p:1 l:x w:0 0x62 /r] s:AVX512VBMI2, t:AVX512VBMI, l:t1s8, e:E4, w:W|R|R
|
||||
VPEXPANDW Vn{K}{z},Wn nil [evex m:2 p:1 l:x w:1 0x62 /r] s:AVX512VBMI2, t:AVX512VBMI, l:t1s16, e:E4, w:W|R|R
|
||||
VPCOMPRESSB Wn{K}{z},Vn nil [evex m:2 p:1 l:x w:0 0x63 /r] s:AVX512VBMI2, t:AVX512VBMI, l:t1s8, a:NOMZ, e:E4, w:W|R|R
|
||||
VPCOMPRESSW Wn{K}{z},Vn nil [evex m:2 p:1 l:x w:1 0x63 /r] s:AVX512VBMI2, t:AVX512VBMI, l:t1s16, a:NOMZ, e:E4, w:W|R|R
|
||||
VPBLENDMD Vn{K}{z},Hn,Wn|B32 nil [evex m:2 p:1 l:x w:0 0x64 /r] s:AVX512F, t:BLEND, l:fv, e:E4, w:W|R|R|R
|
||||
VPBLENDMQ Vn{K}{z},Hn,Wn|B64 nil [evex m:2 p:1 l:x w:1 0x64 /r] s:AVX512F, t:BLEND, l:fv, e:E4, w:W|R|R|R
|
||||
VBLENDMPS Vn{K}{z},Hn,Wn|B32 nil [evex m:2 p:1 l:x w:0 0x65 /r] s:AVX512F, t:BLEND, l:fv, e:E4, w:W|R|R|R
|
||||
@ -171,7 +171,7 @@ VPSHLDVW Vn{K}{z},Hn,Wn nil [evex m:2 p:1 l:x w:
|
||||
VPSHLDVD Vn{K}{z},Hn,Wn|B32 nil [evex m:2 p:1 l:x w:0 0x71 /r] s:AVX512VBMI2, t:AVX512VBMI, l:fv, e:E4, w:RW|R|R|R
|
||||
VPSHLDVQ Vn{K}{z},Hn,Wn|B64 nil [evex m:2 p:1 l:x w:1 0x71 /r] s:AVX512VBMI2, t:AVX512VBMI, l:fv, e:E4, w:RW|R|R|R
|
||||
VPSHRDVW Vn{K}{z},Hn,Wn nil [evex m:2 p:1 l:x w:1 0x72 /r] s:AVX512VBMI2, t:AVX512VBMI, l:fvm, e:E4, w:RW|R|R|R
|
||||
VCVTNEPS2BF16 Vh{K}{z},Wn nil [evex m:2 p:2 l:x w:0 0x72 /r] s:AVX512BF16, t:AVX512BF16, l:fv, e:E4, w:W|R|R
|
||||
VCVTNEPS2BF16 Vh{K}{z},Wn|B32 nil [evex m:2 p:2 l:x w:0 0x72 /r] s:AVX512BF16, t:AVX512BF16, l:fv, e:E4, w:W|R|R
|
||||
VCVTNE2PS2BF16 Vn{K}{z},Hn,Wn|B32 nil [evex m:2 p:3 l:x w:0 0x72 /r] s:AVX512BF16, t:AVX512BF16, l:fv, e:E4NF, w:W|R|R|R
|
||||
VPSHRDVD Vn{K}{z},Hn,Wn|B32 nil [evex m:2 p:1 l:x w:0 0x73 /r] s:AVX512VBMI2, t:AVX512VBMI, l:fv, e:E4, w:RW|R|R|R
|
||||
VPSHRDVQ Vn{K}{z},Hn,Wn|B64 nil [evex m:2 p:1 l:x w:1 0x73 /r] s:AVX512VBMI2, t:AVX512VBMI, l:fv, e:E4, w:RW|R|R|R
|
||||
|
||||
@ -14,10 +14,10 @@ VRNDSCALESD Vdq{K}{z},Hdq,Wsd{sae},Ib nil [evex m:3 p:1 l:i w:
|
||||
VPALIGNR Vn{K}{z},Hn,Wn,Ib nil [evex m:3 p:1 l:x w:i 0x0F /r ib] s:AVX512BW, t:AVX512, l:fvm, e:E4NFnb, w:W|R|R|R|R
|
||||
|
||||
# 0x10 - 0x1F
|
||||
VPEXTRB Mb,Vdq,Ib nil [evex m:3 p:1 l:0 w:i 0x14 /r:mem ib] s:AVX512BW, t:AVX512, l:t1s, e:E9NF, w:W|R|R
|
||||
VPEXTRB Ry,Vdq,Ib nil [evex m:3 p:1 l:0 w:i 0x14 /r:reg ib] s:AVX512BW, t:AVX512, l:t1s, e:E9NF, w:W|R|R
|
||||
VPEXTRW Mw,Vdq,Ib nil [evex m:3 p:1 l:0 w:i 0x15 /r:mem ib] s:AVX512BW, t:AVX512, l:t1s, e:E9NF, w:W|R|R
|
||||
VPEXTRW Ry,Vdq,Ib nil [evex m:3 p:1 l:0 w:i 0x15 /r:reg ib] s:AVX512BW, t:AVX512, l:t1s, e:E9NF, w:W|R|R
|
||||
VPEXTRB Mb,Vdq,Ib nil [evex m:3 p:1 l:0 w:i 0x14 /r:mem ib] s:AVX512BW, t:AVX512, l:t1s8, e:E9NF, w:W|R|R
|
||||
VPEXTRB Ry,Vdq,Ib nil [evex m:3 p:1 l:0 w:i 0x14 /r:reg ib] s:AVX512BW, t:AVX512, l:t1s8, e:E9NF, w:W|R|R
|
||||
VPEXTRW Mw,Vdq,Ib nil [evex m:3 p:1 l:0 w:i 0x15 /r:mem ib] s:AVX512BW, t:AVX512, l:t1s16, e:E9NF, w:W|R|R
|
||||
VPEXTRW Ry,Vdq,Ib nil [evex m:3 p:1 l:0 w:i 0x15 /r:reg ib] s:AVX512BW, t:AVX512, l:t1s16, e:E9NF, w:W|R|R
|
||||
VPEXTRD Ed,Vdq,Ib nil [evex m:3 p:1 l:0 w:0 0x16 /r ib] s:AVX512DQ, t:AVX512, l:t1s, e:E9NF, w:W|R|R
|
||||
VPEXTRQ Eq,Vdq,Ib nil [evex m:3 p:1 l:0 w:1 0x16 /r ib] s:AVX512DQ, t:AVX512, l:t1s, e:E9NF, w:W|R|R
|
||||
VEXTRACTPS Md,Vdq,Ib nil [evex m:3 p:1 l:0 w:i 0x17 /r:mem ib] s:AVX512F, t:AVX512, l:t1s, e:E9NF, w:W|R|R
|
||||
@ -37,8 +37,8 @@ VPCMPD rKq{K},Hn,Wn|B32,Ib nil [evex m:3 p:1 l:x w:
|
||||
VPCMPQ rKq{K},Hn,Wn|B64,Ib nil [evex m:3 p:1 l:x w:1 0x1F /r ib] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R|R
|
||||
|
||||
# 0x20 - 0x2F
|
||||
VPINSRB Vdq,Hdq,Mb,Ib nil [evex m:3 p:1 l:0 w:i 0x20 /r:mem ib] s:AVX512BW, t:AVX512, l:t1s, e:E9NF, w:W|R|R|R
|
||||
VPINSRB Vdq,Hdq,Rd,Ib nil [evex m:3 p:1 l:0 w:i 0x20 /r:reg ib] s:AVX512BW, t:AVX512, l:t1s, e:E9NF, w:W|R|R|R
|
||||
VPINSRB Vdq,Hdq,Mb,Ib nil [evex m:3 p:1 l:0 w:i 0x20 /r:mem ib] s:AVX512BW, t:AVX512, l:t1s8, e:E9NF, w:W|R|R|R
|
||||
VPINSRB Vdq,Hdq,Rd,Ib nil [evex m:3 p:1 l:0 w:i 0x20 /r:reg ib] s:AVX512BW, t:AVX512, l:t1s8, e:E9NF, w:W|R|R|R
|
||||
VINSERTPS Vdq,Hdq,Md,Ib nil [evex m:3 p:1 l:0 w:i 0x21 /r:mem ib] s:AVX512F, t:AVX512, l:t1s, e:E9NF, w:W|R|R|R
|
||||
VINSERTPS Vdq,Hdq,Udq,Ib nil [evex m:3 p:1 l:0 w:i 0x21 /r:reg ib] s:AVX512F, t:AVX512, l:t1s, e:E9NF, w:W|R|R|R
|
||||
VPINSRD Vdq,Hdq,Ed,Ib nil [evex m:3 p:1 l:0 w:0 0x22 /r ib] s:AVX512DQ, t:AVX512, l:t1s, e:E9NF, w:W|R|R|R
|
||||
|
||||
@ -108,8 +108,8 @@ FDIV ST(0),Mfq X87STATUS [0xDC /6:mem] s
|
||||
FDIVR ST(0),Mfq X87STATUS [0xDC /7:mem] s:X87, t:X87_ALU, w:RW|R|W, u:C1=m
|
||||
FADD ST(i),ST(0) X87STATUS [0xDC /0:reg] s:X87, t:X87_ALU, w:RW|R|W, u:C1=m
|
||||
FMUL ST(i),ST(0) X87STATUS [0xDC /1:reg] s:X87, t:X87_ALU, w:RW|R|W, u:C1=m
|
||||
FCOM ST(i),ST(0) X87STATUS [0xDC /2:reg] s:X87, t:X87_ALU, w:R|R|W, u:C0=m|C1=0|C2=m|C3=m
|
||||
FCOMP ST(i),ST(0) X87STATUS [0xDC /3:reg] s:X87, t:X87_ALU, w:R|R|W, u:C0=m|C1=0|C2=m|C3=m
|
||||
FCOM ST(0),ST(i) X87STATUS [0xDC /2:reg] s:X87, t:X87_ALU, w:R|R|W, u:C0=m|C1=0|C2=m|C3=m
|
||||
FCOMP ST(0),ST(i) X87STATUS [0xDC /3:reg] s:X87, t:X87_ALU, w:R|R|W, u:C0=m|C1=0|C2=m|C3=m
|
||||
FSUBR ST(i),ST(0) X87STATUS [0xDC /4:reg] s:X87, t:X87_ALU, w:RW|R|W, u:C1=m
|
||||
FSUB ST(i),ST(0) X87STATUS [0xDC /5:reg] s:X87, t:X87_ALU, w:RW|R|W, u:C1=m
|
||||
FDIVR ST(i),ST(0) X87STATUS [0xDC /6:reg] s:X87, t:X87_ALU, w:RW|R|W, u:C1=m
|
||||
@ -126,8 +126,8 @@ FNSAVE Mfs X87CONTROL,X87TAG,X87STATUS [0xDD /6:mem] s
|
||||
FNSTSW Mw X87STATUS [0xDD /7:mem] s:X87, t:X87_ALU, w:W|W, u:C0=u|C1=u|C2=u|C3=u
|
||||
FFREE ST(i) X87TAG [0xDD /0:reg] s:X87, t:X87_ALU, w:R|W, u:C0=u|C1=u|C2=u|C3=u
|
||||
FXCH ST(0),ST(i) X87STATUS [0xDD /1:reg] s:X87, t:X87_ALU, w:W|R|W, u:C1=0
|
||||
FST ST(0),ST(i) X87STATUS [0xDD /2:reg] s:X87, t:X87_ALU, w:W|R|W, u:C1=m
|
||||
FSTP ST(0),ST(i) X87STATUS [0xDD /3:reg] s:X87, t:X87_ALU, w:W|R|W, u:C1=m
|
||||
FST ST(i),ST(0) X87STATUS [0xDD /2:reg] s:X87, t:X87_ALU, w:W|R|W, u:C1=m
|
||||
FSTP ST(i),ST(0) X87STATUS [0xDD /3:reg] s:X87, t:X87_ALU, w:W|R|W, u:C1=m
|
||||
FUCOM ST(0),ST(i) X87STATUS [0xDD /4:reg] s:X87, t:X87_ALU, w:R|R|W, u:C0=m|C1=m|C2=m|C3=m
|
||||
FUCOMP ST(0),ST(i) X87STATUS [0xDD /5:reg] s:X87, t:X87_ALU, w:R|R|W, u:C0=m|C1=m|C2=m|C3=m
|
||||
|
||||
|
||||
@ -238,13 +238,13 @@ CLEVICT1 M? nil [vex m:1 p:2 0xAE /7
|
||||
# 0xB0 - 0xBF
|
||||
|
||||
# 0xC0 - 0xCF
|
||||
VCMPSS Vss,Hss,Wss,Ib nil [vex m:1 p:0 l:i w:i 0xC2 /r ib] s:AVX, t:AVX, w:W|R|R|R, e:3
|
||||
VCMPPS Vss,Hss,Wss,Ib nil [vex m:1 p:0 l:i w:i 0xC2 /r ib] s:AVX, t:AVX, w:W|R|R|R, e:3
|
||||
VCMPPD Vpd,Hpd,Wpd,Ib nil [vex m:1 p:1 l:x w:i 0xC2 /r ib] s:AVX, t:AVX, w:W|R|R|R, e:3
|
||||
VCMPSS Vss,Hss,Wss,Ib nil [vex m:1 p:2 l:i w:i 0xC2 /r ib] s:AVX, t:AVX, w:W|R|R|R, e:3
|
||||
VCMPSD Vsd,Hsd,Wsd,Ib nil [vex m:1 p:3 l:i w:i 0xC2 /r ib] s:AVX, t:AVX, w:W|R|R|R, e:3
|
||||
VPINSRW Vdq,Hdq,Mw,Ib nil [vex m:1 p:1 l:0 w:0 0xC4 /r:mem ib] s:AVX, t:AVX, w:W|R|R|R, e:5
|
||||
VPINSRW Vdq,Hdq,Ry,Ib nil [vex m:1 p:1 l:0 w:0 0xC4 /r:reg ib] s:AVX, t:AVX, w:W|R|R|R, e:5
|
||||
VPEXTRW Gy,Udq,Ib nil [vex m:1 p:1 l:0 w:0 0xC5 /r:reg ib] s:AVX, t:AVX, w:W|R|R, e:5
|
||||
VPINSRW Vdq,Hdq,Mw,Ib nil [vex m:1 p:1 l:0 w:i 0xC4 /r:mem ib] s:AVX, t:AVX, w:W|R|R|R, e:5
|
||||
VPINSRW Vdq,Hdq,Rd,Ib nil [vex m:1 p:1 l:0 w:i 0xC4 /r:reg ib] s:AVX, t:AVX, w:W|R|R|R, e:5
|
||||
VPEXTRW Gy,Udq,Ib nil [vex m:1 p:1 l:0 w:i 0xC5 /r:reg ib] s:AVX, t:AVX, w:W|R|R, e:5
|
||||
VSHUFPS Vps,Hps,Wps,Ib nil [vex m:1 p:0 l:x w:i 0xC6 /r ib] s:AVX, t:AVX, w:W|R|R|R, e:4
|
||||
VSHUFPD Vpd,Hpd,Wpd,Ib nil [vex m:1 p:1 l:x w:i 0xC6 /r ib] s:AVX, t:AVX, w:W|R|R|R, e:4
|
||||
|
||||
|
||||
@ -132,20 +132,20 @@ VFMSUBADD132PS Vx,Hx,Wx nil [vex m:2 p:1 l:x w:0
|
||||
VFMSUBADD132PD Vx,Hx,Wx nil [vex m:2 p:1 l:x w:1 0x97 /r] s:FMA, t:VFMA, w:RW|R|R, e:2
|
||||
VFMADD132PS Vx,Hx,Wx nil [vex m:2 p:1 l:x w:0 0x98 /r] s:FMA, t:VFMA, w:RW|R|R, e:2
|
||||
VFMADD132PD Vx,Hx,Wx nil [vex m:2 p:1 l:x w:1 0x98 /r] s:FMA, t:VFMA, w:RW|R|R, e:2
|
||||
VFMADD132SS Vdq,Hdq,Wss nil [vex m:2 p:1 l:x w:0 0x99 /r] s:FMA, t:VFMA, w:RW|R|R, e:3
|
||||
VFMADD132SD Vdq,Hdq,Wsd nil [vex m:2 p:1 l:x w:1 0x99 /r] s:FMA, t:VFMA, w:RW|R|R, e:3
|
||||
VFMADD132SS Vdq,Hdq,Wss nil [vex m:2 p:1 l:i w:0 0x99 /r] s:FMA, t:VFMA, w:RW|R|R, e:3
|
||||
VFMADD132SD Vdq,Hdq,Wsd nil [vex m:2 p:1 l:i w:1 0x99 /r] s:FMA, t:VFMA, w:RW|R|R, e:3
|
||||
VFMSUB132PS Vx,Hx,Wx nil [vex m:2 p:1 l:x w:0 0x9A /r] s:FMA, t:VFMA, w:RW|R|R, e:2
|
||||
VFMSUB132PD Vx,Hx,Wx nil [vex m:2 p:1 l:x w:1 0x9A /r] s:FMA, t:VFMA, w:RW|R|R, e:2
|
||||
VFMSUB132SS Vdq,Hdq,Wss nil [vex m:2 p:1 l:x w:0 0x9B /r] s:FMA, t:VFMA, w:RW|R|R, e:3
|
||||
VFMSUB132SD Vdq,Hdq,Wsd nil [vex m:2 p:1 l:x w:1 0x9B /r] s:FMA, t:VFMA, w:RW|R|R, e:3
|
||||
VFMSUB132SS Vdq,Hdq,Wss nil [vex m:2 p:1 l:i w:0 0x9B /r] s:FMA, t:VFMA, w:RW|R|R, e:3
|
||||
VFMSUB132SD Vdq,Hdq,Wsd nil [vex m:2 p:1 l:i w:1 0x9B /r] s:FMA, t:VFMA, w:RW|R|R, e:3
|
||||
VFNMADD132PS Vx,Hx,Wx nil [vex m:2 p:1 l:x w:0 0x9C /r] s:FMA, t:VFMA, w:RW|R|R, e:2
|
||||
VFNMADD132PD Vx,Hx,Wx nil [vex m:2 p:1 l:x w:1 0x9C /r] s:FMA, t:VFMA, w:RW|R|R, e:2
|
||||
VFNMADD132SS Vdq,Hdq,Wss nil [vex m:2 p:1 l:i w:0 0x9D /r] s:FMA, t:VFMA, w:RW|R|R, e:3
|
||||
VFNMADD132SD Vdq,Hdq,Wsd nil [vex m:2 p:1 l:i w:1 0x9D /r] s:FMA, t:VFMA, w:RW|R|R, e:3
|
||||
VFNMSUB132PS Vx,Hx,Wx nil [vex m:2 p:1 l:x w:0 0x9E /r] s:FMA, t:VFMA, w:RW|R|R, e:2
|
||||
VFNMSUB132PD Vx,Hx,Wx nil [vex m:2 p:1 l:x w:1 0x9E /r] s:FMA, t:VFMA, w:RW|R|R, e:2
|
||||
VFNMSUB132SS Vdq,Hdq,Wss nil [vex m:2 p:1 l:0 w:0 0x9F /r] s:FMA, t:VFMA, w:RW|R|R, e:3
|
||||
VFNMSUB132SD Vdq,Hdq,Wsd nil [vex m:2 p:1 l:0 w:1 0x9F /r] s:FMA, t:VFMA, w:RW|R|R, e:3
|
||||
VFNMSUB132SS Vdq,Hdq,Wss nil [vex m:2 p:1 l:i w:0 0x9F /r] s:FMA, t:VFMA, w:RW|R|R, e:3
|
||||
VFNMSUB132SD Vdq,Hdq,Wsd nil [vex m:2 p:1 l:i w:1 0x9F /r] s:FMA, t:VFMA, w:RW|R|R, e:3
|
||||
|
||||
# 0xA0 - 0xAF
|
||||
VFMADDSUB213PS Vx,Hx,Wx nil [vex m:2 p:1 l:x w:0 0xA6 /r] s:FMA, t:VFMA, w:RW|R|R, e:2
|
||||
@ -154,20 +154,20 @@ VFMSUBADD213PS Vx,Hx,Wx nil [vex m:2 p:1 l:x w:0
|
||||
VFMSUBADD213PD Vx,Hx,Wx nil [vex m:2 p:1 l:x w:1 0xA7 /r] s:FMA, t:VFMA, w:RW|R|R, e:2
|
||||
VFMADD213PS Vx,Hx,Wx nil [vex m:2 p:1 l:x w:0 0xA8 /r] s:FMA, t:VFMA, w:RW|R|R, e:2
|
||||
VFMADD213PD Vx,Hx,Wx nil [vex m:2 p:1 l:x w:1 0xA8 /r] s:FMA, t:VFMA, w:RW|R|R, e:2
|
||||
VFMADD213SS Vdq,Hdq,Wss nil [vex m:2 p:1 l:0 w:0 0xA9 /r] s:FMA, t:VFMA, w:RW|R|R, e:3
|
||||
VFMADD213SD Vdq,Hdq,Wsd nil [vex m:2 p:1 l:0 w:1 0xA9 /r] s:FMA, t:VFMA, w:RW|R|R, e:3
|
||||
VFMADD213SS Vdq,Hdq,Wss nil [vex m:2 p:1 l:i w:0 0xA9 /r] s:FMA, t:VFMA, w:RW|R|R, e:3
|
||||
VFMADD213SD Vdq,Hdq,Wsd nil [vex m:2 p:1 l:i w:1 0xA9 /r] s:FMA, t:VFMA, w:RW|R|R, e:3
|
||||
VFMSUB213PS Vx,Hx,Wx nil [vex m:2 p:1 l:x w:0 0xAA /r] s:FMA, t:VFMA, w:RW|R|R, e:2
|
||||
VFMSUB213PD Vx,Hx,Wx nil [vex m:2 p:1 l:x w:1 0xAA /r] s:FMA, t:VFMA, w:RW|R|R, e:2
|
||||
VFMSUB213SS Vdq,Hdq,Wss nil [vex m:2 p:1 l:0 w:0 0xAB /r] s:FMA, t:VFMA, w:RW|R|R, e:3
|
||||
VFMSUB213SD Vdq,Hdq,Wsd nil [vex m:2 p:1 l:0 w:1 0xAB /r] s:FMA, t:VFMA, w:RW|R|R, e:3
|
||||
VFMSUB213SS Vdq,Hdq,Wss nil [vex m:2 p:1 l:i w:0 0xAB /r] s:FMA, t:VFMA, w:RW|R|R, e:3
|
||||
VFMSUB213SD Vdq,Hdq,Wsd nil [vex m:2 p:1 l:i w:1 0xAB /r] s:FMA, t:VFMA, w:RW|R|R, e:3
|
||||
VFNMADD213PS Vx,Hx,Wx nil [vex m:2 p:1 l:x w:0 0xAC /r] s:FMA, t:VFMA, w:RW|R|R, e:2
|
||||
VFNMADD213PD Vx,Hx,Wx nil [vex m:2 p:1 l:x w:1 0xAC /r] s:FMA, t:VFMA, w:RW|R|R, e:2
|
||||
VFNMADD213SS Vdq,Hdq,Wss nil [vex m:2 p:1 l:0 w:0 0xAD /r] s:FMA, t:VFMA, w:RW|R|R, e:3
|
||||
VFNMADD213SD Vdq,Hdq,Wsd nil [vex m:2 p:1 l:0 w:1 0xAD /r] s:FMA, t:VFMA, w:RW|R|R, e:3
|
||||
VFNMADD213SS Vdq,Hdq,Wss nil [vex m:2 p:1 l:i w:0 0xAD /r] s:FMA, t:VFMA, w:RW|R|R, e:3
|
||||
VFNMADD213SD Vdq,Hdq,Wsd nil [vex m:2 p:1 l:i w:1 0xAD /r] s:FMA, t:VFMA, w:RW|R|R, e:3
|
||||
VFNMSUB213PS Vx,Hx,Wx nil [vex m:2 p:1 l:x w:0 0xAE /r] s:FMA, t:VFMA, w:RW|R|R, e:2
|
||||
VFNMSUB213PD Vx,Hx,Wx nil [vex m:2 p:1 l:x w:1 0xAE /r] s:FMA, t:VFMA, w:RW|R|R, e:2
|
||||
VFNMSUB213SS Vdq,Hdq,Wss nil [vex m:2 p:1 l:0 w:0 0xAF /r] s:FMA, t:VFMA, w:RW|R|R, e:3
|
||||
VFNMSUB213SD Vdq,Hdq,Wsd nil [vex m:2 p:1 l:0 w:1 0xAF /r] s:FMA, t:VFMA, w:RW|R|R, e:3
|
||||
VFNMSUB213SS Vdq,Hdq,Wss nil [vex m:2 p:1 l:i w:0 0xAF /r] s:FMA, t:VFMA, w:RW|R|R, e:3
|
||||
VFNMSUB213SD Vdq,Hdq,Wsd nil [vex m:2 p:1 l:i w:1 0xAF /r] s:FMA, t:VFMA, w:RW|R|R, e:3
|
||||
|
||||
# 0xB0 - 0xBF
|
||||
VFMADDSUB231PS Vx,Hx,Wx nil [vex m:2 p:1 l:x w:0 0xB6 /r] s:FMA, t:VFMA, w:RW|R|R, e:2
|
||||
@ -176,20 +176,20 @@ VFMSUBADD231PS Vx,Hx,Wx nil [vex m:2 p:1 l:x w:0
|
||||
VFMSUBADD231PD Vx,Hx,Wx nil [vex m:2 p:1 l:x w:1 0xB7 /r] s:FMA, t:VFMA, w:RW|R|R, e:2
|
||||
VFMADD231PS Vx,Hx,Wx nil [vex m:2 p:1 l:x w:0 0xB8 /r] s:FMA, t:VFMA, w:RW|R|R, e:2
|
||||
VFMADD231PD Vx,Hx,Wx nil [vex m:2 p:1 l:x w:1 0xB8 /r] s:FMA, t:VFMA, w:RW|R|R, e:2
|
||||
VFMADD231SS Vdq,Hdq,Wss nil [vex m:2 p:1 l:0 w:0 0xB9 /r] s:FMA, t:VFMA, w:RW|R|R, e:3
|
||||
VFMADD231SD Vdq,Hdq,Wsd nil [vex m:2 p:1 l:0 w:1 0xB9 /r] s:FMA, t:VFMA, w:RW|R|R, e:3
|
||||
VFMADD231SS Vdq,Hdq,Wss nil [vex m:2 p:1 l:i w:0 0xB9 /r] s:FMA, t:VFMA, w:RW|R|R, e:3
|
||||
VFMADD231SD Vdq,Hdq,Wsd nil [vex m:2 p:1 l:i w:1 0xB9 /r] s:FMA, t:VFMA, w:RW|R|R, e:3
|
||||
VFMSUB231PS Vx,Hx,Wx nil [vex m:2 p:1 l:x w:0 0xBA /r] s:FMA, t:VFMA, w:RW|R|R, e:2
|
||||
VFMSUB231PD Vx,Hx,Wx nil [vex m:2 p:1 l:x w:1 0xBA /r] s:FMA, t:VFMA, w:RW|R|R, e:2
|
||||
VFMSUB231SS Vdq,Hdq,Wss nil [vex m:2 p:1 l:0 w:0 0xBB /r] s:FMA, t:VFMA, w:RW|R|R, e:3
|
||||
VFMSUB231SD Vdq,Hdq,Wsd nil [vex m:2 p:1 l:0 w:1 0xBB /r] s:FMA, t:VFMA, w:RW|R|R, e:3
|
||||
VFMSUB231SS Vdq,Hdq,Wss nil [vex m:2 p:1 l:i w:0 0xBB /r] s:FMA, t:VFMA, w:RW|R|R, e:3
|
||||
VFMSUB231SD Vdq,Hdq,Wsd nil [vex m:2 p:1 l:i w:1 0xBB /r] s:FMA, t:VFMA, w:RW|R|R, e:3
|
||||
VFNMADD231PS Vx,Hx,Wx nil [vex m:2 p:1 l:x w:0 0xBC /r] s:FMA, t:VFMA, w:RW|R|R, e:2
|
||||
VFNMADD231PD Vx,Hx,Wx nil [vex m:2 p:1 l:x w:1 0xBC /r] s:FMA, t:VFMA, w:RW|R|R, e:2
|
||||
VFNMADD231SS Vdq,Hdq,Wss nil [vex m:2 p:1 l:0 w:0 0xBD /r] s:FMA, t:VFMA, w:RW|R|R, e:3
|
||||
VFNMADD231SD Vdq,Hdq,Wsd nil [vex m:2 p:1 l:0 w:1 0xBD /r] s:FMA, t:VFMA, w:RW|R|R, e:3
|
||||
VFNMADD231SS Vdq,Hdq,Wss nil [vex m:2 p:1 l:i w:0 0xBD /r] s:FMA, t:VFMA, w:RW|R|R, e:3
|
||||
VFNMADD231SD Vdq,Hdq,Wsd nil [vex m:2 p:1 l:i w:1 0xBD /r] s:FMA, t:VFMA, w:RW|R|R, e:3
|
||||
VFNMSUB231PS Vx,Hx,Wx nil [vex m:2 p:1 l:x w:0 0xBE /r] s:FMA, t:VFMA, w:RW|R|R, e:2
|
||||
VFNMSUB231PD Vx,Hx,Wx nil [vex m:2 p:1 l:x w:1 0xBE /r] s:FMA, t:VFMA, w:RW|R|R, e:2
|
||||
VFNMSUB231SS Vdq,Hdq,Wss nil [vex m:2 p:1 l:0 w:0 0xBF /r] s:FMA, t:VFMA, w:RW|R|R, e:3
|
||||
VFNMSUB231SD Vdq,Hdq,Wsd nil [vex m:2 p:1 l:0 w:1 0xBF /r] s:FMA, t:VFMA, w:RW|R|R, e:3
|
||||
VFNMSUB231SS Vdq,Hdq,Wss nil [vex m:2 p:1 l:i w:0 0xBF /r] s:FMA, t:VFMA, w:RW|R|R, e:3
|
||||
VFNMSUB231SD Vdq,Hdq,Wsd nil [vex m:2 p:1 l:i w:1 0xBF /r] s:FMA, t:VFMA, w:RW|R|R, e:3
|
||||
VGF2P8MULB Vx,Hx,Wx nil [vex m:2 p:1 l:x w:0 0xCF /r] s:GFNI, t:GFNI, w:W|R|R
|
||||
VAESIMC Vdq,Wdq nil [vex m:2 p:1 l:0 w:i 0xDB /r] s:AES, t:AES, w:W|R, e:4
|
||||
VAESENC Vx,Hx,Wx nil [vex m:2 p:1 l:x w:i 0xDC /r] s:AES, t:AES, w:W|R|R, e:4
|
||||
|
||||
@ -17,10 +17,10 @@ VPBLENDW Vx,Hx,Wx,Ib nil [vex m:3 p:1 l:x w:i
|
||||
VPALIGNR Vx,Hx,Wx,Ib nil [vex m:3 p:1 l:x w:i 0x0F /r ib] s:AVX, t:AVX, w:W|R|R|R, e:4
|
||||
|
||||
# 0x10 - 0x1F
|
||||
VPEXTRB Mb,Vdq,Ib nil [vex m:3 p:1 l:0 w:0 0x14 /r:mem ib] s:AVX, t:AVX, w:W|R|R, e:5
|
||||
VPEXTRB Ry,Vdq,Ib nil [vex m:3 p:1 l:0 w:0 0x14 /r:reg ib] s:AVX, t:AVX, w:W|R|R, e:5
|
||||
VPEXTRW Mw,Vdq,Ib nil [vex m:3 p:1 l:0 w:0 0x15 /r:mem ib] s:AVX, t:AVX, w:W|R|R, e:5
|
||||
VPEXTRW Ry,Vdq,Ib nil [vex m:3 p:1 l:0 w:0 0x15 /r:reg ib] s:AVX, t:AVX, w:W|R|R, e:5
|
||||
VPEXTRB Mb,Vdq,Ib nil [vex m:3 p:1 l:0 w:i 0x14 /r:mem ib] s:AVX, t:AVX, w:W|R|R, e:5
|
||||
VPEXTRB Rd,Vdq,Ib nil [vex m:3 p:1 l:0 w:i 0x14 /r:reg ib] s:AVX, t:AVX, w:W|R|R, e:5
|
||||
VPEXTRW Mw,Vdq,Ib nil [vex m:3 p:1 l:0 w:i 0x15 /r:mem ib] s:AVX, t:AVX, w:W|R|R, e:5
|
||||
VPEXTRW Rd,Vdq,Ib nil [vex m:3 p:1 l:0 w:i 0x15 /r:reg ib] s:AVX, t:AVX, w:W|R|R, e:5
|
||||
VPEXTRD Ey,Vdq,Ib nil [vex m:3 p:1 l:0 w:0 0x16 /r ib] s:AVX, t:AVX, w:W|R|R, e:5
|
||||
VPEXTRQ Ey,Vdq,Ib nil [vex m:3 p:1 l:0 w:1 0x16 /r ib] s:AVX, t:AVX, w:W|R|R, e:5
|
||||
VEXTRACTPS Md,Vdq,Ib nil [vex m:3 p:1 l:0 w:i 0x17 /r:mem ib] s:AVX, t:AVX, w:W|R|R, e:5
|
||||
@ -54,12 +54,12 @@ VEXTRACTI128 Wdq,Vqq,Ib nil [vex m:3 p:1 l:1 w:0
|
||||
VDPPS Vx,Hx,Wx,Ib nil [vex m:3 p:1 l:x w:i 0x40 /r ib] s:AVX, t:AVX, w:W|R|R|R, e:2
|
||||
VDPPD Vdq,Hdq,Wdq,Ib nil [vex m:3 p:1 l:0 w:i 0x41 /r ib] s:AVX, t:AVX, w:W|R|R|R, e:2
|
||||
VMPSADBW Vx,Hx,Wx,Ib nil [vex m:3 p:1 l:x w:i 0x42 /r ib] s:AVX, t:AVX, w:W|R|R|R, e:4
|
||||
VPCLMULQDQ Vdq,Hdq,Wdq,Ib nil [vex m:3 p:1 l:0 w:i 0x44 /r ib] s:VPCLMULQDQ, t:VPCLMULQDQ, w:W|R|R|R, e:4
|
||||
VPCLMULQDQ Vx,Hx,Wx,Ib nil [vex m:3 p:1 l:x w:i 0x44 /r ib] s:VPCLMULQDQ, t:VPCLMULQDQ, w:W|R|R|R, e:4
|
||||
VPERM2I128 Vqq,Hqq,Wqq,Ib nil [vex m:3 p:1 l:1 w:0 0x46 /r ib] s:AVX2, t:AVX2, w:W|R|R|R, e:6
|
||||
VPERMILzz2PS Vx,Hx,Wx,Lx,Ib nil [vex m:3 p:1 l:x w:0 0x48 /r ib] s:XOP, t:XOP, w:W|R|R|R|R, e:4
|
||||
VPERMILzz2PS Vx,Hx,Lx,Wx,Ib nil [vex m:3 p:1 l:x w:1 0x48 /r ib] s:XOP, t:XOP, w:W|R|R|R|R, e:4
|
||||
VPERMILzz2PD Vx,Hx,Wx,Lx,Ib nil [vex m:3 p:1 l:x w:0 0x49 /r ib] s:XOP, t:XOP, w:W|R|R|R|R, e:4
|
||||
VPERMILzz2PD Vx,Hx,Lx,Wx,Ib nil [vex m:3 p:1 l:x w:1 0x49 /r ib] s:XOP, t:XOP, w:W|R|R|R|R, e:4
|
||||
VPERMIL2PS Vx,Hx,Wx,Lx,m2zIb nil [vex m:3 p:1 l:x w:0 0x48 /r is4] s:XOP, t:XOP, w:W|R|R|R|R, e:4
|
||||
VPERMIL2PS Vx,Hx,Lx,Wx,m2zIb nil [vex m:3 p:1 l:x w:1 0x48 /r is4] s:XOP, t:XOP, w:W|R|R|R|R, e:4
|
||||
VPERMIL2PD Vx,Hx,Wx,Lx,m2zIb nil [vex m:3 p:1 l:x w:0 0x49 /r is4] s:XOP, t:XOP, w:W|R|R|R|R, e:4
|
||||
VPERMIL2PD Vx,Hx,Lx,Wx,m2zIb nil [vex m:3 p:1 l:x w:1 0x49 /r is4] s:XOP, t:XOP, w:W|R|R|R|R, e:4
|
||||
VBLENDVPS Vx,Hx,Wx,Lx nil [vex m:3 p:1 l:x w:0 0x4A /r is4] s:AVX, t:AVX, w:W|R|R|R, e:4
|
||||
VBLENDVPD Vx,Hx,Wx,Lx nil [vex m:3 p:1 l:x w:0 0x4B /r is4] s:AVX, t:AVX, w:W|R|R|R, e:4
|
||||
VPBLENDVB Vx,Hx,Wx,Lx nil [vex m:3 p:1 l:x w:0 0x4C /r is4] s:AVX, t:AVX, w:W|R|R|R, e:4
|
||||
|
||||
@ -118,9 +118,9 @@ VPROTQ Vdq,Wdq,Hdq nil [xop m:9 w:0 0x93 /r]
|
||||
VPROTQ Vdq,Hdq,Wdq nil [xop m:9 w:1 0x93 /r] s:XOP, t:XOP, w:W|R|R
|
||||
VPSHLB Vdq,Wdq,Hdq nil [xop m:9 w:0 0x94 /r] s:XOP, t:XOP, w:W|R|R
|
||||
VPSHLB Vdq,Hdq,Wdq nil [xop m:9 w:1 0x94 /r] s:XOP, t:XOP, w:W|R|R
|
||||
VPSHLB Vdq,Wdq,Hdq nil [xop m:9 w:0 0x95 /r] s:XOP, t:XOP, w:W|R|R
|
||||
VPSHLW Vdq,Wdq,Hdq nil [xop m:9 w:0 0x95 /r] s:XOP, t:XOP, w:W|R|R
|
||||
VPSHLB Vdq,Hdq,Wdq nil [xop m:9 w:1 0x95 /r] s:XOP, t:XOP, w:W|R|R
|
||||
VPSHLB Vdq,Wdq,Hdq nil [xop m:9 w:0 0x96 /r] s:XOP, t:XOP, w:W|R|R
|
||||
VPSHLD Vdq,Wdq,Hdq nil [xop m:9 w:0 0x96 /r] s:XOP, t:XOP, w:W|R|R
|
||||
VPSHLB Vdq,Hdq,Wdq nil [xop m:9 w:1 0x96 /r] s:XOP, t:XOP, w:W|R|R
|
||||
VPSHLQ Vdq,Wdq,Hdq nil [xop m:9 w:0 0x97 /r] s:XOP, t:XOP, w:W|R|R
|
||||
VPSHLQ Vdq,Hdq,Wdq nil [xop m:9 w:1 0x97 /r] s:XOP, t:XOP, w:W|R|R
|
||||
|
||||
Loading…
Reference in New Issue
Block a user