bddisasm/inc/version.h

/*
 * Copyright (c) 2020 Bitdefender
 * SPDX-License-Identifier: Apache-2.0
 */
#ifndef DISASM_VER_H
#define DISASM_VER_H

#define DISASM_VERSION_MAJOR        1
#define DISASM_VERSION_MINOR        36
#define DISASM_VERSION_REVISION     0

// bdshemu depends on bddisasm. It cannot be used without it.
#define SHEMU_VERSION_MAJOR         1
#define SHEMU_VERSION_MINOR         1
#define SHEMU_VERSION_REVISION      16

#endif // DISASM_VER_H
Initial commit. 2020-07-21 08:19:18 +00:00			`/*`
			`* Copyright (c) 2020 Bitdefender`
			`* SPDX-License-Identifier: Apache-2.0`
			`*/`
Don't use reserved identifiers for include guards This fixes #5 2020-07-27 13:51:16 +00:00			`#ifndef DISASM_VER_H`
			`#define DISASM_VER_H`
Initial commit. 2020-07-21 08:19:18 +00:00
			`#define DISASM_VERSION_MAJOR 1`
$BITDEFENDER\vlutas$ Added support for AMD RMPQUERY instruction. 2022-10-27 09:37:02 +00:00			`#define DISASM_VERSION_MINOR 36`
$BITDEFENDER\vlutas$ Added support for new Intel instructions, per Intel ISA extensions document #319433-046 (September 2022): PREFETCHITI, RAO-INT, CMPCCXADD, WRMSRNS, MSRLIST, AMX-FP16, AVX-IFMA, AVX-NE-CONVERT, AVX-VNNI-INT8. Multiple minor fixes to existing instructions. Moved x86 decoding tests in a separate directory & improved the test script. 2022-10-04 09:22:59 +00:00			`#define DISASM_VERSION_REVISION 0`
$BITDEFENDER\vlutas$ Fixed OF on SHL and SHR with one bit shifts. 2022-08-01 11:13:27 +00:00
			`// bdshemu depends on bddisasm. It cannot be used without it.`
			`#define SHEMU_VERSION_MAJOR 1`
			`#define SHEMU_VERSION_MINOR 1`
$BITDEFENDER\vlutas$ Improved upper bits handling for SSE/AVX operations. Improved POPF handling when 16 bit operand size is used. Fixed typo in PUNPCKLBW emulation. 2022-08-09 17:02:45 +00:00			`#define SHEMU_VERSION_REVISION 16`
Initial commit. 2020-07-21 08:19:18 +00:00
Don't use reserved identifiers for include guards This fixes #5 2020-07-27 13:51:16 +00:00			`#endif // DISASM_VER_H`