mirror of
https://github.com/trezor/trezor-firmware.git
synced 2024-11-23 07:58:09 +00:00
98 lines
2.9 KiB
C
98 lines
2.9 KiB
C
#include STM32_HAL_H
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#include "lowlevel.h"
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#define WANTED_WRP (OB_WRP_SECTOR_0 | OB_WRP_SECTOR_1 | OB_WRP_SECTOR_2)
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#define WANTED_RDP (OB_RDP_LEVEL_2)
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void flash_set_option_bytes(void)
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{
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FLASH_OBProgramInitTypeDef opts;
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HAL_FLASHEx_OBGetConfig(&opts);
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opts.OptionType = 0;
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if (opts.WRPSector != WANTED_WRP) {
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opts.OptionType |= OPTIONBYTE_WRP;
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opts.WRPState = OB_WRPSTATE_ENABLE;
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opts.WRPSector = WANTED_WRP;
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opts.Banks = FLASH_BANK_1;
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}
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if (opts.RDPLevel != WANTED_RDP) {
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opts.OptionType |= OPTIONBYTE_RDP;
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opts.RDPLevel = WANTED_RDP;
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}
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if (opts.OptionType == 0) {
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return; // protections are configured
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}
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// attempt to lock down the boardloader sectors
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HAL_FLASH_Unlock();
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HAL_FLASH_OB_Unlock();
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HAL_FLASHEx_OBProgram(&opts);
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HAL_FLASH_OB_Launch();
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HAL_FLASH_OB_Lock();
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HAL_FLASH_Lock();
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}
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#define FLASH_OPTION_BYTES_1 (*(const uint64_t *)0x1FFFC000)
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#define FLASH_OPTION_BYTES_2 (*(const uint64_t *)0x1FFFC008)
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secbool flash_check_option_bytes(void)
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{
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// RDP level 2 WRP for sectors 0, 1 and 2 flash option control register matches
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if (((FLASH_OPTION_BYTES_1 & 0xFFEC) == 0xCCEC) && ((FLASH_OPTION_BYTES_2 & 0x0FFF) == 0x0FF8) && (FLASH->OPTCR == 0x0FF8CCED)) {
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return sectrue;
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}
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return secfalse;
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}
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void periph_init(void)
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{
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// STM32F4xx HAL library initialization:
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// - configure the Flash prefetch, instruction and data caches
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// - configure the Systick to generate an interrupt each 1 msec
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// - set NVIC Group Priority to 4
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// - global MSP (MCU Support Package) initialization
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HAL_Init();
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// Enable GPIO clocks
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__HAL_RCC_GPIOA_CLK_ENABLE();
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__HAL_RCC_GPIOB_CLK_ENABLE();
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__HAL_RCC_GPIOC_CLK_ENABLE();
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__HAL_RCC_GPIOD_CLK_ENABLE();
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// enable the PVD (programmable voltage detector).
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// select the "2.6V" threshold (level 4).
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// this detector will be active regardless of the
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// flash option byte BOR setting.
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__HAL_RCC_PWR_CLK_ENABLE();
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PWR_PVDTypeDef pvd_config;
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pvd_config.PVDLevel = PWR_PVDLEVEL_4;
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pvd_config.Mode = PWR_PVD_MODE_IT_RISING_FALLING;
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HAL_PWR_ConfigPVD(&pvd_config);
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HAL_PWR_EnablePVD();
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NVIC_EnableIRQ(PVD_IRQn);
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}
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secbool reset_flags_init(void)
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{
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/*
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#if PRODUCTION
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// this is effective enough that it makes development painful, so only use it for production.
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// check the reset flags to assure that we arrive here due to a regular full power-on event,
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// and not as a result of a lesser reset.
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if ((RCC->CSR & (RCC_CSR_LPWRRSTF | RCC_CSR_WWDGRSTF | RCC_CSR_IWDGRSTF | RCC_CSR_SFTRSTF | RCC_CSR_PORRSTF | RCC_CSR_PINRSTF | RCC_CSR_BORRSTF)) != (RCC_CSR_PORRSTF | RCC_CSR_PINRSTF | RCC_CSR_BORRSTF)) {
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return secfalse;
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}
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#endif
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*/
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RCC->CSR |= RCC_CSR_RMVF; // clear the reset flags
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return sectrue;
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}
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