tychovrahe
|
a7f6930c78
|
feat(core): add support for haptics on T3W1
[no changelog]
|
2024-11-20 20:01:52 +01:00 |
|
tychovrahe
|
70b9746dc5
|
feat(core): support powering up optiga on T3T1 rev. G and T3B1 rev. C PCBs
[no changelog]
|
2024-11-20 20:01:29 +01:00 |
|
tychovrahe
|
b0dd521c5d
|
fix(core): separate bootargs from kernel/aux SRAM
[no changelog]
|
2024-11-20 11:17:35 +01:00 |
|
tychovrahe
|
0f0f54f185
|
feat(core): support optiga on T3W1
[no changelog]
|
2024-11-20 11:17:35 +01:00 |
|
tychovrahe
|
c5b3dd72b9
|
feat(core): add support for SBU on T3W1
[no changelog]
|
2024-11-20 11:17:35 +01:00 |
|
tychovrahe
|
40c5426717
|
fix(core): fix MPU kernel sram setting for STM32U5G
[no changelog]
|
2024-11-20 11:17:35 +01:00 |
|
tychovrahe
|
b4c95f4c16
|
fix(core): fix systick frequency computation by utilizing HSE_VALUE properly
[no changelog]
|
2024-11-20 11:17:35 +01:00 |
|
tychovrahe
|
10687e8fa0
|
feat(core): add power button to T3W1 board rev A
[no changelog]
|
2024-11-20 11:17:35 +01:00 |
|
cepetr
|
089db2cadf
|
refactor(core): restructure embed folder
[no changelog]
|
2024-11-18 09:41:02 +01:00 |
|
Martin Milata
|
c101cdfcbe
|
Merge branch 'release/24.11.01'
|
2024-11-15 18:37:16 +01:00 |
|
tychovrahe
|
4d4ab93197
|
chore(core): remove residual DISPLAY_LEGACY_HEADER constant from boards
[no changelog]
|
2024-11-14 09:30:20 +01:00 |
|
tychovrahe
|
aac3559453
|
chore(core): move storage sectors to end of flash on U5G models
[no changelog]
|
2024-11-14 09:30:20 +01:00 |
|
tychovrahe
|
fa953d7296
|
chore(core): switch T3W1 support to U5
[no changelog]
|
2024-11-14 09:30:20 +01:00 |
|
tychovrahe
|
5c101ab800
|
feat(core): switch DISC2 to use newer U5G variant
[no changelog]
|
2024-11-14 09:30:20 +01:00 |
|
tychovrahe
|
5894c34f58
|
feat(core): adjust flash layout on DISC2
[no changelog]
|
2024-11-14 09:30:20 +01:00 |
|
tychovrahe
|
0d3af6a96a
|
fix(core): fix firmware hashing on U5
[no changelog]
|
2024-11-12 12:55:36 +01:00 |
|
tychovrahe
|
435fbd6e8c
|
feat(core): add power button to button driver
[no changelog]
|
2024-11-07 08:48:21 +01:00 |
|
cepetr
|
7b6f444751
|
refactor(core): introduce global trezor_rtl/bsp/model headers
[no changelog]
|
2024-11-05 10:00:31 +01:00 |
|
cepetr
|
c997201754
|
refactor(core): simplify ensure_compatible_settings
[no changelog]
|
2024-11-04 14:05:37 +01:00 |
|
cepetr
|
80a67c647f
|
refactor(core): relocate display resolution to model.h
[no changelog]
|
2024-11-04 14:05:37 +01:00 |
|
cepetr
|
bba94ab1f6
|
refactor(core): remove redundant TREZOR_FONT_BPP
[no changelog]
|
2024-11-04 14:05:37 +01:00 |
|
cepetr
|
cb2c85dc2e
|
refactor(core): remove unused MAX_DISPLAY_RESx
[no changelog]
|
2024-11-04 14:05:37 +01:00 |
|
Martin Milata
|
1dfaae6080
|
chore(core): add signed bootloader 2.1.9 for T3T1
|
2024-11-04 12:17:31 +01:00 |
|
tychovrahe
|
d38c2e1790
|
chore(core): drop obsolete boards
[no changelog]
|
2024-10-31 10:27:08 +01:00 |
|
tychovrahe
|
42396dd007
|
refactor(core): make USE_xxx defines global
[no changelog]
|
2024-10-31 10:27:08 +01:00 |
|
cepetr
|
a747210f54
|
fix(core): fix secret & assets start address const
[no changelog]
|
2024-10-31 10:25:31 +01:00 |
|
cepetr
|
059152d9b4
|
fix(core): fix BHK_MAXSIZE constant
[no changelog]
|
2024-10-31 10:25:31 +01:00 |
|
cepetr
|
7bd3663930
|
fix(core): align coreapp start to 8KB (u5 only)
[no changelog]
|
2024-10-31 10:25:31 +01:00 |
|
cepetr
|
5fd1f0e4c6
|
refactor(core): decompose lowlevel module
[no changelog]
|
2024-10-22 09:06:21 +02:00 |
|
cepetr
|
f6647ab3b7
|
refactor(core): introduce startup_init.c
[no changelog]
|
2024-10-22 09:06:21 +02:00 |
|
tychovrahe
|
d71d9e9c34
|
feat(core): add T3W1 emulator build
[no changelog]
|
2024-10-09 15:06:40 +02:00 |
|
tychovrahe
|
915d4fca94
|
feat(core): add support for T3W1, on F4
[no changelog]
|
2024-10-09 15:06:40 +02:00 |
|
tychovrahe
|
138fadbf7b
|
feat(core): add LHS200KB display panel
[no changelog]
|
2024-10-09 15:06:40 +02:00 |
|
tychovrahe
|
d312944f1e
|
feat(core): embed bootloaders to DISC1,2 models in order to support testing related featurees
[no changelog]
|
2024-09-27 09:49:20 +02:00 |
|
tychovrahe
|
d412ce987e
|
refactor(core): use common layout.c file
[no changelog]
|
2024-09-27 09:49:20 +02:00 |
|
tychovrahe
|
21c1359ac6
|
refactor(core): streamline layout definitions
[no changelog]
|
2024-09-27 09:49:20 +02:00 |
|
tychovrahe
|
e13d4a45a6
|
chore(core): remove residual support for T1B1 in core
[no changelog]
|
2024-09-25 09:18:01 +02:00 |
|
tychovrahe
|
e9c025751c
|
fix(core): fix storage offsets
[no changelog]
|
2024-09-24 12:21:53 +02:00 |
|
tychovrahe
|
28f420189a
|
refactor(core): combined build of coreapp + kernel, linker scripts refactoring
[no changelog]
|
2024-09-24 12:21:53 +02:00 |
|
cepetr
|
1c991339ce
|
refactor(core/embed): split firmware into kernel & coreapp
[no changelog]
|
2024-09-24 12:21:53 +02:00 |
|
cepetr
|
7f3cff04f1
|
refactor(core/embed): introduce new mpu driver
[no changelog]
|
2024-09-24 12:21:53 +02:00 |
|
cepetr
|
91649dc7cb
|
feat(core/embed): introduce non-blocking i2c drivers
[no changelog]
|
2024-09-24 12:21:53 +02:00 |
|
cepetr
|
33c2bcbe52
|
refactor(core/embed): simplify ensure_compatible_settings
[no changelog]
|
2024-09-24 12:21:53 +02:00 |
|
Martin Milata
|
5d8461969a
|
chore(core): add hashes for 2.1.8 bootloader
|
2024-09-09 14:21:38 +02:00 |
|
Martin Milata
|
37006592db
|
chore(core): add signed bootloader 2.1.8 for T3B1 and T3T1
|
2024-09-09 12:12:39 +02:00 |
|
tychovrahe
|
708b0274f5
|
chore(core): bump monotonic versions
[no changelog]
|
2024-09-03 13:07:34 +02:00 |
|
tychovrahe
|
395a4af9be
|
refactor(core): extract monotonic version to model specific headers
[no changelog]
|
2024-09-03 13:07:34 +02:00 |
|
tychovrahe
|
c1864a2a91
|
refactor(core): enclose monotonic counter to platform specific module
[no changelog]
|
2024-09-03 13:07:34 +02:00 |
|
tychovrahe
|
7275a5544e
|
refactor(core): move embedded bootloaders and their hashes to model folders
[no changelog]
|
2024-08-29 12:47:24 +02:00 |
|
tychovrahe
|
4397978563
|
chore(core): add T3B1 binaries
[no changelog]
|
2024-08-01 13:29:38 +02:00 |
|