tychovrahe
|
b0dd521c5d
|
fix(core): separate bootargs from kernel/aux SRAM
[no changelog]
|
2024-11-20 11:17:35 +01:00 |
|
tychovrahe
|
40c5426717
|
fix(core): fix MPU kernel sram setting for STM32U5G
[no changelog]
|
2024-11-20 11:17:35 +01:00 |
|
tychovrahe
|
b4c95f4c16
|
fix(core): fix systick frequency computation by utilizing HSE_VALUE properly
[no changelog]
|
2024-11-20 11:17:35 +01:00 |
|
cepetr
|
089db2cadf
|
refactor(core): restructure embed folder
[no changelog]
|
2024-11-18 09:41:02 +01:00 |
|
tychovrahe
|
4d4ab93197
|
chore(core): remove residual DISPLAY_LEGACY_HEADER constant from boards
[no changelog]
|
2024-11-14 09:30:20 +01:00 |
|
tychovrahe
|
aac3559453
|
chore(core): move storage sectors to end of flash on U5G models
[no changelog]
|
2024-11-14 09:30:20 +01:00 |
|
tychovrahe
|
5c101ab800
|
feat(core): switch DISC2 to use newer U5G variant
[no changelog]
|
2024-11-14 09:30:20 +01:00 |
|
tychovrahe
|
5894c34f58
|
feat(core): adjust flash layout on DISC2
[no changelog]
|
2024-11-14 09:30:20 +01:00 |
|
tychovrahe
|
0d3af6a96a
|
fix(core): fix firmware hashing on U5
[no changelog]
|
2024-11-12 12:55:36 +01:00 |
|
cepetr
|
80a67c647f
|
refactor(core): relocate display resolution to model.h
[no changelog]
|
2024-11-04 14:05:37 +01:00 |
|
tychovrahe
|
42396dd007
|
refactor(core): make USE_xxx defines global
[no changelog]
|
2024-10-31 10:27:08 +01:00 |
|
cepetr
|
059152d9b4
|
fix(core): fix BHK_MAXSIZE constant
[no changelog]
|
2024-10-31 10:25:31 +01:00 |
|
cepetr
|
7bd3663930
|
fix(core): align coreapp start to 8KB (u5 only)
[no changelog]
|
2024-10-31 10:25:31 +01:00 |
|
tychovrahe
|
d312944f1e
|
feat(core): embed bootloaders to DISC1,2 models in order to support testing related featurees
[no changelog]
|
2024-09-27 09:49:20 +02:00 |
|
tychovrahe
|
d412ce987e
|
refactor(core): use common layout.c file
[no changelog]
|
2024-09-27 09:49:20 +02:00 |
|
tychovrahe
|
21c1359ac6
|
refactor(core): streamline layout definitions
[no changelog]
|
2024-09-27 09:49:20 +02:00 |
|
tychovrahe
|
e9c025751c
|
fix(core): fix storage offsets
[no changelog]
|
2024-09-24 12:21:53 +02:00 |
|
tychovrahe
|
28f420189a
|
refactor(core): combined build of coreapp + kernel, linker scripts refactoring
[no changelog]
|
2024-09-24 12:21:53 +02:00 |
|
cepetr
|
1c991339ce
|
refactor(core/embed): split firmware into kernel & coreapp
[no changelog]
|
2024-09-24 12:21:53 +02:00 |
|
cepetr
|
7f3cff04f1
|
refactor(core/embed): introduce new mpu driver
[no changelog]
|
2024-09-24 12:21:53 +02:00 |
|
cepetr
|
91649dc7cb
|
feat(core/embed): introduce non-blocking i2c drivers
[no changelog]
|
2024-09-24 12:21:53 +02:00 |
|
tychovrahe
|
395a4af9be
|
refactor(core): extract monotonic version to model specific headers
[no changelog]
|
2024-09-03 13:07:34 +02:00 |
|
tychovrahe
|
354dad617d
|
fix(core): fix vector table alignment on STM32U5
[no changelog]
|
2024-07-16 16:38:48 +02:00 |
|
tychovrahe
|
7c94080227
|
refactor(core): move vendor headers to model specific directories
[no changelog]
|
2024-07-16 15:56:28 +02:00 |
|
tychovrahe
|
9166dc330e
|
refactor(core): reorganize model-specific files in embed/models
[no changelog]
|
2024-05-21 19:01:31 +02:00 |
|